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2025-03-08accel/tcg: Restrict GETPC_ADJ to 'tb-internal.h'Philippe Mathieu-Daudé1-0/+11
GETPC_ADJ is only used within accel/tcg/, no need to expose it to all the code base. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250308072348.65723-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-03-08accel/tcg: Build tcg-accel-ops-mttcg.c onceRichard Henderson2-2/+1
All that is required is to avoid including exec-all.h. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-03-08accel/tcg: Build tcg-accel-ops-rr.c onceRichard Henderson2-2/+2
All that is required is to use cpu-common.h instead of exec-all.h. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-03-08accel/tcg: Build tcg-accel-ops-icount.c onceRichard Henderson2-2/+2
All that is required is to avoid including exec-all.h. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-03-08accel/tcg: Build tcg-accel-ops.c onceRichard Henderson1-1/+1
Now that tcg-accel-ops.c uses cputlb.h instead of exec-all.h, it can be built once. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-03-08exec: Declare tlb_flush*() in 'exec/cputlb.h'Philippe Mathieu-Daudé1-1/+1
Move CPU TLB related methods to "exec/cputlb.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-ID: <20241114011310.3615-19-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-03-08exec: Declare tlb_hit*() in 'exec/cputlb.h'Philippe Mathieu-Daudé1-0/+23
Move CPU TLB related methods to "exec/cputlb.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241114011310.3615-20-philmd@linaro.org>
2025-03-08accel/tcg: Compile watchpoint.c onceRichard Henderson4-6/+5
Move tb_check_watchpoint declaration from tb-internal.h, which is still target-specific, to internal-common.h, which isn't. Otherwise, all that is required to build watchpoint.c once is to include the new exec/cpu-interrupt.h instead of exec/exec-all.h. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-03-07accel/tcg: Restrict CPU_TLB_DYN_*_BITS definitions to accel/tcg/Philippe Mathieu-Daudé1-0/+27
CPU_TLB_DYN_*_BITS definitions are only used by accel/tcg/cputlb.c and accel/tcg/translate-all.c. Move them to accel/tcg/tb-internal.h. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250305191859.71608-1-philmd@linaro.org>
2025-03-06accel/tcg: Move cpu_memory_rw_debug() user implementation to user-exec.cPhilippe Mathieu-Daudé1-0/+80
cpu_memory_rw_debug() system implementation is defined in system/physmem.c. Move the user one to accel/tcg/user-exec.c to simplify cpu-target.c maintenance. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250217130610.18313-6-philmd@linaro.org>
2025-03-06accel/tcg: Include missing bswap headers in user-exec.cPhilippe Mathieu-Daudé1-0/+2
Commit 35c653c4029 ("tcg: Add 128-bit guest memory primitives") introduced the use of bswap128() which is declared in "qemu/int128.h", commit de95016dfbf ("accel/tcg: Implement helper_{ld,st}*_mmu for user-only") introduced the other bswap*() uses, which are declared in "qemu/bswap.h". Include the missing headers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250217130610.18313-3-philmd@linaro.org>
2025-03-06accel: Forward-declare AccelOpsClass in 'qemu/typedefs.h'Philippe Mathieu-Daudé5-4/+1
The heavily imported "system/cpus.h" header includes "accel-ops.h" to get AccelOpsClass type declaration. Reduce headers pressure by forward declaring it in "qemu/typedefs.h", where we already declare the AccelCPUState type. Reduce "system/cpus.h" inclusions by only including "system/accel-ops.h" when necessary. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-14-philmd@linaro.org>
2025-03-06accel/tcg: Rename 'hw/core/tcg-cpu-ops.h' -> 'accel/tcg/cpu-ops.h'Philippe Mathieu-Daudé5-5/+5
TCGCPUOps structure makes more sense in the accelerator context rather than hardware emulation. Move it under the accel/tcg/ scope. Mechanical change doing: $ sed -i -e 's,hw/core/tcg-cpu-ops.h,accel/tcg/cpu-ops.h,g' \ $(git grep -l hw/core/tcg-cpu-ops.h) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-11-philmd@linaro.org>
2025-03-06accel/tcg: Restrict 'icount_align_option' global to TCGPhilippe Mathieu-Daudé2-0/+4
Since commit 740b1759734 ("cpu-timers, icount: new modules") we don't need to expose icount_align_option to all the system code, we can restrict it to TCG. Since it is used as a boolean, declare it as 'bool' type. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-10-philmd@linaro.org>
2025-03-06accel/tcg: Restrict tlb_init() / destroy() to TCGPhilippe Mathieu-Daudé2-0/+22
Move CPU TLB related methods to accel/tcg/ scope, in "internal-common.h". Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-9-philmd@linaro.org>
2025-03-06accel/tcg: Build tcg_flags helpers as common codePhilippe Mathieu-Daudé2-32/+33
While cpu-exec.c is build for each target,tcg_flags helpers aren't target specific. Move them to cpu-exec-common.c to build them once. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-8-philmd@linaro.org>
2025-02-18include/exec: Use uintptr_t in CPUTLBEntryRichard Henderson1-17/+4
Since we no longer support 64-bit guests on 32-bit hosts, we can use a 32-bit type on a 32-bit host. This shrinks the size of the structure to 16 bytes on a 32-bit host. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-18accel/tcg: Fix tlb_set_page_with_attrs, tlb_set_pageRichard Henderson1-2/+2
The declarations use vaddr for size. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-18tcg: Remove TCG_OVERSIZED_GUESTRichard Henderson2-12/+4
This is now prohibited in configuration. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-02-08meson: Drop tcg as a moduleRichard Henderson1-7/+4
This reverts commit dae0ec159f9 ("accel: build tcg modular"). The attempt was only enabled for x86, only modularized a small portion of tcg, and in more than 3 years there have been no follow-ups to improve the situation. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-30licenses: Remove SPDX tags not being license identifier for LinaroPhilippe Mathieu-Daudé1-2/+7
Per [*]: "we're only interested in adopting SPDX for recording the licensing info, [not] any other SPDX metadata." Replace the 'SPDX-FileCopyrightText' and 'SPDX-FileContributor' tags added by Linaro by 'Copyright (c)' and 'Authors' words respectively. [*] https://lore.kernel.org/qemu-devel/20241007154548.1144961-4-berrange@redhat.com/ Inspired-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-01-21Merge tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi3-10/+33
tcg: - Add TCGOP_TYPE, TCGOP_FLAGS. - Pass type and flags to tcg_op_supported, tcg_target_op_def. - Split out tcg-target-has.h and unexport from tcg.h. - Reorg constraint processing; constify TCGOpDef. - Make extract, sextract, deposit opcodes mandatory. - Merge ext{8,16,32}{s,u} opcodes into {s}extract. tcg/mips: Expand bswap unconditionally tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv: Use BEXTI for single-bit extractions tcg/sparc64: Use SRA, SRL for {s}extract_i64 disas/riscv: Guard dec->cfg dereference for host disassemble util/cpuinfo-riscv: Detect Zbs accel/tcg: Call tcg_tb_insert() for one-insn TBs linux-user: Add missing /proc/cpuinfo fields for sparc # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmeKnzUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+Kvgf+LG9UjXlWF9GK923E # TllBL2rLf1OOdtTXWO15VcvGMoWDwB3tVBdhihdvXmnWju+WbfMk6mct5NhzsKn9 # LmuugMIZs+hMROj+bgMK8x47jRIh5N2rDYxcEgmyfIpYb2o9qvyqKecGVRlSJTCE # bmt5UFbvPThBb8upoMfq3F6evuMx0szBP7wrOwSR/VGpmzIr20UTEWo6I1ALp4uj # paFaysYol4em3dIhkiuV9cL7E0EIObaNa7l9RUci/BmTq+JaVxUnW1Y2i0PEwKwG # FJSfYTJk3wBgAVxC2zC2g3ZM7uKuecSXMpiFopTiuyQLp7Q61i9kCNvEq0qY5tdb # DaqR/g== # =cv4O # -----END PGP SIGNATURE----- # gpg: Signature made Fri 17 Jan 2025 13:19:33 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu: (68 commits) softfloat: Constify helpers returning float_status field accel/tcg: Call tcg_tb_insert() for one-insn TBs tcg: Document tb_lookup() and tcg_tb_lookup() linux-user: Add missing /proc/cpuinfo fields for sparc tcg/riscv: Use BEXTI for single-bit extractions util/cpuinfo-riscv: Detect Zbs tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64} tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64} tcg/tci: Remove assertions for deposit and extract tcg/tci: Provide TCG_TARGET_{s}extract_valid tcg/sparc64: Use SRA, SRL for {s}extract_i64 tcg/s390x: Fold the ext{8,16,32}[us] cases into {s}extract tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/ppc: Fold the ext{8,16,32}[us] cases into {s}extract tcg/mips: Fold the ext{8,16,32}[us] cases into {s}extract tcg/loongarch64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/arm: Add full [US]XT[BH] into {s}extract tcg/aarch64: Expand extract with offset 0 with andi tcg/aarch64: Provide TCG_TARGET_{s}extract_valid ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-17accel/tcg: Call tcg_tb_insert() for one-insn TBsIlya Leoshkevich1-9/+18
Currently one-insn TBs created from I/O memory are not added to region_trees. Therefore, when they generate exceptions, they are not handled by cpu_restore_state_from_tb(). For x86 this is not a problem, because x86_restore_state_to_opc() only restores pc and cc, which already have the correct values if the first TB instruction causes an exception. However, on several other architectures, restore_state_to_opc() is not stricly limited to state restoration and affects some exception-related registers, where guests can notice incorrect values, for example: - arm's exception.syndrome; - hppa's unwind_breg; - riscv's excp_uw2; - s390x's int_pgm_ilen. Fix by always calling tcg_tb_insert(). This may increase the size of region_trees, but tcg_region_reset_all() clears it once code_gen_buffer fills up, so it will not grow uncontrollably. Do not call tb_link_page(), which would add such TBs to the QHT, to prevent tb_lookup() from finding them. These TBs are single-use, since subsequent reads from I/O memory may return different values; they are not removed from code_gen_buffer only in order to keep things simple. Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250116213214.5695-2-iii@linux.ibm.com>
2025-01-17tcg: Document tb_lookup() and tcg_tb_lookup()Ilya Leoshkevich1-1/+14
These similarly named functions serve different purposes; add docstrings to highlight them. Suggested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250116213214.5695-1-iii@linux.ibm.com>
2025-01-17accel/tcg: also suppress asynchronous IRQs for cpu_io_recompileAlex Bennée1-2/+3
While it would be technically correct to allow an IRQ to happen (as the offending instruction never really completed) it messes up instrumentation. We already take care to only use memory instrumentation on the block, we should also suppress IRQs. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Julian Ganz <neither@nut.email> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-23-alex.bennee@linaro.org>
2025-01-16tcg: Split out tcg-target-mo.hRichard Henderson1-0/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-09qdev: Implement qdev_create_fake_machine() for user emulationPhilippe Mathieu-Daudé1-1/+7
When a QDev instance is realized, qdev_get_machine() ends up called. In the next commit, qdev_get_machine() will require a "machine" container to be always present. To satisfy this QOM containers design, Implement qdev_create_fake_machine() which creates a fake "machine" container for user emulation. On system emulation, qemu_create_machine() is called from qemu_init(). For user emulation, since the TCG accelerator always calls tcg_init_machine(), we use it to hook our fake machine creation. Suggested-by: Peter Xu <peterx@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Peter Xu <peterx@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250102211800.79235-2-philmd@linaro.org>
2024-12-24accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_coreRichard Henderson2-6/+10
Convert all targets simultaneously, as the gen_intermediate_code function disappears from the target. While there are possible workarounds, they're larger than simply performing the conversion. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-12-24plugins: optimize cpu_index code generationPierrick Bouvier1-0/+9
When running with a single vcpu, we can return a constant instead of a load when accessing cpu_index. A side effect is that all tcg operations using it are optimized, most notably scoreboard access. When running a simple loop in user-mode, the speedup is around 20%. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241128213843.1023080-1-pierrick.bouvier@linaro.org>
2024-12-20accel/tcg: Un-inline translator_is_same_page()Philippe Mathieu-Daudé1-1/+6
Remove the single target-specific definition used in "exec/translator.h" (TARGET_PAGE_MASK) by un-inlining is_same_page(). Rename the method as translator_is_same_page() and improve its documentation. Use it in translator_use_goto_tb(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241218154145.71353-1-philmd@linaro.org>
2024-12-20accel/tcg: Include missing 'exec/translation-block.h' headerPhilippe Mathieu-Daudé2-0/+2
TB compile flags, tb_page_addr_t type, tb_cflags() and few other methods are defined in "exec/translation-block.h". All these files don't include "exec/translation-block.h" but include "exec/exec-all.h" which include it. Explicitly include "exec/translation-block.h" to be able to remove it from "exec/exec-all.h" later when it won't be necessary. Otherwise we'd get errors such: accel/tcg/internal-target.h:59:20: error: a parameter list without types is only allowed in a function definition 59 | void tb_lock_page0(tb_page_addr_t); | ^ accel/tcg/tb-hash.h:64:23: error: unknown type name 'tb_page_addr_t' 64 | uint32_t tb_hash_func(tb_page_addr_t phys_pc, vaddr pc, | ^ accel/tcg/tcg-accel-ops.c:62:36: error: use of undeclared identifier 'CF_CLUSTER_SHIFT' 62 | cflags = cpu->cluster_index << CF_CLUSTER_SHIFT; | ^ accel/tcg/watchpoint.c:102:47: error: use of undeclared identifier 'CF_NOIRQ' 102 | cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu); | ^ target/i386/helper.c:536:28: error: use of undeclared identifier 'CF_PCREL' 536 | if (tcg_cflags_has(cs, CF_PCREL)) { | ^ target/rx/cpu.c:51:21: error: incomplete definition of type 'struct TranslationBlock' 51 | cpu->env.pc = tb->pc; | ~~^ system/physmem.c:2977:9: error: call to undeclared function 'tb_invalidate_phys_range'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 2977 | tb_invalidate_phys_range(addr, addr + length - 1); | ^ plugins/api.c:96:12: error: call to undeclared function 'tb_cflags'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 96 | return tb_cflags(tcg_ctx->gen_tb) & CF_MEMI_ONLY; | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241114011310.3615-5-philmd@linaro.org>
2024-12-20accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h'Philippe Mathieu-Daudé3-0/+3
The TranslationBlock flags are defined in 'exec/translation-block.h'. tcg_cflags_has/set() use them, it is more logical to declare them in the same place. Move them there too. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212144430.66224-2-philmd@linaro.org>
2024-12-20accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h'Philippe Mathieu-Daudé2-0/+4
curr_cflags() is only used within accel/tcg/, move its declaration to accel/tcg/internal-common.h. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241216214030.59393-1-philmd@linaro.org>
2024-12-20accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h'Philippe Mathieu-Daudé1-1/+1
Move cpu_loop_exit_requested() declaration to "exec/cpu-common.h", along with the related cpu_loop_exit_noexc(), cpu_loop_exit(), cpu_loop_exit_atomic() and cpu_loop_exit_restore() methods. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241217140648.98538-1-philmd@linaro.org>
2024-12-20user: Move various declarations out of 'exec/exec-all.h'Philippe Mathieu-Daudé1-0/+1
Move various declarations related to user emulation from "exec/exec-all.h" to "user/cpu_loop.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-19-philmd@linaro.org>
2024-12-20accel/tcg: Move user-related declarations out of 'exec/cpu-all.h' (4/4)Philippe Mathieu-Daudé1-0/+3
Move declarations related to page protection under user emulation from "exec/cpu-all.h" to "user/page-protection.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-15-philmd@linaro.org>
2024-12-20accel/tcg: Really restrict cpu_io_recompile() to system emulationPhilippe Mathieu-Daudé1-2/+2
Commit 38fc4b11e03 ("accel/tcg: Restrict cpu_io_recompile() to system emulation") inadvertently restricted cpu_io_recompile() to SoftMMU. Correct to restrict to system emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241216160514.56630-1-philmd@linaro.org>
2024-12-20accel/tcg: Move TranslationBlock declarations to 'tb-internal.h'Philippe Mathieu-Daudé7-32/+44
Move declarations related to TranslationBlock out of the generic "internal-target.h" to "tb-internal.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-11-philmd@linaro.org>
2024-12-20accel/tcg: Un-inline log_pc()Philippe Mathieu-Daudé2-10/+11
log_pc() is only used within cpu-exec.c, no need to expose it via "internal-target.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-10-philmd@linaro.org>
2024-12-20accel/tcg: Move 'exec/translate-all.h' -> 'tb-internal.h'Philippe Mathieu-Daudé7-5/+20
"exec/translate-all.h" is only useful to TCG accelerator, so move it to accel/tcg/, after renaming it 'tb-internal.h'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-9-philmd@linaro.org>
2024-12-20accel/tcg: Move page_[un]protect() to 'user/page-protection.h'Philippe Mathieu-Daudé2-1/+2
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-7-philmd@linaro.org>
2024-12-20accel/tcg: Use tb_page_addr_t type in page_unprotect()Philippe Mathieu-Daudé1-1/+1
Match with the page_protect() prototype, use a tb_page_addr_t argument instead of target_ulong. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-6-philmd@linaro.org>
2024-12-20accel/tcg: Declare mmap_[un]lock() in 'exec/page-protection.h'Philippe Mathieu-Daudé3-0/+3
Move mmap_lock(), mmap_unlock() declarations and the WITH_MMAP_LOCK_GUARD() definition to 'exec/page-protection.h'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241212185341.2857-5-philmd@linaro.org>
2024-12-20accel/tcg: Have tlb_vaddr_to_host() use vaddr typePhilippe Mathieu-Daudé1-1/+1
abi_ptr is expected to be used in user emulation. tlb_vaddr_to_host() uses it, but can be used in system emulation. Replace the type by 'vaddr' which is equivalent on user emulation but also works on system. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241114011310.3615-13-philmd@linaro.org>
2024-12-20accel/tcg: Include missing 'exec/tswap.h' header in translator.cPhilippe Mathieu-Daudé1-0/+1
translator.c indirectly gets "exec/tswap.h" declarations via "exec/cpu-all.h". Include it directly to be able to remove the former from the latter, otherwise we get: accel/tcg/translator.c:433:15: error: call to undeclared function 'tswap16'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 433 | tgt = tswap16(raw); | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241211230357.97036-4-philmd@linaro.org>
2024-12-20include: Rename sysemu/ -> system/Philippe Mathieu-Daudé13-34/+34
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer. Files renamed manually then mechanical change using sed tool. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>
2024-12-12tcg: Reset free_temps before tcg_optimizeRichard Henderson1-1/+1
When allocating new temps during tcg_optmize, do not re-use any EBB temps that were used within the TB. We do not have any idea what span of the TB in which the temp was live. Introduce tcg_temp_ebb_reset_freed and use before tcg_optimize, as well as replacing the equivalent in plugin_gen_inject and tcg_func_start. Cc: qemu-stable@nongnu.org Fixes: fb04ab7ddd8 ("tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2711 Reported-by: wannacu <wannacu2049@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-11-16accel/tcg: Fix user-only probe_access_internal plugin checkRichard Henderson1-1/+1
The acc_flag check for write should have been against PAGE_WRITE_ORG, not PAGE_WRITE. But it is better to combine two acc_flag checks to a single check against access_type. This matches the system code in cputlb.c. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2647 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: 20241111145002.144995-1-richard.henderson@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2024-10-31accel/tcg/icount-common: Remove the reference to the unused header fileHyman Huang1-1/+0
Signed-off-by: Hyman Huang <yong.huang@smartx.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/5e33b423d0b8506e5cb33fff42b50aa301b7731b.1729146786.git.yong.huang@smartx.com Signed-off-by: Peter Xu <peterx@redhat.com>
2024-10-24plugins: fix qemu_plugin_resetPierrick Bouvier1-0/+4
34e5e1 refactored the plugin context initialization. After this change, tcg_ctx->plugin_insn is not reset inconditionnally anymore, but only if one plugin at least is active. When uninstalling the last plugin active, we stopped reinitializing tcg_ctx->plugin_insn, which leads to memory callbacks being emitted. This results in an error as they don't appear in a plugin op sequence as expected. The correct fix is to make sure we reset plugin translation variables after current block translation ends. This way, we can catch any potential misuse of those after a given block, in more than fixing the current bug. Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2570 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Tested-by: Robbin Ehn <rehn@rivosinc.com> Message-Id: <20241015003819.984601-1-pierrick.bouvier@linaro.org> [AJB: trim patch version details from commit msg] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-19-alex.bennee@linaro.org>
generated by cgit v1.1 at 2025-09-20 11:56:54 +0000