Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-10-18 | cputlb: read CPUTLBEntry.addr_write atomically | Emilio G. Cota | 1 | -6/+6 |
2018-10-18 | tcg: Add tlb_index and tlb_entry helpers | Richard Henderson | 1 | -30/+34 |
2018-08-14 | accel/tcg: Pass read access type through to io_readx() | Peter Maydell | 1 | -4/+7 |
2018-07-02 | tcg: Define and use new tlb_hit() and tlb_hit_page() functions | Peter Maydell | 1 | -10/+6 |
2018-06-26 | tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE | Peter Maydell | 1 | -8/+16 |
2018-01-25 | accel/tcg: add size paremeter in tlb_fill() | Laurent Vivier | 1 | -6/+8 |
2017-10-20 | accel/tcg: allow to invalidate a write TLB entry immediately | David Hildenbrand | 1 | -2/+2 |
2017-09-17 | accel/tcg: move softmmu_template.h to accel/tcg/ | Thomas Huth | 1 | -0/+433 |