aboutsummaryrefslogtreecommitdiff
path: root/MAINTAINERS
AgeCommit message (Collapse)AuthorFilesLines
2020-09-23tests: add test-fdmon-epollStefan Hajnoczi1-0/+1
Test aio_disable_external(), which switches from fdmon-epoll back to fdmon-poll. This resulted in an assertion failure that was fixed in the previous patch. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20200915120339.702938-3-stefanha@redhat.com>
2020-09-23MAINTAINERS: add Stefan Hajnoczi as block/nvme.c maintainerStefan Hajnoczi1-1/+3
Development of the userspace NVMe block driver picked up again recently. After talking with Fam I am stepping up as block/nvme.c maintainer. Patches will be merged through my 'block' tree. Cc: Kevin Wolf <kwolf@redhat.com> Cc: Klaus Jensen <k.jensen@samsung.com> Cc: Fam Zheng <fam@euphon.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Kevin Wolf <kwolf@redhat.com> Acked-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Fam Zheng <fam@euphon.net> Message-id: 20200907111632.90499-1-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2020-09-14roms: Add virtual Boot ROM for NPCM7xx SoCsHavard Skinnemoen1-0/+2
This is a minimalistic boot ROM written specifically for use with QEMU. It supports loading the second-stage loader from SPI flash into RAM, SMP boot, and not much else. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200911052101.2602693-7-hskinnemoen@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-14hw/misc: Add NPCM7xx System Global Control Registers device modelHavard Skinnemoen1-0/+8
Implement a device model for the System Global Control Registers in the NPCM730 and NPCM750 BMC SoCs. This is primarily used to enable SMP boot (the boot ROM spins reading the SCRPAD register) and DDR memory initialization; other registers are best effort for now. The reset values of the MDLR and PWRON registers are determined by the SoC variant (730 vs 750) and board straps respectively. Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200911052101.2602693-2-hskinnemoen@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-13Merge remote-tracking branch ↵Peter Maydell1-0/+9
'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging This PR includes multiple fixes and features for RISC-V: - Fixes a bug in printing trap causes - Allows 16-bit writes to the SiFive test device. This fixes the failure to reboot the RISC-V virt machine - Support for the Microchip PolarFire SoC and Icicle Kit - A reafactor of RISC-V code out of hw/riscv # gpg: Signature made Thu 10 Sep 2020 19:08:06 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits) hw/riscv: Sort the Kconfig options in alphabetical order hw/riscv: Drop CONFIG_SIFIVE hw/riscv: Always build riscv_hart.c hw/riscv: Move sifive_test model to hw/misc hw/riscv: Move sifive_uart model to hw/char hw/riscv: Move riscv_htif model to hw/char hw/riscv: Move sifive_plic model to hw/intc hw/riscv: Move sifive_clint model to hw/intc hw/riscv: Move sifive_gpio model to hw/gpio hw/riscv: Move sifive_u_otp model to hw/misc hw/riscv: Move sifive_u_prci model to hw/misc hw/riscv: Move sifive_e_prci model to hw/misc hw/riscv: sifive_u: Connect a DMA controller hw/riscv: clint: Avoid using hard-coded timebase frequency hw/riscv: microchip_pfsoc: Hook GPIO controllers hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23 hw/net: cadence_gem: Add a new 'phy-addr' property hw/riscv: microchip_pfsoc: Connect a DMA controller hw/dma: Add SiFive platform DMA controller emulation ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/riscv/trace-events
2020-09-12Merge remote-tracking branch ↵Peter Maydell1-1/+2
'remotes/stsquad/tags/pull-testing-fixes-100920-1' into staging Various misc and testing fixes: - Expand CODING_STYLE.rst a little more - usb-host build fix - allow check-softfloat unit tests without TCG - simplify mips imm_branch so compiler isn't confused - mark ppc64abi32 for deprecation - more compiler soothing in pch_rev_id - allow acceptance to skip missing binaries - more a bunch of plugins to contrib # gpg: Signature made Thu 10 Sep 2020 10:51:05 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-fixes-100920-1: plugins: move the more involved plugins to contrib tests/acceptance: Add Test.fetch_asset(cancel_on_missing=True) tests: bump avocado version hw/i386: make explicit clearing of pch_rev_id configure: don't enable ppc64abi32-linux-user by default docs/system/deprecated: mark ppc64abi32-linux-user for deprecation target/mips: simplify gen_compute_imm_branch logic tests/meson.build: fp tests don't need CONFIG_TCG usb-host: restrict workaround to new libusb versions CODING_STYLE.rst: flesh out our naming conventions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-10plugins: move the more involved plugins to contribAlex Bennée1-1/+2
We have an exploding complexity problem in the testing so lets just move the more involved plugins into contrib. tests/plugins still exist for the basic plugins that exercise the API. We restore the old pre-meson style Makefile for contrib as it also doubles as a guide for out-of-tree plugin builds. While we are at it add some examples to the documentation and a specific plugins build target. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200909112742.25730-11-alex.bennee@linaro.org>
2020-09-09hw/char: Add Microchip PolarFire SoC MMUART emulationBin Meng1-0/+2
Microchip PolarFire SoC MMUART is ns16550 compatible, with some additional registers. Create a simple MMUART model built on top of the existing ns16550 model. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-6-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-09-09hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit boardBin Meng1-0/+7
This is an initial support for Microchip PolarFire SoC Icicle Kit. The Icicle Kit board integrates a PolarFire SoC, with one SiFive's E51 plus four U54 cores and many on-chip peripherals and an FPGA. For more details about Microchip PolarFire Soc, please see: https://www.microsemi.com/product-directory/soc-fpgas/5498-polarfire-soc-fpga Unlike SiFive FU540, the RISC-V core resect vector is at 0x20220000. The following perepherals are created as an unimplemented device: - Bus Error Uint 0/1/2/3/4 - L2 cache controller - SYSREG - MPUCFG - IOSCBCFG More devices will be added later. The BIOS image used by this machine is hss.bin, aka Hart Software Services, which can be built from: https://github.com/polarfire-soc/hart-software-services To launch this machine: $ qemu-system-riscv64 -nographic -M microchip-icicle-kit The memory is set to 1 GiB by default to match the hardware. A sanity check on ram size is performed in the machine init routine to prompt user to increase the RAM size to > 1 GiB when less than 1 GiB ram is detected. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-5-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-09-08codeconverter: script for automating QOM code cleanupsEduardo Habkost1-0/+5
This started as a simple script that scanned for regular expressions, but became more and more complex when exceptions to the rules were found. I don't know if this should be maintained in the QEMU source tree long term (maybe it can be reused for other code transformations that Coccinelle can't handle). In either case, this is included as part of the patch series to document how exactly the automated code transformations in the next patches were done. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200831210740.126168-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-07gitlab-ci: Add cross-compiling build testsThomas Huth1-0/+1
Now that we can use all our QEMU test containers in the gitlab-CI, we can easily add some jobs that test cross-compilation for various architectures. There is just only small ugliness: Since the shared runners on gitlab.com are single-threaded, we have to split each compilation job into two parts (--disable-user and --disable-system), and exclude some additional targets, to avoid that the jobs are running too long and hitting the timeout of 1 h. Message-Id: <20200823111757.72002-8-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-02MAINTAINERS: update nvme entryKeith Busch1-0/+2
The nvme emulated device development pace has increased recently. Klaus has offered to co-maintain, and since we have many new contributions coming through, we're adding a repository to accumulate and test new features. Cc: Klaus Jensen <its@irrelevant.dk> Acked-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-09-01docs/system/target-avr: Improve the AVR docs and add to MAINTAINERSThomas Huth1-0/+1
The examples look nicer when using "::" code blocks. Also mention that "-d in_asm" only outputs instructions that have not been translated by the JIT layer yet. And while we're at it, also add the AVR doc file to the MAINTAINERS file. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Rolnik <mrolnik@gmail.com> Message-Id: <20200812155304.18016-1-huth@tuxfamily.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-08-24docs/system/arm: Document the Xilinx Versal Virt boardEdgar E. Iglesias1-1/+2
Document the Xilinx Versal Virt board. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200803164749.301971-2-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-27MAINTAINERS: Cover the firmware JSON schemaPhilippe Mathieu-Daudé1-0/+8
Add an entry to cover firmware.json (see commit 3a0adfc9bf: schema that describes the different uses and properties of virtual machine firmware). Cc: Laszlo Ersek <lersek@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Kashyap Chamarthy <kchamart@redhat.com> Cc: Daniel P. Berrange <berrange@redhat.com> Suggested-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200703183450.32398-1-philmd@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-07-21MAINTAINERS: Extend the device fuzzing sectionThomas Huth1-0/+2
The file docs/devel/fuzzing.txt should be in this section, too, and add myself as a reviewer (since I often take the fuzzer patches through the qtest-next tree, I should be notified on patches, too). Message-Id: <20200721053926.17197-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-07-20docs/system: Document the arm virt boardPeter Maydell1-0/+1
Document the arm 'virt' board, which has been undocumented for far too long given that it is the main recommended board type for arm guests. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-5-peter.maydell@linaro.org
2020-07-20docs/system: Briefly document gumstix boardsPeter Maydell1-0/+1
Add skeletal documentation of the gumstix boards ('connex' and 'verdex'). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-4-peter.maydell@linaro.org
2020-07-20docs/system: Briefly document collie boardPeter Maydell1-0/+1
Add skeletal documentation of the collie board. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-3-peter.maydell@linaro.org
2020-07-20docs/system: Briefly document canon-a1100 boardPeter Maydell1-0/+1
Add skeletal documentation of the canon-a1100 board. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-2-peter.maydell@linaro.org
2020-07-17vvfat: set status to odd fixesPrasad J Pandit1-1/+1
Virtual VFAT driver is quite old and rarely used. Set its status to Odd Fixes. Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-Id: <20200710190451.761286-1-ppandit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-07-15Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20200714' ↵Peter Maydell1-0/+4
into staging MIPS patches for 5.1 - A pair of fixes, - Add Huacai Chen as MIPS KVM maintainer, - Add Jiaxun Yang as designated MIPS TCG reviewer. CI jobs results: . https://travis-ci.org/github/philmd/qemu/builds/708079271 . https://gitlab.com/philmd/qemu/-/pipelines/166528104 . https://cirrus-ci.com/build/6483996878045184 # gpg: Signature made Tue 14 Jul 2020 20:59:58 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-next-20200714: MAINTAINERS: Adjust MIPS maintainership (add Huacai Chen & Jiaxun Yang) target/mips: Fix ADD.S FPU instruction target/mips: Remove identical if/else branches Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-15Merge remote-tracking branch ↵Peter Maydell1-0/+1
'remotes/philmd-gitlab/tags/sdcard-CVE-2020-13253-pull-request' into staging Fix CVE-2020-13253 By using invalidated address, guest can do out-of-bounds accesses. These patches fix the issue by only allowing SD card image sizes power of 2, and not switching to SEND_DATA state when the address is invalid (out of range). This issue was found using QEMU fuzzing mode (using --enable-fuzzing, see docs/devel/fuzzing.txt) and reported by Alexander Bulekov. Reproducer: https://bugs.launchpad.net/qemu/+bug/1880822/comments/1 CI jobs results: . https://cirrus-ci.com/build/5157142548185088 . https://gitlab.com/philmd/qemu/-/pipelines/166381731 . https://travis-ci.org/github/philmd/qemu/builds/707956535 # gpg: Signature made Tue 14 Jul 2020 14:54:44 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/sdcard-CVE-2020-13253-pull-request: hw/sd/sdcard: Do not switch to ReceivingData if address is invalid hw/sd/sdcard: Update coding style to make checkpatch.pl happy hw/sd/sdcard: Do not allow invalid SD card sizes hw/sd/sdcard: Simplify realize() a bit hw/sd/sdcard: Restrict Class 6 commands to SCSD cards tests/acceptance/boot_linux: Expand SD card image to power of 2 tests/acceptance/boot_linux: Tag tests using a SD card with 'device:sd' docs/orangepi: Add instructions for resizing SD image to power of two MAINTAINERS: Cc qemu-block mailing list Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-14MAINTAINERS: Adjust MIPS maintainership (add Huacai Chen & Jiaxun Yang)Aleksandar Markovic1-0/+4
Huacai Chen and Jiaxun Yang step in as new energy [1]. Aurelien Jarno comment [2]: It happens that I known Huacai Chen from the time he was upstreaming the Loongson 3 support to the kernel, I have been testing and reviewing his patches. I also know Jiaxun Yang from the #debian-mips IRC channel. I know that they are both very competent and have a good knowledge of the open source world. I therefore agree that they are good additions to maintain and/or review the MIPS part of QEMU. [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg718434.html [2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg718738.html Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200701182559.28841-3-aleksandar.qemu.devel@gmail.com> PMD: [Split patch, added Aurelien's comment] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by: Huacai Chen <chenhc@lemote.com>
2020-07-14MAINTAINERS: Cc qemu-block mailing listPhilippe Mathieu-Daudé1-0/+1
We forgot to include the qemu-block mailing list while adding this section in commit 076a0fc32a7. Fix this. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200630133912.9428-2-f4bug@amsat.org>
2020-07-13MAINTAINERS: Add an entry for OpenSBI firmwareBin Meng1-0/+7
List me as the maintainer for OpenSBI firmware related files. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1593177220-28143-1-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-07-11Merge remote-tracking branch 'remotes/philmd-gitlab/tags/avr-port-20200711' ↵Peter Maydell1-0/+30
into staging 8bit AVR port from Michael Rolnik. Michael started to work on the AVR port few years ago [*] and kept improving the code over various series. List of people who help him (in chronological order): - Richard Henderson - Sarah Harris and Edward Robbins - Philippe Mathieu-Daudé and Aleksandar Markovic - Pavel Dovgalyuk - Thomas Huth [*] The oldest contribution I could find on the list is from 2016: https://lists.nongnu.org/archive/html/qemu-devel/2016-06/msg02985.html Tests included: $ avocado --show=app run -t arch:avr tests/acceptance/ Fetching asset from tests/acceptance/machine_avr6.py:AVR6Machine.test_freertos (1/1) tests/acceptance/machine_avr6.py:AVR6Machine.test_freertos: PASS (2.13 s) RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0 JOB TIME : 2.35 s $ make check-qtest-avr TEST check-qtest-avr: tests/qtest/boot-serial-test TEST check-qtest-avr: tests/qtest/cdrom-test TEST check-qtest-avr: tests/qtest/device-introspect-test TEST check-qtest-avr: tests/qtest/machine-none-test TEST check-qtest-avr: tests/qtest/qmp-test TEST check-qtest-avr: tests/qtest/qmp-cmd-test TEST check-qtest-avr: tests/qtest/qom-test TEST check-qtest-avr: tests/qtest/test-hmp TEST check-qtest-avr: tests/qtest/qos-test CI results: . https://cirrus-ci.com/build/5697049146425344 . https://gitlab.com/philmd/qemu/-/pipelines/165328058 . https://travis-ci.org/github/philmd/qemu/builds/705817933 . https://app.shippable.com/github/philmd/qemu/runs/822/summary/console # gpg: Signature made Sat 11 Jul 2020 10:03:11 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/avr-port-20200711: (32 commits) target/avr/disas: Fix store instructions display order target/avr/cpu: Fix $PC displayed address target/avr/cpu: Drop tlb_flush() in avr_cpu_reset() target/avr: Add section into QEMU documentation tests/acceptance: Test the Arduino MEGA2560 board tests/boot-serial: Test some Arduino boards (AVR based) hw/avr: Add limited support for some Arduino boards hw/avr: Add some ATmega microcontrollers hw/avr: Add support for loading ELF/raw binaries hw/misc: avr: Add limited support for power reduction device hw/timer: avr: Add limited support for 16-bit timer peripheral hw/char: avr: Add limited support for USART peripheral tests/machine-none: Add AVR support target/avr: Register AVR support with the rest of QEMU target/avr: Add support for disassembling via option '-d in_asm' target/avr: Initialize TCG register variables target/avr: Add instruction translation - CPU main translation function target/avr: Add instruction translation - MCU Control Instructions target/avr: Add instruction translation - Bit and Bit-test Instructions target/avr: Add instruction translation - Data Transfer Instructions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-11tests/acceptance: Test the Arduino MEGA2560 boardMichael Rolnik1-0/+1
The test is based on https://github.com/seharris/qemu-avr-tests/tree/master/free-rtos/Demo demo which. If working correctly, prints 'ABCDEFGHIJKLMNOPQRSTUVWX' out. it also demostrates that timer and IRQ are working As the path name demonstrates, the FreeRTOS tests target a board based on a ATMega2560 MCU. We have one, the Arduino MEGA2560. Complementary documentation: https://feilipu.me/2012/01/15/ethermega-arduino-mega-2560-and-freertos/ https://feilipu.me/2015/11/24/arduino_freertos/ (see 'Compatibility') Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash multiple avocado fixups from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-07-11hw/avr: Add limited support for some Arduino boardsPhilippe Mathieu-Daudé1-0/+6
Arduino boards are build with AVR chipsets. Add some of these boards: - Arduino Duemilanove - Arduino Uno - Arduino Mega For more information: https://www.arduino.cc/en/Main/Products https://store.arduino.cc/arduino-genuino/most-popular [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Joaquin de Andres <me@xcancerberox.com.ar> [thuth: sysbus_init_child_obj() ==> object_initialize_child()] Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-26-huth@tuxfamily.org>
2020-07-11hw/avr: Add support for loading ELF/raw binariesPhilippe Mathieu-Daudé1-0/+1
Add avr_load_firmware() function to load firmware in ELF or raw binary format. [AM: Corrected the type of the variable containing e_flags] [AM: Moved definition of e_flags conversion function to boot.c] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-24-huth@tuxfamily.org> [PMD: Replace load_image_targphys() by load_image_mr()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11hw/misc: avr: Add limited support for power reduction deviceMichael Rolnik1-0/+2
This is a simple device of just one register, and whenever this register is written to it calls qemu_set_irq function for each of 8 bits/IRQs. It is used to implement AVR Power Reduction. [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash include fix and file rename from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-22-huth@tuxfamily.org>
2020-07-11hw/timer: avr: Add limited support for 16-bit timer peripheralMichael Rolnik1-0/+2
These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Ed Robbins <E.J.C.Robbins@kent.ac.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash info mtree fixes and a file rename from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Use qemu_log_mask(LOG_UNIMP), replace goto by return] Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-21-huth@tuxfamily.org> [PMD: Check cpu-frequency-hz property in realize()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11hw/char: avr: Add limited support for USART peripheralMichael Rolnik1-0/+2
These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash I/O size fix and file rename from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-20-huth@tuxfamily.org>
2020-07-11target/avr: Register AVR support with the rest of QEMUMichael Rolnik1-0/+9
Add AVR related definitions into QEMU, make AVR support buildable. [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-23-huth@tuxfamily.org> [PMD: Fixed @avr tag in qapi/machine.json] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-10cpu-throttle: new module, extracted from cpus.cClaudio Fontana1-0/+1
move the vcpu throttling functionality into its own module. This functionality is not specific to any accelerator, and it is used currently by migration to slow down guests to try to have migrations converge, and by the cocoa MacOS UI to throttle speed. cpu-throttle contains the controls to adjust and inspect throttle settings, start (set) and stop vcpu throttling, and the throttling function itself that is run periodically on vcpus to make them take a nap. Execution of the throttling function on all vcpus is triggered by a timer, registered at module initialization. No functionality change. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20200629093504.3228-3-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10softmmu: move softmmu only files from rootClaudio Fontana1-6/+6
move arch_init, balloon, cpus, ioport, memory, memory_mapping, qtest. They are all specific to CONFIG_SOFTMMU. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200629093504.3228-2-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10MAINTAINERS: Cover the HAX accelerator stubPhilippe Mathieu-Daudé1-0/+1
Cover accel/stubs/hax-stub.c in the HAXM section. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10MAINTAINERS: Add an 'overall' entry for acceleratorsPhilippe Mathieu-Daudé1-0/+11
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10MAINTAINERS: Fix KVM path expansion globPhilippe Mathieu-Daudé1-1/+1
The KVM files has been moved from target-ARCH to the target/ARCH/ folder in commit fcf5ef2a. Fix the pathname expansion. Fixes: fcf5ef2a ("Move target-* CPU file into a target/ folder") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10MAINTAINERS: Add Cameron as HVF co-maintainerRoman Bolshakov1-0/+2
Similar patch was sent a while ago but got lost. While at it, add a status wiki page. Cc: Cameron Esfahani <dirty@apple.com> Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200624225850.16982-9-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/avr: CPU class: Add GDB supportMichael Rolnik1-0/+1
This includes GDB hooks for reading from wnd wrtiting to AVR registers, and xml register definition file as well. [AM: Split a larger AVR introduction patch into logical units] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Co-developed-by: Michael Rolnik <mrolnik@gmail.com> Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> [thuth: Fixed avr_cpu_gdb_read_register() parameter] Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-7-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-10target/avr: Add basic parameters of the new platformMichael Rolnik1-0/+6
This includes definitions of various basic parameters needed for integration of a new platform into QEMU. [AM: Split a larger AVR introduction patch into logical units] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Co-developed-by: Michael Rolnik <mrolnik@gmail.com> Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> [thuth: Simplify MAINTAINERS right from the start] Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-2-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-10scripts: Coccinelle script to use ERRP_GUARD()Vladimir Sementsov-Ogievskiy1-0/+1
Script adds ERRP_GUARD() macro invocations where appropriate and does corresponding changes in code (look for details in include/qapi/error.h) Usage example: spatch --sp-file scripts/coccinelle/errp-guard.cocci \ --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff \ --max-width 80 FILES... Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200707165037.1026246-3-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> [ERRP_AUTO_PROPAGATE() renamed to ERRP_GUARD(), and auto-propagated-errp.cocci to errp-guard.cocci]
2020-07-09Merge remote-tracking branch ↵Peter Maydell1-1/+1
'remotes/vivier2/tags/trivial-branch-for-5.1-pull-request' into staging trivial branch patches 20200707 # gpg: Signature made Tue 07 Jul 2020 11:52:06 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-5.1-pull-request: net/tap-solaris.c: Include qemu-common.h for TFR macro intel_iommu: "aw-bits" error message still refers to "x-aw-bits" util/qemu-option: Document the get_opt_value() function MAINTAINERS: Update Radoslaw Biernacki email address .mailmap: Update Alexander Graf email address trivial: Respect alphabetical order of .o files in Makefile.objs fix the prototype of muls64/mulu64 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-07Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-0/+18
virtio,acpi: features, fixes, cleanups. vdpa support virtio-mem support a handy script for disassembling acpi tables misc fixes and cleanups Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 07 Jul 2020 13:00:35 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (41 commits) vhost-vdpa: introduce vhost-vdpa net client vhost-vdpa: introduce vhost-vdpa backend vhost_net: introduce set_config & get_config vhost: implement vhost_force_iommu method vhost: introduce new VhostOps vhost_force_iommu vhost: implement vhost_vq_get_addr method vhost: introduce new VhostOps vhost_vq_get_addr vhost: implement vhost_dev_start method vhost: introduce new VhostOps vhost_dev_start vhost: check the existence of vhost_set_iotlb_callback virtio-pci: implement queue_enabled method virtio-bus: introduce queue_enabled method vhost_net: use the function qemu_get_peer net: introduce qemu_get_peer MAINTAINERS: add VT-d entry docs: vhost-user: add Virtio status protocol feature tests/acpi: remove stale allowed tables numa: Auto-enable NUMA when any memory devices are possible virtio-mem: Exclude unplugged memory during migration virtio-mem: Add trace events ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/arm/virt.c # hw/virtio/trace-events
2020-07-07Merge remote-tracking branch ↵Peter Maydell1-0/+1
'remotes/huth-gitlab/tags/pull-request-2020-07-06' into staging * Fuzzer fixes from Alexander * Clean-up patches for qtests, configure and mcf5206 * Sparc64 sun4u acceptance test # gpg: Signature made Mon 06 Jul 2020 08:34:14 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-07-06: tests/acceptance: Add a test for the sun4u sparc64 machine hw/m68k/mcf5206: Replace remaining hw_error()s by qemu_log_mask() configure / util: Auto-detect the availability of openpty() tests/qtest: Unify the test for the xenfv and xenpv machines fuzz: do not use POSIX shm for coverage bitmap fuzz: fix broken qtest check at rcu_disable_atfork Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-07MAINTAINERS: Update Radoslaw Biernacki email addressRadoslaw Biernacki1-1/+1
My Linaro account is no longer active and stop forwarding emails to me. Changing it to my current employer domain. Signed-off-by: Radoslaw Biernacki <rad@semihalf.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Leif Lindholm <leif@nuviainc.com> Message-Id: <20200512170704.9290-1-rad@semihalf.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-07-06Merge remote-tracking branch ↵Peter Maydell1-2/+1
'remotes/vivier2/tags/linux-user-for-5.1-pull-request' into staging linux-user pull request 2020-07-02 Update linux-user maintainer Improve strace output for some syscalls Display contents of ioctl() parameters Fix sparc64 flushw operation # gpg: Signature made Sat 04 Jul 2020 17:25:21 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-5.1-pull-request: MAINTAINERS: update linux-user maintainer linux-user: Add strace support for printing arguments of ioctl() linux-user: Add thunk argument types for SIOCGSTAMP and SIOCGSTAMPNS linux-user: Add strace support for printing arguments of fallocate() linux-user: Add strace support for printing arguments of chown()/lchown() linux-user: Add strace support for printing arguments of lseek() linux-user: Add strace support for printing argument of syscalls used for extended attributes linux-user: Add strace support for a group of syscalls linux-user: Extend strace support to enable argument printing after syscall execution linux-user: syscall: ioctls: support DRM_IOCTL_VERSION linux-user/sparc64: Fix the handling of window spill trap target/sparc: Translate flushw opcode Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-06tests/acceptance: Add a test for the sun4u sparc64 machineThomas Huth1-0/+1
We can use the image from the advent calendar 2018 to test the sun4u machine. It's not using the "QEMU advent calendar" string, so we can not use the do_test_advcal_2018() from boot_linux_console.py, thus let's also put it into a separate file to also be able to add an entry to the MAINTAINERS file. Message-Id: <20200704173519.26087-1-thuth@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-07-04MAINTAINERS: update linux-user maintainerRiku Voipio1-2/+1
I haven't been active for a while. Pass the maintainer hat forward to Laurent, who has done a stellar job filling in. Signed-off-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200702111636.25792-1-riku.voipio@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
generated by cgit v1.1 at 2025-01-26 06:10:26 +0000