| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-09-22 | tcg/s390x: Do not expand cmp_vec early | Richard Henderson | 1 | -74/+65 |
| 2024-09-22 | tcg/ppc: Do not expand cmp_vec early | Richard Henderson | 1 | -79/+90 |
| 2024-09-22 | tcg/i386: Do not expand cmpsel_vec early | Richard Henderson | 4 | -34/+52 |
| 2024-09-22 | tcg/i386: Do not expand cmp_vec early | Richard Henderson | 1 | -123/+100 |
| 2024-09-22 | tcg/i386: Split out tcg_out_vex_modrm_type | Richard Henderson | 1 | -23/+15 |
| 2024-09-22 | tcg: Export vec_gen_6 | Richard Henderson | 2 | -2/+4 |
| 2024-09-22 | tcg: Fix iteration step in 32-bit gvec operation | TANG Tiancheng | 1 | -1/+1 |
| 2024-09-22 | tcg: Propagate new TCGOp to add_as_label_use | Richard Henderson | 1 | -31/+32 |
| 2024-09-22 | tcg: Return TCGOp from tcg_gen_op[1-6] | Richard Henderson | 2 | -14/+21 |
| 2024-09-19 | Merge tag 'pull-target-arm-20240919' of https://git.linaro.org/people/pmaydel... | Peter Maydell | 15 | -1657/+1478 |
| 2024-09-19 | docs/devel: Remove nested-papr.txt | Peter Maydell | 1 | -119/+0 |
| 2024-09-19 | target/arm: Correct ID_AA64ISAR1_EL1 value for neoverse-v1 | Peter Maydell | 1 | -1/+1 |
| 2024-09-19 | kvm: Remove unreachable code in kvm_dirty_ring_reaper_thread() | Peter Maydell | 1 | -5/+1 |
| 2024-09-19 | kvm: Make 'mmap_size' be 'int' in kvm_init_vcpu(), do_kvm_destroy_vcpu() | Peter Maydell | 1 | -2/+2 |
| 2024-09-19 | tests: drop OpenBSD tests for aarch64/sbsa-ref | Marcin Juszkiewicz | 1 | -44/+0 |
| 2024-09-19 | tests: expand timeout information for aarch64/sbsa-ref | Marcin Juszkiewicz | 1 | -5/+10 |
| 2024-09-19 | tests: add FreeBSD tests for aarch64/sbsa-ref | Marcin Juszkiewicz | 1 | -1/+42 |
| 2024-09-19 | tests: use default cpu for aarch64/sbsa-ref | Marcin Juszkiewicz | 1 | -8/+10 |
| 2024-09-19 | hw/char/stm32l4x5_usart.c: Enable USART ACK bit response | Jacob Abrams | 2 | -1/+51 |
| 2024-09-19 | target/arm: Convert scalar [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree | Richard Henderson | 2 | -127/+63 |
| 2024-09-19 | target/arm: Convert vector [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree | Richard Henderson | 2 | -14/+186 |
| 2024-09-19 | target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree | Richard Henderson | 2 | -131/+128 |
| 2024-09-19 | target/arm: Widen NeonGenNarrowEnvFn return to 64 bits | Richard Henderson | 5 | -78/+93 |
| 2024-09-19 | target/arm: Convert VQSHL, VQSHLU to gvec | Richard Henderson | 6 | -110/+94 |
| 2024-09-19 | target/arm: Convert handle_scalar_simd_shli to decodetree | Richard Henderson | 2 | -35/+13 |
| 2024-09-19 | target/arm: Convert handle_scalar_simd_shri to decodetree | Richard Henderson | 2 | -70/+86 |
| 2024-09-19 | target/arm: Convert SHRN, RSHRN to decodetree | Richard Henderson | 2 | -48/+55 |
| 2024-09-19 | target/arm: Split out subroutines of handle_shri_with_rndacc | Richard Henderson | 1 | -56/+82 |
| 2024-09-19 | target/arm: Push tcg_rnd into handle_shri_with_rndacc | Richard Henderson | 1 | -26/+6 |
| 2024-09-19 | target/arm: Convert SSHLL, USHLL to decodetree | Richard Henderson | 2 | -44/+45 |
| 2024-09-19 | target/arm: Use {, s}extract in handle_vec_simd_wshli | Richard Henderson | 1 | -2/+5 |
| 2024-09-19 | target/arm: Convert handle_vec_simd_shli to decodetree | Richard Henderson | 2 | -30/+18 |
| 2024-09-19 | target/arm: Convert handle_vec_simd_shri to decodetree | Richard Henderson | 2 | -60/+89 |
| 2024-09-19 | target/arm: Fix whitespace near gen_srshr64_i64 | Richard Henderson | 1 | -1/+1 |
| 2024-09-19 | target/arm: Introduce gen_gvec_sshr, gen_gvec_ushr | Richard Henderson | 4 | -38/+27 |
| 2024-09-19 | target/arm: Convert MOVI, FMOV, ORR, BIC (vector immediate) to decodetree | Richard Henderson | 2 | -67/+59 |
| 2024-09-19 | target/arm: Convert FMOVI (scalar, immediate) to decodetree | Richard Henderson | 2 | -48/+30 |
| 2024-09-19 | target/arm: Convert FMAXNMV, FMINNMV, FMAXV, FMINV to decodetree | Richard Henderson | 2 | -123/+67 |
| 2024-09-19 | target/arm: Convert ADDV, *ADDLV, *MAXV, *MINV to decodetree | Richard Henderson | 2 | -91/+61 |
| 2024-09-19 | target/arm: Simplify do_reduction_op | Richard Henderson | 1 | -27/+13 |
| 2024-09-19 | target/arm: Convert UZP, TRN, ZIP to decodetree | Richard Henderson | 2 | -90/+77 |
| 2024-09-19 | target/arm: Convert TBL, TBX to decodetree | Richard Henderson | 2 | -33/+18 |
| 2024-09-19 | target/arm: Convert EXT to decodetree | Richard Henderson | 2 | -73/+53 |
| 2024-09-19 | target/arm: Use tcg_gen_extract2_i64 for EXT | Richard Henderson | 1 | -20/+3 |
| 2024-09-19 | target/arm: Use cmpsel in gen_sshl_vec | Richard Henderson | 1 | -5/+3 |
| 2024-09-19 | target/arm: Use cmpsel in gen_ushl_vec | Richard Henderson | 1 | -11/+8 |
| 2024-09-19 | target/arm: Replace tcg_gen_dupi_vec with constants in translate-sve.c | Richard Henderson | 1 | -79/+49 |
| 2024-09-19 | target/arm: Replace tcg_gen_dupi_vec with constants in gengvec.c | Richard Henderson | 1 | -24/+19 |
| 2024-09-18 | Merge tag 'qemu-macppc-20240918' of https://github.com/mcayland/qemu into sta... | Peter Maydell | 2 | -10/+0 |
| 2024-09-18 | Merge tag 'migration-20240917-pull-request' of https://gitlab.com/peterx/qemu... | Peter Maydell | 6 | -21/+28 |
