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2018-12-18qmp hmp: Make system_wakeup check wake-up support and run stateDaniel Henrique Barboza10-14/+33
The qmp/hmp command 'system_wakeup' is simply a direct call to 'qemu_system_wakeup_request' from vl.c. This function verifies if runstate is SUSPENDED and if the wake up reason is valid before proceeding. However, no error or warning is thrown if any of those pre-requirements isn't met. There is no way for the caller to differentiate between a successful wakeup or an error state caused when trying to wake up a guest that wasn't suspended. This means that system_wakeup is silently failing, which can be considered a bug. Adding error handling isn't an API break in this case - applications that didn't check the result will remain broken, the ones that check it will have a chance to deal with it. Adding to that, the commit before previous created a new QMP API called query-current-machine, with a new flag called wakeup-suspend-support, that indicates if the guest has the capability of waking up from suspended state. Although such guest will never reach SUSPENDED state and erroring it out in this scenario would suffice, it is more informative for the user to differentiate between a failure because the guest isn't suspended versus a failure because the guest does not have support for wake up at all. All this considered, this patch changes qmp_system_wakeup to check if the guest is capable of waking up from suspend, and if it is suspended. After this patch, this is the output of system_wakeup in a guest that does not have wake-up from suspend support (ppc64): (qemu) system_wakeup wake-up from suspend is not supported by this guest (qemu) And this is the output of system_wakeup in a x86 guest that has the support but isn't suspended: (qemu) system_wakeup Unable to wake up: guest is not in suspended state (qemu) Reported-by: Balamuruhan S <bala24@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20181205194701.17836-4-danielhb413@gmail.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-12-18qga: update guest-suspend-ram and guest-suspend-hybrid descriptionsDaniel Henrique Barboza1-6/+10
This patch updates the descriptions of 'guest-suspend-ram' and 'guest-suspend-hybrid' to mention that both commands relies now on the proper support for wake up from suspend, retrieved by the 'wakeup-suspend-support' attribute of the 'query-current-machine' QMP command. Reported-by: Balamuruhan S <bala24@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Message-Id: <20181205194701.17836-3-danielhb413@gmail.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-12-18qmp: query-current-machine with wakeup-suspend-supportDaniel Henrique Barboza5-0/+55
When issuing the qmp/hmp 'system_wakeup' command, what happens in a nutshell is: - qmp_system_wakeup_request set runstate to RUNNING, sets a wakeup_reason and notify the event - in the main_loop, all vcpus are paused, a system reset is issued, all subscribers of wakeup_notifiers receives a notification, vcpus are then resumed and the wake up QAPI event is fired Note that this procedure alone doesn't ensure that the guest will awake from SUSPENDED state - the subscribers of the wake up event must take action to resume the guest, otherwise the guest will simply reboot. At this moment, only the ACPI machines via acpi_pm1_cnt_init and xen_hvm_init have wake-up from suspend support. However, only the presence of 'system_wakeup' is required for QGA to support 'guest-suspend-ram' and 'guest-suspend-hybrid' at this moment. This means that the user/management will expect to suspend the guest using one of those suspend commands and then resume execution using system_wakeup, regardless of the support offered in system_wakeup in the first place. This patch creates a new API called query-current-machine [1], that holds a new flag called 'wakeup-suspend-support' that indicates if the guest supports wake up from suspend via system_wakeup. The machine is considered to implement wake-up support if a call to a new 'qemu_register_wakeup_support' is made during its init, as it is now being done inside acpi_pm1_cnt_init and xen_hvm_init. This allows for any other machine type to declare wake-up support regardless of ACPI state or wakeup_notifiers subscription, making easier for newer implementations that might have their own mechanisms in the future. This is the expected output of query-current-machine when running a x86 guest: {"execute" : "query-current-machine"} {"return": {"wakeup-suspend-support": true}} Running the same x86 guest, but with the --no-acpi option: {"execute" : "query-current-machine"} {"return": {"wakeup-suspend-support": false}} This is the output when running a pseries guest: {"execute" : "query-current-machine"} {"return": {"wakeup-suspend-support": false}} With this extra tool, management can avoid situations where a guest that does not have proper suspend/wake capabilities ends up in inconsistent state (e.g. https://github.com/open-power-host-os/qemu/issues/31). [1] the decision of creating the query-current-machine API is based on discussions in the QEMU mailing list where it was decided that query-target wasn't a proper place to store the wake-up flag, neither was query-machines because this isn't a static property of the machine object. This new API can then be used to store other dynamic machine properties that are scattered around the code ATM. More info at: https://lists.gnu.org/archive/html/qemu-devel/2018-05/msg04235.html Reported-by: Balamuruhan S <bala24@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20181205194701.17836-2-danielhb413@gmail.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-12-18qmp: Split ShutdownCause host-qmp into quit and system-resetDominik Csapak23-81/+83
It is interesting to know whether the shutdown cause was 'quit' or 'reset', especially when using "--no-reboot". In that case, a management layer can now determine if the guest wanted a reboot or shutdown, and can act accordingly. Changes the output of the reason in the iotests from 'host-qmp' to 'host-qmp-quit'. This does not break compatibility because the field was introduced in the same version. Signed-off-by: Dominik Csapak <d.csapak@proxmox.com> Message-Id: <20181205110131.23049-4-d.csapak@proxmox.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Commit message tweaked] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-12-18qmp: Add reason to SHUTDOWN and RESET eventsDominik Csapak23-79/+95
This makes it possible to determine what the exact reason was for a RESET or a SHUTDOWN. A management layer might need the specific reason of those events to determine which cleanups or other actions it needs to do. This patch also updates the iotests to the new expected output that includes the reason. Signed-off-by: Dominik Csapak <d.csapak@proxmox.com> Message-Id: <20181205110131.23049-3-d.csapak@proxmox.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Commit message tweaked] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-12-18qapi: Turn ShutdownCause into QAPI enumDominik Csapak2-20/+34
Needed so the patch after next can add ShutdownCause to QMP events SHUTDOWN and RESET. Signed-off-by: Dominik Csapak <d.csapak@proxmox.com> Message-Id: <20181205110131.23049-2-d.csapak@proxmox.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2018-12-17Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181216' into stagingPeter Maydell24-402/+462
- Remove retranslation remenents - Return success from patch_reloc - Preserve 32-bit values as zero-extended on x86_64 - Make bswap during memory ops as optional - Cleanup xxhash - Revert constant pooling for tcg/sparc/ # gpg: Signature made Mon 17 Dec 2018 03:25:21 GMT # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20181216: (33 commits) xxhash: match output against the original xxhash32 include: move exec/tb-hash-xx.h to qemu/xxhash.h exec: introduce qemu_xxhash{2,4,5,6,7} qht-bench: document -p flag tcg: Drop nargs from tcg_op_insert_{before,after} tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP tcg/optimize: Optimize bswap tcg: Clean up generic bswap64 tcg: Clean up generic bswap32 tcg/i386: Add setup_guest_base_seg for FreeBSD tcg/i386: Precompute all guest_base parameters tcg/i386: Assume 32-bit values are zero-extended tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct tcg/s390x: Return false on failure from patch_reloc tcg/ppc: Return false on failure from patch_reloc tcg/arm: Return false on failure from patch_reloc tcg/aarch64: Return false on failure from patch_reloc ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-17.shippable.yml: disable the win cross testsAlex Bennée1-4/+5
The pkg.mxe.cc package repositories have been down for the last two weeks causing the builds to fail when shippable re-builds the containers. This is really just a sticking plaster until we can get our own docker hub images properly setup so we can avoid having dependencies on external repos. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20181214151718.5041-1-alex.bennee@linaro.org Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-17xxhash: match output against the original xxhash32Emilio G. Cota1-4/+4
Change the order in which we extract a/b and c/d to match the output of the upstream xxhash32. Tested with: https://github.com/cota/xxhash/tree/qemu Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17include: move exec/tb-hash-xx.h to qemu/xxhash.hEmilio G. Cota4-6/+6
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17exec: introduce qemu_xxhash{2,4,5,6,7}Emilio G. Cota4-18/+39
Before moving them all to include/qemu/xxhash.h. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17qht-bench: document -p flagEmilio G. Cota1-0/+1
Which we forgot to do in bd224fce60 ("qht-bench: add -p flag to precompute hash values", 2018-09-26). Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg: Drop nargs from tcg_op_insert_{before,after}Emilio G. Cota3-10/+8
It's unused since 75e8b9b7aa0b95a761b9add7e2f09248b101a392. Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <20181209193749.12277-9-cota@braap.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITSAlistair Francis1-1/+1
Instead of hard coding 31 for the shift right use TCG_TARGET_REG_BITS - 1. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <7dfbddf7014a595150aa79011ddb342c3cc17ec3.1544648105.git.alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg: Add TCG_TARGET_HAS_MEMORY_BSWAPRichard Henderson9-2/+126
For now, defined universally as true, since we previously required backends to implement swapped memory operations. Future patches may now remove that support where it is onerous. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/optimize: Optimize bswapRichard Henderson1-0/+12
Somehow we forgot these operations, once upon a time. This will allow immediate stores to have their bswap optimized away. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg: Clean up generic bswap64Richard Henderson1-27/+20
Based on the only current user, Sparc: New code uses 2 constants that take 2 insns to load from constant pool, plus 13. Old code used 6 constants that took 1 or 2 insns to create, plus 21. The result is a new total of 17 vs an old total of 29. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg: Clean up generic bswap32Richard Henderson1-27/+27
Based on the only current user, Sparc: New code uses 1 constant that takes 2 insns to create, plus 8. Old code used 2 constants that took 2 insns to create, plus 9. The result is a new total of 10 vs an old total of 13. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Add setup_guest_base_seg for FreeBSDRichard Henderson1-0/+9
Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Precompute all guest_base parametersRichard Henderson1-61/+40
These values are constant between all qemu_ld/st invocations; there is no need to figure this out each time. If we cannot use a segment or an offset directly for guest_base, load the value into a register in the prologue. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Assume 32-bit values are zero-extendedRichard Henderson1-63/+40
We now have an invariant that all TCG_TYPE_I32 values are zero-extended, which means that we do not need to extend them again during qemu_ld/st, either explicitly via a separate tcg_out_ext32u or implicitly via P_ADDR32. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guestsRichard Henderson2-2/+9
This preserves the invariant that all TCG_TYPE_I32 values are zero-extended in the 64-bit host register. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_pathRichard Henderson1-5/+8
This helps preserve the invariant that all TCG_TYPE_I32 values are stored zero-extended in the 64-bit host registers. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Propagate is64 to tcg_out_qemu_ld_directRichard Henderson1-6/+7
This helps preserve the invariant that all TCG_TYPE_I32 values are stored zero-extended in the 64-bit host registers. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/s390x: Return false on failure from patch_relocRichard Henderson1-11/+23
This does require an extra two checks within the slow paths to replace the assert that we're moving. Also add two checks within existing functions that lacked any kind of assert for out of range branch. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/ppc: Return false on failure from patch_relocRichard Henderson1-11/+21
The reloc_pc{14,24}_val routines retain their asserts. Use these directly within the slow paths. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/arm: Return false on failure from patch_relocRichard Henderson1-6/+16
This does require an extra two checks within the slow paths to replace the assert that we're moving. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/aarch64: Return false on failure from patch_relocRichard Henderson1-16/+21
This does require an extra two checks within the slow paths to replace the assert that we're moving. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Return false on failure from patch_relocRichard Henderson1-2/+2
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg: Return success from patch_relocRichard Henderson9-11/+21
This will move the assert for success from within (subroutines of) patch_reloc into the callers. It will also let new code do something different when a relocation is out of range. For the moment, all backends are trivially converted to return true. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/mips: Remove retranslation codeRichard Henderson1-6/+1
There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/sparc: Remove retranslation codeRichard Henderson1-6/+2
There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/s390: Remove retranslation codeRichard Henderson1-8/+2
There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/ppc: Fold away "noaddr" branch routinesRichard Henderson1-18/+7
There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/arm: Fold away "noaddr" branch routinesRichard Henderson1-19/+3
There are one use apiece for these. There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/arm: Remove reloc_pc24_atomicRichard Henderson1-8/+0
It is unused since 3fb53fb4d12f2e7833bd1659e6013237b130ef20. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/aarch64: Fold away "noaddr" branch routinesRichard Henderson1-19/+2
There are one use apiece for these. There is no longer a need for preserving branch offset operands, as we no longer re-translate. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/aarch64: Remove reloc_pc26_atomicRichard Henderson1-12/+0
It is unused since b68686bd4bfeb70040b4099df993dfa0b4f37b03. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Move TCG_REG_CALL_STACK from define to enumRichard Henderson1-1/+1
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17tcg/i386: Always use %ebp for TCG_AREG0Richard Henderson1-6/+2
For x86_64, this can remove a REX prefix resulting in smaller code when manipulating globals of type i32, as we move them between backing store via cpu_env, aka TCG_AREG0. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-17target/sparc: Remove the constant poolRichard Henderson1-38/+9
Partially reverts ab20bdc1162. The 14-bit displacement that we allowed to reach the constant pool is not always sufficient. Retain the tb-relative addressing, as that is how most return values from the tb are computed. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-12-16Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into ↵Peter Maydell27-198/+287
staging miscellaneous patches: * checkpatch.pl: Enforce multiline comment syntax * Rename cpu_physical_memory_write_rom() to address_space_write_rom() * disas, monitor, elf_ops: Use address_space_read() to read memory * Remove load_image() in favour of load_image_size() * Fix some minor memory leaks in arm boards/devices * virt: fix broken indentation # gpg: Signature made Fri 14 Dec 2018 14:41:20 GMT # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-misc-20181214: (22 commits) virt: Fix broken indentation target/arm: Create timers in realize, not init tests/test-arm-mptimer: Don't leak string memory hw/sd/sdhci: Don't leak memory region in sdhci_sysbus_realize() hw/arm/mps2-tz.c: Free mscname string in make_dma() target/arm: Free name string in ARMCPRegInfo hashtable entries include/hw/loader.h: Document load_image_size() hw/core/loader.c: Remove load_image() device_tree.c: Don't use load_image() hw/block/tc58128.c: Don't use load_image() hw/i386/multiboot.c: Don't use load_image() hw/i386/pc.c: Don't use load_image() hw/pci/pci.c: Don't use load_image() hw/smbios/smbios.c: Don't use load_image() hw/ppc/ppc405_boards: Don't use load_image() hw/ppc/mac_newworld, mac_oldworld: Don't use load_image() elf_ops.h: Use address_space_write() to write memory monitor: Use address_space_read() to read memory disas.c: Use address_space_read() to read memory Rename cpu_physical_memory_write_rom() to address_space_write_rom() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-16Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell25-507/+671
Block layer patches: - qcow2: Decompression worker threads - dmg: lzfse compression support - file-posix: Simplify delegation to worker thread - Don't pass flags to bdrv_reopen_queue() - iotests: make 235 work on s390 (and others) # gpg: Signature made Fri 14 Dec 2018 10:55:09 GMT # gpg: using RSA key 7F09B272C88F2FD6 # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: (42 commits) block/mirror: add missing coroutine_fn annotations iotests: make 235 work on s390 (and others) block: Assert that flags are up-to-date in bdrv_reopen_prepare() block: Remove assertions from update_flags_from_options() block: Stop passing flags to bdrv_reopen_queue_child() block: Remove flags parameter from bdrv_reopen_queue() block: Clean up reopen_backing_file() in block/replication.c qemu-io: Put flag changes in the options QDict in reopen_f() block: Drop bdrv_reopen() block: Use bdrv_reopen_set_read_only() in the mirror driver block: Use bdrv_reopen_set_read_only() in external_snapshot_commit() block: Use bdrv_reopen_set_read_only() in qmp_change_backing_file() block: Use bdrv_reopen_set_read_only() in stream_start/complete() block: Use bdrv_reopen_set_read_only() in bdrv_commit() block: Use bdrv_reopen_set_read_only() in commit_start/complete() block: Use bdrv_reopen_set_read_only() in bdrv_backing_update_filename() block: Add bdrv_reopen_set_read_only() file-posix: Avoid aio_worker() for QEMU_AIO_IOCTL file-posix: Switch to .bdrv_co_ioctl file-posix: Remove paio_submit_co() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-16Merge remote-tracking branch 'remotes/kraxel/tags/usb-20181214-pull-request' ↵Peter Maydell4-16/+32
into staging usb: fixes for mtp, ehci, usb-host and pvusb (xen). # gpg: Signature made Fri 14 Dec 2018 10:38:33 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20181214-pull-request: usb-mtp: Limit filename to object information size usb-mtp: use O_NOFOLLOW and O_CLOEXEC. ehci: fix fetch qtd race usb-host: reset and close libusb_device_handle before qemu exit pvusb: set max grants only in initialise Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-15Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2018-12-13-v2' ↵Peter Maydell91-510/+1166
into staging QAPI patches for 2018-12-13 # gpg: Signature made Fri 14 Dec 2018 05:53:51 GMT # gpg: using RSA key 3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2018-12-13-v2: (32 commits) qapi: add conditions to REPLICATION type/commands on the schema qapi: add more conditions to SPICE qapi: add condition to variants documentation qapi: add 'If:' condition to struct members documentation qapi: add 'If:' condition to enum values documentation qapi: Add #if conditions to generated code members qapi: add 'if' to alternate members qapi: add 'if' to union members qapi: Add 'if' to implicit struct members qapi: add a dictionary form for TYPE qapi-events: add 'if' condition to implicit event enum qapi: add 'if' to enum members qapi: add a dictionary form with 'name' key for enum members qapi: improve reporting of unknown or missing keys qapi: factor out checking for keys tests: print enum type members more like object type members qapi: change enum visitor and gen_enum* to take QAPISchemaMember qapi: Do not define enumeration value explicitly qapi: break long lines at 'data' member qapi: rename QAPISchemaEnumType.values to .members ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-14Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into stagingPeter Maydell7-731/+9
Most notable change in this PR is the full removal of the "handle" fsdev backend. # gpg: Signature made Wed 12 Dec 2018 13:20:42 GMT # gpg: using RSA key 71D4D5E5822F73D6 # gpg: Good signature from "Greg Kurz <groug@kaod.org>" # gpg: aka "Gregory Kurz <gregory.kurz@free.fr>" # gpg: aka "[jpeg image of size 3330]" # Primary key fingerprint: B482 8BAF 9431 40CE F2A3 4910 71D4 D5E5 822F 73D6 * remotes/gkurz/tags/for-upstream: 9p: remove support for the "handle" backend xen/9pfs: use g_new(T, n) instead of g_malloc(sizeof(T) * n) 9p: use g_new(T, n) instead of g_malloc(sizeof(T) * n) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-14Merge remote-tracking branch ↵Peter Maydell34-286/+456
'remotes/pmaydell/tags/pull-target-arm-20181213' into staging target-arm queue: * Convert various devices from sysbus init to instance_init * Remove the now unused sysbus init support entirely * Allow AArch64 processors to boot from a kernel placed over 4GB * hw: arm: musicpal: drop TYPE_WM8750 in object_property_set_link() * versal: minor fixes to virtio-mmio instantation * arm: Implement the ARMv8.1-HPD extension * arm: Implement the ARMv8.2-AA32HPD extension * arm: Implement the ARMv8.1-LOR extension (as the trivial "no limited ordering regions provided" minimum) # gpg: Signature made Thu 13 Dec 2018 14:52:25 GMT # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20181213: (37 commits) target/arm: Implement the ARMv8.1-LOR extension target/arm: Use arm_hcr_el2_eff more places target/arm: Introduce arm_hcr_el2_eff target/arm: Implement the ARMv8.2-AA32HPD extension target/arm: Implement the ARMv8.1-HPD extension target/arm: Tidy scr_write target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el target/arm: Add SCR_EL3 bits up to ARMv8.5 target/arm: Add HCR_EL2 bits up to ARMv8.5 target/arm: Move id_aa64mmfr* to ARMISARegisters hw/arm: versal: Correct the nr of IRQs to 192 hw/arm: versal: Use IRQs 111 - 118 for virtio-mmio hw/arm: versal: Reduce number of virtio-mmio instances hw/arm: versal: Remove bogus virtio-mmio creation core/sysbus: remove the SysBusDeviceClass::init path xen_backend: remove xen_sysdev_init() function usb/tusb6010: Convert sysbus init function to realize function timer/puv3_ost: Convert sysbus init function to realize function timer/grlib_gptimer: Convert sysbus init function to realize function timer/etraxfs_timer: Convert sysbus init function to realize function ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-14virt: Fix broken indentationEduardo Habkost1-1/+1
I introduced indentation using tabs instead of spaces in another commit. Peter reported the problem, and I failed to fix that before sending my pull request. Reported-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20181212003147.29604-1-ehabkost@redhat.com Fixes: 951597607696 ("virt: Eliminate separate instance_init functions") Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-12-14target/arm: Create timers in realize, not initPeter Maydell1-8/+9
The timer_new() function allocates memory; this means that if we call it in the CPU's init method we would need to provide an instance_finalize method to free it. Defer the timer creation to the realize function instead. This fixes a memory leak spotted by clang LeakSanitizer when a CPU object is created for introspection. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181204132952.2601-6-peter.maydell@linaro.org
2018-12-14tests/test-arm-mptimer: Don't leak string memoryPeter Maydell1-84/+69
The test-arm-mptimer setup creates a lot of test names using g_strdup_printf() and never frees them. This is entirely harmless since it's one-shot test code, but it clutters up the output from clang's LeakSanitizer. Refactor to use a helper function so we can free the memory. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20181204132952.2601-5-peter.maydell@linaro.org