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2023-01-28x86: acpi: pcihp: clean up duplicate bridge_in_acpi assignmentIgor Mammedov1-1/+0
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-9-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28pci_bridge: remove whitespaceIgor Mammedov1-1/+0
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-8-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28tests: acpi: cleanup use_uefi argument usageIgor Mammedov1-20/+15
'use_uefi' is used for the flag is a part of 'test_data *data' argument that is passed to the same functions, which makes use_uefi argument redundant. Drop it and use 'data::uefi_*' directly, instead. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-7-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28tests: acpi: update expected blobsIgor Mammedov4-4/+0
add extra nested bridges/root ports to blobs so it would be posible to check how follow up patches would affect it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-6-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28tests: acpi: extend pcihp with nested bridgesIgor Mammedov1-4/+13
add nested bridges/root-ports to pcihp tests, to make sure follow up patches don't break nested enumeration of bridges in DSDT. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28tests: acpi: whitelist DSDT blobs for tests that use pci-bridgesIgor Mammedov1-0/+4
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28tests: acpi: cleanup arguments to make them more readableIgor Mammedov1-10/+7
no functional change Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28tests: qtest: print device_add error before failing testIgor Mammedov1-0/+4
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230112140312.3096331-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-28x86: don't let decompressed kernel image clobber setup_dataJason A. Donenfeld5-31/+59
The setup_data links are appended to the compressed kernel image. Since the kernel image is typically loaded at 0x100000, setup_data lives at `0x100000 + compressed_size`, which does not get relocated during the kernel's boot process. The kernel typically decompresses the image starting at address 0x1000000 (note: there's one more zero there than the compressed image above). This usually is fine for most kernels. However, if the compressed image is actually quite large, then setup_data will live at a `0x100000 + compressed_size` that extends into the decompressed zone at 0x1000000. In other words, if compressed_size is larger than `0x1000000 - 0x100000`, then the decompression step will clobber setup_data, resulting in crashes. Visually, what happens now is that QEMU appends setup_data to the kernel image: kernel image setup_data |--------------------------||----------------| 0x100000 0x100000+l1 0x100000+l1+l2 The problem is that this decompresses to 0x1000000 (one more zero). So if l1 is > (0x1000000-0x100000), then this winds up looking like: kernel image setup_data |--------------------------||----------------| 0x100000 0x100000+l1 0x100000+l1+l2 d e c o m p r e s s e d k e r n e l |-------------------------------------------------------------| 0x1000000 0x1000000+l3 The decompressed kernel seemingly overwriting the compressed kernel image isn't a problem, because that gets relocated to a higher address early on in the boot process, at the end of startup_64. setup_data, however, stays in the same place, since those links are self referential and nothing fixes them up. So the decompressed kernel clobbers it. Fix this by appending setup_data to the cmdline blob rather than the kernel image blob, which remains at a lower address that won't get clobbered. This could have been done by overwriting the initrd blob instead, but that poses big difficulties, such as no longer being able to use memory mapped files for initrd, hurting performance, and, more importantly, the initrd address calculation is hard coded in qboot, and it always grows down rather than up, which means lots of brittle semantics would have to be changed around, incurring more complexity. In contrast, using cmdline is simple and doesn't interfere with anything. The microvm machine has a gross hack where it fiddles with fw_cfg data after the fact. So this hack is updated to account for this appending, by reserving some bytes. Fixup-by: Michael S. Tsirkin <mst@redhat.com> Cc: x86@kernel.org Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Message-Id: <20221230220725.618763-1-Jason@zx2c4.com> Message-ID: <20230128061015-mutt-send-email-mst@kernel.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Eric Biggers <ebiggers@google.com> Tested-by: Mathias Krause <minipli@grsecurity.net>
2023-01-27intel-iommu: Document iova_treePeter Xu2-1/+63
It seems not super clear on when iova_tree is used, and why. Add a rich comment above iova_tree to track why we needed the iova_tree, and when we need it. Also comment for the map/unmap messages, on how they're used and implications (e.g. unmap can be larger than the mapped ranges). Suggested-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20230109193727.1360190-1-peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-27virtio-rng-pci: fix migration compat for vectorsDr. David Alan Gilbert1-0/+1
Fixup the migration compatibility for existing machine types so that they do not enable msi-x. Symptom: (qemu) qemu: get_pci_config_device: Bad config data: i=0x34 read: 84 device: 98 cmask: ff wmask: 0 w1cmask:0 qemu: Failed to load PCIDevice:config qemu: Failed to load virtio-rng:virtio qemu: error while loading state for instance 0x0 of device '0000:00:03.0/virtio-rng' qemu: load of migration failed: Invalid argument Note: This fix will break migration from 7.2->7.2-fixed with this patch bz: https://bugzilla.redhat.com/show_bug.cgi?id=2155749 Fixes: 9ea02e8f1 ("virtio-rng-pci: Allow setting nvectors, so we can use MSI-X") Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20230109105809.163975-1-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: David Daney <david.daney@fungible.com> Fixes: 9ea02e8f1 (&quot;virtio-rng-pci: Allow setting nvectors, so we can use MSI-X&quot;)<br> Signed-off-by: Dr. David Alan Gilbert &lt;<a href="mailto:dgilbert@redhat.com" target="_blank">dgilbert@redhat.com</a>&gt;<br> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-01-27hw/pci-host: Use register definitions from PCI standardPhilippe Mathieu-Daudé3-26/+15
No need to document magic values when the definition names from "standard-headers/linux/pci_regs.h" are self-explicit. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230105173702.56610-1-philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2023-01-27vhost-user: Correct a reference of TARGET_AARCH64Akihiko Odaki1-1/+1
Presumably TARGET_ARM_64 should be a mistake of TARGET_AARCH64. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20230109063130.81296-1-akihiko.odaki@daynix.com> Fixes: 27598393a2 ("Lift max memory slots limit imposed by vhost-user") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-27hw/acpi/acpi_dev_interface: Remove unused parameter from ↵Bernhard Beschow5-15/+9
AcpiDeviceIfClass::madt_cpu The only function ever assigned to AcpiDeviceIfClass::madt_cpu is pc_madt_cpu_entry() which doesn't use the AcpiDeviceIf parameter. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230121151941.24120-5-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-27hw/acpi/piix4: No need to #include "hw/southbridge/piix.h"Bernhard Beschow1-1/+0
hw/acpi/piix4 has its own header with its structure definition etc. Ammends commit 2bfd0845f0 'hw/acpi/piix4: move PIIX4PMState into separate piix4.h header'. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230121151941.24120-4-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-27hw/isa/isa-bus: Turn isa_build_aml() into qbus_build_aml()Bernhard Beschow8-24/+18
Frees isa-bus.c from implicit ACPI dependency. While at it, resolve open coding of qbus_build_aml() in piix3 and ich9. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230121151941.24120-3-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-27hw/i386/acpi-build: Remove unused attributesBernhard Beschow1-2/+0
Ammends commit 3db119da7915 'pc: acpi: switch to AML API composed DSDT'. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230121151941.24120-2-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-27shpc: disallow unplug when power indicator is blinkingVladimir Sementsov-Ogievskiy1-0/+7
Pressing attention button has special meaning when power indicator is blinking. Better just not do it. For example, trying to remove device immediately after hotplug leads to both commands succeded but device not actually unrealized. Same thing for PCIE hotplug was done in 81124b3c7a5dae "pcie: add power indicator blink check" Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Message-Id: <20221116214458.82090-1-vsementsov@yandex-team.ru> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-24Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into stagingPeter Maydell5-44/+42
Pull request # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmPO6D0ACgkQnKSrs4Gr # c8jU2wf+O+0JmsRUuCYera0eXA8YfZyFxa7+A5fy6izyNugJMmHx+Nse9IsvLqGo # pLTMnc0HH7lLG8ofX9M93M1BOT2a3f//CrZQimfWuPAlKWUkpuOGOepEwbBxt247 # DQAvxESjclZ9anVeSuKBmpz8u7S4H9AYuLupFh9bXZW0C+wgmbZp7Ak7+LNqcbaC # TwasPgbHVji6j9IuKo1yJfr2f2csjb2zpock1m5E/BRCQxomKdtdFGs4LcHdWqNR # NVBFc89SNDJknaihkgjxxXvDFjtb96DOQaI7UuFxhCfTae+gJMDIdoUoJoSpQh1j # dMQ8pKRR0zN7ndZg0ozxT7qxJPp6LA== # =Xju6 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 23 Jan 2023 20:04:13 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * tag 'block-pull-request' of https://gitlab.com/stefanha/qemu: block/blkio: Fix inclusion of required headers virtio-blk: simplify virtio_blk_dma_restart_cb() util/aio: Defer disabling poll mode as long as possible Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23block/blkio: Fix inclusion of required headersPeter Krempa1-0/+2
After recent header file inclusion rework the build fails when the blkio module is enabled: ../block/blkio.c: In function ‘blkio_detach_aio_context’: ../block/blkio.c:321:24: error: implicit declaration of function ‘bdrv_get_aio_context’; did you mean ‘qemu_get_aio_context’? [-Werror=implicit-function-declaration] 321 | aio_set_fd_handler(bdrv_get_aio_context(bs), | ^~~~~~~~~~~~~~~~~~~~ | qemu_get_aio_context ../block/blkio.c:321:24: error: nested extern declaration of ‘bdrv_get_aio_context’ [-Werror=nested-externs] ../block/blkio.c:321:24: error: passing argument 1 of ‘aio_set_fd_handler’ makes pointer from integer without a cast [-Werror=int-conversion] 321 | aio_set_fd_handler(bdrv_get_aio_context(bs), | ^~~~~~~~~~~~~~~~~~~~~~~~ | | | int In file included from /home/pipo/git/qemu.git/include/qemu/job.h:33, from /home/pipo/git/qemu.git/include/block/blockjob.h:30, from /home/pipo/git/qemu.git/include/block/block_int-global-state.h:28, from /home/pipo/git/qemu.git/include/block/block_int.h:27, from ../block/blkio.c:13: /home/pipo/git/qemu.git/include/block/aio.h:476:37: note: expected ‘AioContext *’ but argument is of type ‘int’ 476 | void aio_set_fd_handler(AioContext *ctx, | ~~~~~~~~~~~~^~~ ../block/blkio.c: In function ‘blkio_file_open’: ../block/blkio.c:821:34: error: passing argument 2 of ‘blkio_attach_aio_context’ makes pointer from integer without a cast [-Werror=int-conversion] 821 | blkio_attach_aio_context(bs, bdrv_get_aio_context(bs)); | ^~~~~~~~~~~~~~~~~~~~~~~~ | | | int Fix it by including 'block/block-io.h' which contains the required declarations. Fixes: e2c1c34f139f49ef909bb4322607fb8b39002312 Signed-off-by: Peter Krempa <pkrempa@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: 2bc956011404a1ab03342aefde0087b5b4762562.1674477350.git.pkrempa@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-01-23virtio-blk: simplify virtio_blk_dma_restart_cb()Stefan Hajnoczi3-38/+25
virtio_blk_dma_restart_cb() is tricky because the BH must deal with virtio_blk_data_plane_start()/virtio_blk_data_plane_stop() being called. There are two issues with the code: 1. virtio_blk_realize() should use qdev_add_vm_change_state_handler() instead of qemu_add_vm_change_state_handler(). This ensures the ordering with virtio_init()'s vm change state handler that calls virtio_blk_data_plane_start()/virtio_blk_data_plane_stop() is well-defined. Then blk's AioContext is guaranteed to be up-to-date in virtio_blk_dma_restart_cb() and it's no longer necessary to have a special case for virtio_blk_data_plane_start(). 2. Only blk_drain() waits for virtio_blk_dma_restart_cb()'s blk_inc_in_flight() to be decremented. The bdrv_drain() family of functions do not wait for BlockBackend's in_flight counter to reach zero. virtio_blk_data_plane_stop() relies on blk_set_aio_context()'s implicit drain, but that's a bdrv_drain() and not a blk_drain(). Note that virtio_blk_reset() already correctly relies on blk_drain(). If virtio_blk_data_plane_stop() switches to blk_drain() then we can properly wait for pending virtio_blk_dma_restart_bh() calls. Once these issues are taken care of the code becomes simpler. This change is in preparation for multiple IOThreads in virtio-blk where we need to clean up the multi-threading behavior. I ran the reproducer from commit 49b44549ace7 ("virtio-blk: On restart, process queued requests in the proper context") to check that there is no regression. Cc: Sergio Lopez <slp@redhat.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Emanuele Giuseppe Esposito <eesposit@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-id: 20221102182337.252202-1-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-01-23util/aio: Defer disabling poll mode as long as possibleChao Gao1-6/+15
When we measure FIO read performance (cache=writethrough, bs=4k, iodepth=64) in VMs, ~80K/s notifications (e.g., EPT_MISCONFIG) are observed from guest to qemu. It turns out those frequent notificatons are caused by interference from worker threads. Worker threads queue bottom halves after completing IO requests. Pending bottom halves may lead to either aio_compute_timeout() zeros timeout and pass it to try_poll_mode() or run_poll_handlers() returns no progress after noticing pending aio_notify() events. Both cause run_poll_handlers() to call poll_set_started(false) to disable poll mode. However, for both cases, as timeout is already zeroed, the event loop (i.e., aio_poll()) just processes bottom halves and then starts the next event loop iteration. So, disabling poll mode has no value but leads to unnecessary notifications from guest. To minimize unnecessary notifications from guest, defer disabling poll mode to when the event loop is about to be blocked. With this patch applied, FIO seq-read performance (bs=4k, iodepth=64, cache=writethrough) in VMs increases from 330K/s to 413K/s IOPS. Suggested-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Chao Gao <chao.gao@intel.com> Message-id: 20220710120849.63086-1-chao.gao@intel.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-01-23Merge tag 'pull-target-arm-20230123' of ↵Peter Maydell28-363/+486
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Widen cnthctl_el2 to uint64_t * Unify checking for M Main Extension in MRS/MSR * bitbang_i2c, versatile_i2c: code cleanups * SME: refactor SME SM/ZA handling * Fix physical address resolution for MTE * Fix in_debug path in S1_ptw_translate * Don't set EXC_RETURN.ES if Security Extension not present * Implement DBGCLAIM registers * Provide stubs for more external debug registers * Look up ARMCPRegInfo at runtime, not translate time # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmPOjQQZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3vreD/sGr7outToY4FSZ4GGpC1L6 # ZwF6kjmwED/8EVaGZxWOaL2/oNoEav2YSpzUbqCa79jUx5zFBE145zYknL/bZyjS # VLX9G2vFFCtwFQ9rc2wV/3JmTmMmSCnHqOZPMSVy5vrQKH6d41WFYZEvGpJmCgh6 # YWK4gnMqkuIHmSvxw+S6q9p/3jzPk7c3vy8eRcxp+AMnfSBkYu0kFXmr7yOwscRS # adT8GFrkj0our/HtYqvzclVzrxcCVF1pWrtrHK7ZSddmElIcztel+1/yQH3T6onj # aOyRj1WC3+0t9uKwUNTFSHkRUqMqr6XYvRF+cvpe5N7lbfVn57u2TwmPgUwYbZcg # 8Mbz+LRYENzTYZa59ACxJXXcG0BivXiTwyrFR8Ck0vakcWFAjDzxHOw9CgHkDwPs # Dd93b04esehIN7MY8/5CSkbx+8ey+YK+o7sofiDCMKcYwooM1Y+Ls21ZcjA5GH+n # SsXp93SgagndCydD0ftRUlDTtGL7dhzaGpRmYArjeWzOKBbAmv/WfQeH47p3bpaP # CB2RUjHzYobMGLO0yp9droOaVKqKKLtc7wGzxgJGx6j5FrN0lnCEMRrKrZJ57Q/q # z4VoRoo0I6Q994/mVanGqXx8cSucyl0Z3HbC633WvrnZXzoM7+7HlQLhpF+yd9+s # 4lHiw0rPgqXtwEfeMaESSQ== # =ubIU # -----END PGP SIGNATURE----- # gpg: Signature made Mon 23 Jan 2023 13:35:00 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20230123' of https://git.linaro.org/people/pmaydell/qemu-arm: (26 commits) target/arm: Look up ARMCPRegInfo at runtime target/arm: Reorg do_coproc_insn target/arm: provide stubs for more external debug registers target/arm: implement DBGCLAIM registers target/arm: Don't set EXC_RETURN.ES if Security Extension not present target/arm: Fix in_debug path in S1_ptw_translate target/arm: Fix physical address resolution for MTE target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr() target/arm/sme: Rebuild hflags in aarch64_set_svcr() target/arm/sme: Reset ZA state in aarch64_set_svcr() target/arm/sme: Reset SVE state in aarch64_set_svcr() target/arm/sme: Introduce aarch64_set_svcr() target/arm/sme: Rebuild hflags in set_pstate() helpers target/arm/sme: Reorg SME access handling in handle_msr_i() hw/i2c/versatile_i2c: Rename versatile_i2c -> arm_sbcon_i2c hw/i2c/versatile_i2c: Use ARM_SBCON_I2C() macro hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState hw/i2c/versatile_i2c: Drop useless casts from void * to pointer hw/i2c/bitbang_i2c: Convert DPRINTF() to trace events ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: Look up ARMCPRegInfo at runtimeRichard Henderson5-49/+95
Do not encode the pointer as a constant in the opcode stream. This pointer is specific to the cpu that first generated the translation, which runs into problems with both hot-pluggable cpus and user-only threads, as cpus are removed. It's also a potential correctness issue in the theoretical case of a slightly-heterogenous system, because if CPU 0 generates a TB and then CPU 1 executes it, CPU 1 will end up using CPU 0's hash table, which might have a wrong set of registers in it. (All our current systems are either completely homogenous, M-profile, or have CPUs sufficiently different that they wouldn't be sharing TBs anyway because the differences would show up in the TB flags, so the correctness issue is only theoretical, not practical.) Perform the lookup in either helper_access_check_cp_reg, or a new helper_lookup_cp_reg. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230106194451.1213153-3-richard.henderson@linaro.org [PMM: added note in commit message about correctness issue] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: Reorg do_coproc_insnRichard Henderson1-186/+186
Move the ri == NULL case to the top of the function and return. This allows the else to be removed and the code unindented. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20230106194451.1213153-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: provide stubs for more external debug registersEvgeny Iakovlev1-0/+21
Qemu doesn't implement Debug Communication Channel, as well as the rest of external debug interface. However, Microsoft Hyper-V in tries to access some of those registers during an EL2 context switch. Since there is no architectural way to not advertise support for external debug, provide RAZ/WI stubs for OSDTRRX_EL1, OSDTRTX_EL1 and OSECCR_EL1 registers in the same way the rest of DCM is currently done. Do account for access traps though with access_tda. Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230120155929.32384-3-eiakovlev@linux.microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: implement DBGCLAIM registersEvgeny Iakovlev2-0/+34
The architecture does not define any functionality for the CLAIM tag bits. So we will just keep the raw bits, as per spec. Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230120155929.32384-2-eiakovlev@linux.microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: Don't set EXC_RETURN.ES if Security Extension not presentPeter Maydell1-1/+1
In v7m_exception_taken(), for v8M we set the EXC_RETURN.ES bit if either the exception targets Secure or if the CPU doesn't implement the Security Extension. This is incorrect: the v8M Arm ARM specifies that the ES bit should be RES0 if the Security Extension is not implemented, and the pseudocode agrees. Remove the incorrect condition, so that we leave the ES bit 0 if the Security Extension isn't implemented. This doesn't have any guest-visible effects for our current set of emulated CPUs, because all our v8M CPUs implement the Security Extension; but it's worth fixing in case we add a v8M CPU without the extension in future. Reported-by: Igor Kotrasinski <i.kotrasinsk@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2023-01-23target/arm: Fix in_debug path in S1_ptw_translateRichard Henderson1-2/+2
During the conversion, the test against get_phys_addr_lpae got inverted, meaning that successful translations went to the 'failed' label. Cc: qemu-stable@nongnu.org Fixes: f3639a64f60 ("target/arm: Use softmmu tlbs for page table walking") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1417 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230114054605.2977022-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: Fix physical address resolution for MTERichard Henderson1-1/+1
Conversion to probe_access_full missed applying the page offset. Fixes: b8967ddf ("target/arm: Use probe_access_full for MTE") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1416 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230114031213.2970349-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr()Richard Henderson4-19/+5
Unify the two helper_set_pstate_{sm,za} in this function. Do not call helper_* functions from svcr_write. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-8-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm/sme: Rebuild hflags in aarch64_set_svcr()Richard Henderson4-19/+6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-7-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm/sme: Reset ZA state in aarch64_set_svcr()Richard Henderson2-12/+12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-6-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm/sme: Reset SVE state in aarch64_set_svcr()Richard Henderson5-19/+14
Move arm_reset_sve_state() calls to aarch64_set_svcr(). Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-5-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm/sme: Introduce aarch64_set_svcr()Richard Henderson5-4/+13
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-4-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm/sme: Rebuild hflags in set_pstate() helpersRichard Henderson2-1/+2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-3-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm/sme: Reorg SME access handling in handle_msr_i()Richard Henderson1-11/+13
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230112102436.1913-2-philmd@linaro.org Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org> [PMD: Split patch in multiple tiny steps] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/versatile_i2c: Rename versatile_i2c -> arm_sbcon_i2cPhilippe Mathieu-Daudé5-16/+17
This device model started with the Versatile board, named TYPE_VERSATILE_I2C, then ended up renamed TYPE_ARM_SBCON_I2C as per the official "ARM SBCon two-wire serial bus interface" description from: https://developer.arm.com/documentation/dui0440/b/programmer-s-reference/two-wire-serial-bus-interface--sbcon Use the latter name as a better description. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-6-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/versatile_i2c: Use ARM_SBCON_I2C() macroPhilippe Mathieu-Daudé1-6/+1
ARM_SBCON_I2C() macro and ArmSbconI2CState typedef are already declared via the QOM DECLARE_INSTANCE_CHECKER() macro in "hw/i2c/arm_sbcon_i2c.h". Drop the VERSATILE_I2C declarations from versatile_i2c.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2CPhilippe Mathieu-Daudé5-7/+6
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CStatePhilippe Mathieu-Daudé2-7/+6
In order to rename TYPE_VERSATILE_I2C as TYPE_ARM_SBCON_I2C (the formal ARM naming), start renaming its state. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/versatile_i2c: Drop useless casts from void * to pointerPhilippe Mathieu-Daudé1-2/+2
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/bitbang_i2c: Convert DPRINTF() to trace eventsPhilippe Mathieu-Daudé2-12/+10
Convert the remaining DPRINTF debug macro uses to tracepoints. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 20230111085016.44551-6-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/bitbang_i2c: Trace state changesPhilippe Mathieu-Daudé2-5/+31
Trace bitbang state machine changes with trace events. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 20230111085016.44551-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/bitbang_i2c: Change state calling bitbang_i2c_set_state() helperPhilippe Mathieu-Daudé1-8/+15
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 20230111085016.44551-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/bitbang_i2c: Remove unused dummy MemoryRegionPhilippe Mathieu-Daudé1-5/+2
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 20230111085016.44551-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23hw/i2c/bitbang_i2c: Define TYPE_GPIO_I2C in public headerPhilippe Mathieu-Daudé3-2/+4
Define TYPE_GPIO_I2C in the public "hw/i2c/bitbang_i2c.h" header and use it in hw/arm/musicpal.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 20230111085016.44551-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: Unify checking for M Main Extension in MRS/MSRDavid Reiss1-2/+20
BASEPRI, FAULTMASK, and their _NS equivalents only exist on devices with the Main Extension. However, the MRS instruction did not check this, and the MSR instruction handled it inconsistently (warning BASEPRI, but silently ignoring writes to BASEPRI_NS). Unify this behavior and always warn when reading or writing any of these registers if the extension is not present. Signed-off-by: David Reiss <dreiss@meta.com> Message-id: 167330628518.10497.13100425787268927786-0@git.sr.ht Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-23target/arm: Widen cnthctl_el2 to uint64_tRichard Henderson1-1/+1
This is a 64-bit register on AArch64, even if the high 44 bits are RES0. Because this is defined as ARM_CP_STATE_BOTH, we are asserting that the cpreg field is 64-bits. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1400 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230115171633.3171890-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-20Merge tag 'pull-riscv-to-apply-20230120' of ↵Peter Maydell24-536/+713
https://github.com/alistair23/qemu into staging Second RISC-V PR for QEMU 8.0 * riscv_htif: Support console output via proxy syscall * Cleanup firmware and device tree loading * Fix elen check when using vector extensions * add RISC-V OpenSBI boot test * Ensure we always follow MISA parsing * Fix up masking of vsip/vsie accesses * Trap on writes to stimecmp from VS when hvictl.VTI=1 * Introduce helper_set_rounding_mode_chkfrm # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAmPKRP0ACgkQIeENKd+X # cFTHTwgAkyRDxrLepvI0KNaT0+cUBh+3QFlJ5JRtVnDW+5R+3aGT72PTS7Migqoh # H3IFCB2mcSdQvyjj2jDFlrFd0oVIaqE0+bnhouS/4nHB5S/vmapHi4Mc74Vv1CMB # rgXScL+C5gDOH1I7XjqOb1FY5Vxqyhi3IzdIoj+0ysUrGmUkqx+ij/cfQL7jkH9Q # slNAkorgwgrTgMgkJ5RKd4cjyv35O4XKLAsgixVTfJ+WcxKmc/zaJOkNM/UDnmxK # k2+2P8bshZWtWscXbm3oMC5+2ow1QtFedEkhHqb4adkQIyolKL7P1TfMlCgMSvES # BKl0DUhqQ+7F77tik3GPy9spQ6LpTQ== # =ifFF # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Jan 2023 07:38:37 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * tag 'pull-riscv-to-apply-20230120' of https://github.com/alistair23/qemu: (37 commits) hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init() target/riscv: Remove helper_set_rod_rounding_mode target/riscv: Introduce helper_set_rounding_mode_chkfrm tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst target/riscv: Trap on writes to stimecmp from VS when hvictl.VTI=1 target/riscv: Fix up masking of vsip/vsie accesses hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix() hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id() hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus() hw/riscv/sifive_u.c: simplify create_fdt() hw/riscv/virt.c: simplify create_fdt() hw/riscv/spike.c: simplify create_fdt() target/riscv: Use TARGET_FMT_lx for env->mhartid target/riscv/cpu.c: do not skip misa logic in riscv_cpu_realize() target/riscv/cpu: set cpu->cfg in register_cpu_props() hw/riscv/boot.c: use MachineState in riscv_load_kernel() hw/riscv/boot.c: use MachineState in riscv_load_initrd() hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() hw/riscv/spike.c: load initrd right after riscv_load_kernel() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-02-01 07:42:29 +0000