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2020-11-04Merge remote-tracking branch ↵Peter Maydell30-373/+32
'remotes/philmd-gitlab/tags/mips-fixes-20201103' into staging MIPS patches queue - Removal of the 'r4k' machine (deprecated before 5.0) - Fix LGPL license text (Chetan Pant) - Support unaligned accesses on Loongson-3 (Huacai Chen) - Fix out-of-bound access in Loongson-3 embedded I/O interrupt controller (Alex Chen) CI jobs results: . https://cirrus-ci.com/build/6324890389184512 . https://gitlab.com/philmd/qemu/-/pipelines/211275262 . https://travis-ci.org/github/philmd/qemu/builds/741188958 # gpg: Signature made Tue 03 Nov 2020 17:30:30 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-fixes-20201103: target/mips: Add unaligned access support for MIPS64R6 and Loongson-3 target/mips: Fix Lesser GPL version number hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/write hw/mips/boston: Fix Lesser GPL version number hw/mips: Fix Lesser GPL version number hw/mips: Remove the 'r4k' machine Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03Update version for v5.2.0-rc0 releasev5.2.0-rc0Peter Maydell1-1/+1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03Merge remote-tracking branch ↵Peter Maydell27-127/+1180
'remotes/alistair/tags/pull-riscv-to-apply-20201103' into staging This series adds support for migration to RISC-V QEMU and expands the Microchip PFSoC to allow unmodified HSS and Linux boots. # gpg: Signature made Tue 03 Nov 2020 15:19:45 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20201103: target/riscv/csr.c : add space before the open parenthesis '(' hw/riscv: microchip_pfsoc: Hook the I2C1 controller hw/riscv: microchip_pfsoc: Correct DDR memory map hw/riscv: microchip_pfsoc: Map the reserved memory at address 0 hw/riscv: microchip_pfsoc: Connect the SYSREG module hw/misc: Add Microchip PolarFire SoC SYSREG module support hw/riscv: microchip_pfsoc: Connect the IOSCB module hw/misc: Add Microchip PolarFire SoC IOSCB module support hw/riscv: microchip_pfsoc: Connect DDR memory controller modules hw/misc: Add Microchip PolarFire SoC DDR Memory Controller support hw/riscv: microchip_pfsoc: Document where to look at the SoC memory maps target/riscv: Add sifive_plic vmstate target/riscv: Add V extension state description target/riscv: Add H extension state description target/riscv: Add PMP state description target/riscv: Add basic vmstate description of CPU target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit hw/riscv: virt: Allow passing custom DTB hw/riscv: sifive_u: Allow passing custom DTB Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell5-11/+25
Block layer patches: - iotests: Fix pylint/mypy warnings with Python 3.9 - qmp: fix aio_poll() assertion failure on Windows - Some minor fixes # gpg: Signature made Tue 03 Nov 2020 15:25:01 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: block/vvfat: Fix bad printf format specifiers iotests: Use Python 3 style super() iotests: Disable unsubscriptable-object in pylint iotests.py: Fix type check errors in wait_migration() qemu-img convert: Free @sn_opts in all error cases qmp: fix aio_poll() assertion failure on Windows Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03target/mips: Add unaligned access support for MIPS64R6 and Loongson-3Huacai Chen1-2/+2
MIPSR6 (not only MIPS32R6) processors support unaligned access in hardware, so set MO_UNALN in their default_tcg_memop_mask. Btw, new Loongson-3 (such as Loongson-3A4000) also support unaligned access, since both old and new Loongson-3 use the same binaries, we can simply set MO_UNALN for all Loongson-3 processors. Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1604053541-27822-3-git-send-email-chenhc@lemote.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03target/mips: Fix Lesser GPL version numberChetan Pant11-11/+11
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201016143509.26692-1-chetan4windows@gmail.com> [PMD: Split hw/ vs target/] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/writeAlexChen1-2/+2
According to the loongson spec (http://www.loongson.cn/uploadfile/cpu/3B1500/Loongson_3B1500_cpu_user_1.pdf) and the macro definition(#define R_PERCORE_ISR(x) (0x40 + 0x8 * x)), we know that the ISR size per CORE is 8, so here we need to divide (addr - R_PERCORE_ISR(0)) by 8, not 4. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <5FA12391.8090400@huawei.com> [PMD: Shortened subject] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/mips/boston: Fix Lesser GPL version numberChetan Pant4-4/+4
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201023122633.19466-1-chetan4windows@gmail.com> [PMD: Added hw/mips/ prefix in subject] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/mips: Fix Lesser GPL version numberChetan Pant6-6/+6
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201016143509.26692-1-chetan4windows@gmail.com> [PMD: Split hw/ vs target/] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/mips: Remove the 'r4k' machinePhilippe Mathieu-Daudé8-348/+7
We deprecated the support for the 'r4k' machine for the 5.0 release (commit d32dc61421), which means that our deprecation policy allows us to drop it in release 5.2. Remove the code. To repeat the rationale from the deprecation note: - this virtual machine has no specification - the Linux kernel dropped support for it 10 years ago Users are recommended to use the Malta board instead. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> ACKed-by: Peter Krempa <pkrempa@redhat.com> Message-Id: <20201102201311.2220005-1-f4bug@amsat.org>
2020-11-03block/vvfat: Fix bad printf format specifiersAlexChen1-5/+7
We should use printf format specifier "%u" instead of "%d" for argument of type "unsigned int". In addition, fix two error format problems found by checkpatch.pl: ERROR: space required after that ',' (ctx:VxV) + fprintf(stderr,"%s attributes=0x%02x begin=%u size=%d\n", ^ ERROR: line over 90 characters + fprintf(stderr, "%d, %s (%u, %d)\n", i, commit->path ? commit->path : "(null)", commit->param.rename.cluster, commit->action); Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Message-Id: <5FA12620.6030705@huawei.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03iotests: Use Python 3 style super()Kevin Wolf1-4/+4
pylint complains about the use of super with the current class and instance as arguments in VM.__init__(): iotests.py:546:8: R1725: Consider using Python 3 style super() without arguments (super-with-arguments) No reason not to follow the advice and make it happy, so let's do this. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201027163806.290960-4-kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03iotests: Disable unsubscriptable-object in pylintKevin Wolf1-0/+2
When run with Python 3.9, pylint incorrectly warns about things like Optional[foo] because it doesn't recognise Optional as unsubscriptable. This is a known pylint bug: https://github.com/PyCQA/pylint/issues/3882 Just disable this check to get rid of the warnings. Disabling this shouldn't make us miss any real bug because mypy also has a similar check ("... is not indexable"). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201027163806.290960-3-kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03iotests.py: Fix type check errors in wait_migration()Kevin Wolf1-0/+4
Commit 1847a4a8c20 clarified that event_wait() can return None (though only with timeout=0) and commit f12a282ff47 annotated it as returning Optional[QMPMessage]. Type checks in wait_migration() fail because of the unexpected optional return type: iotests.py:750: error: Value of type variable "Msg" of "log" cannot be "Optional[Dict[str, Any]]" iotests.py:751: error: Value of type "Optional[Dict[str, Any]]" is not indexable iotests.py:754: error: Value of type "Optional[Dict[str, Any]]" is not indexable Fortunately, the non-zero default timeout is used in the event_wait() call, so we can make mypy happy by just asserting this. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201027163806.290960-2-kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03qemu-img convert: Free @sn_opts in all error casesTuguoyi1-1/+1
@sn_opts is initialized at the beginning, so it should be deleted after jumping to the lable 'fail_getopt' Signed-off-by: Guoyi Tu <tu.guoyi@h3c.com> Message-Id: <6ff1c5d372944494be3932274f75485d@h3c.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03qmp: fix aio_poll() assertion failure on WindowsVolker Rümelin1-1/+7
Commit 9ce44e2ce2 "qmp: Move dispatcher to a coroutine" modified aio_poll() in util/aio-posix.c to avoid an assertion failure. This change is missing in util/aio-win32.c. Apply the changes to util/aio-posix.c to util/aio-win32.c too. This fixes an assertion failure on Windows whenever QEMU exits. $ ./qemu-system-x86_64.exe -machine pc,accel=tcg -display gtk ** ERROR:../qemu/util/aio-win32.c:337:aio_poll: assertion failed: (in_aio_context_home_thread(ctx)) Bail out! ERROR:../qemu/util/aio-win32.c:337:aio_poll: assertion failed: (in_aio_context_home_thread(ctx)) Fixes: 9ce44e2ce2 ("qmp: Move dispatcher to a coroutine") Signed-off-by: Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20201021064033.8600-1-vr_qemu@t-online.de> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03target/riscv/csr.c : add space before the open parenthesis '('Xinhao Zhang1-1/+1
Fix code style. Space required before the open parenthesis '('. Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com> Signed-off-by: Kai Deng <dengkai1@huawei.com> Reported-by: Euler Robot <euler.robot@huawei.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201030004815.4172849-1-zhangxinhao1@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Hook the I2C1 controllerBin Meng2-0/+7
The latest SD card image [1] released by Microchip ships a Linux kernel with built-in PolarFire SoC I2C driver support. The device tree file includes the description for the I2C1 node hence kernel tries to probe the I2C1 device during boot. It is enough to create an unimplemented device for I2C1 to allow the kernel to continue booting to the shell. [1] ftp://ftpsoc.microsemi.com/outgoing/core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic.gz Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-11-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Correct DDR memory mapBin Meng2-7/+48
When system memory is larger than 1 GiB (high memory), PolarFire SoC maps it at address 0x10_0000_0000. Address 0xC000_0000 and above is aliased to the same 1 GiB low memory with different cache attributes. At present QEMU maps the system memory contiguously from 0x8000_0000. This corrects the wrong QEMU logic. Note address 0x14_0000_0000 is the alias to the high memory, and even physical memory is only 1 GiB, the HSS codes still tries to probe the high memory alias address. It seems there is no issue on the real hardware, so we will have to take that into the consideration in our emulation. Due to this, we we increase the default system memory size to 1537 MiB (the minimum required high memory size by HSS) so that user gets notified an error when less than 1537 MiB is specified. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201101170538.3732-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Map the reserved memory at address 0Bin Meng2-1/+11
Somehow HSS needs to access address 0 [1] for the DDR calibration data which is in the chipset's reserved memory. Let's map it. [1] See the config_copy() calls in various places in ddr_setup() in the HSS source codes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-9-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Connect the SYSREG moduleBin Meng3-3/+9
Previously SYSREG was created as an unimplemented device. Now that we have a simple SYSREG module, connect it. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-8-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC SYSREG module supportBin Meng5-0/+144
This creates a minimum model for Microchip PolarFire SoC SYSREG module. It only implements the ENVM_CR register to tell guest software that eNVM is running at the configured divider rate. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Connect the IOSCB moduleBin Meng3-6/+12
Previously IOSCB_CFG was created as an unimplemented device. With the new IOSCB model, its memory range is already covered by the IOSCB hence remove the previous unimplemented device creation in the SoC codes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-6-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC IOSCB module supportBin Meng5-0/+298
This creates a model for PolarFire SoC IOSCB [1] module. It actually contains lots of sub-modules like various PLLs to control different peripherals. Only the mininum capabilities are emulated to make the HSS DDR memory initialization codes happy. Lots of sub-modules are created as an unimplemented devices. [1] PF_SoC_RegMap_V1_1/MPFS250T/mpfs250t_ioscb_memmap_dri.htm in https://www.microsemi.com/document-portal/doc_download/1244581-polarfire-soc-register-map Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-5-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Connect DDR memory controller modulesBin Meng3-0/+24
Connect DDR SGMII PHY module and CFG module to the PolarFire SoC. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-4-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC DDR Memory Controller supportBin Meng5-0/+278
The PolarFire SoC DDR Memory Controller mainly includes 2 modules, called SGMII PHY module and the CFG module, as documented in the chipset datasheet. This creates a single file that groups these 2 modules, providing the minimum functionalities that make the HSS DDR initialization codes happy. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-3-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Document where to look at the SoC memory mapsBin Meng1-0/+18
It is not easy to find out the memory map for a specific component in the PolarFire SoC as the information is scattered in different documents. Add some comments so that people can know where to get such information from the Microchip website. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-2-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add sifive_plic vmstateYifei Jiang2-1/+26
Add sifive_plic vmstate for supporting sifive_plic migration. Current vmstate framework only supports one structure parameter as num field to describe variable length arrays, so introduce num_enables. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-7-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add V extension state descriptionYifei Jiang1-0/+25
In the case of supporting V extension, add V extension description to vmstate_riscv_cpu. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-6-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add H extension state descriptionYifei Jiang1-0/+47
In the case of supporting H extension, add H extension description to vmstate_riscv_cpu. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-5-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add PMP state descriptionYifei Jiang3-11/+70
In the case of supporting PMP feature, add PMP state description to vmstate_riscv_cpu. 'vmstate_pmp_addr' and 'num_rules' could be regenerated by pmp_update_rule(). But there exists the problem of updating num_rules repeatedly in pmp_update_rule(). So here extracts pmp_update_rule_addr() and pmp_update_rule_nums() to update 'vmstate_pmp_addr' and 'num_rules' respectively. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-4-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add basic vmstate description of CPUYifei Jiang4-8/+81
Add basic CPU state description to the newly created machine.c Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-3-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unitYifei Jiang6-74/+41
mstatus/mstatush and vsstatus/vsstatush are two halved for RISCV32. This patch expands mstatus and vsstatus to uint64_t instead of target_ulong so that it can be saved as one unit and reduce some ifdefs in the code. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-2-jiangyifei@huawei.com
2020-11-03hw/riscv: virt: Allow passing custom DTBAnup Patel1-7/+20
Extend virt machine to allow passing custom DTB using "-dtb" command-line parameter. This will help users pass modified DTB to virt machine. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201022053225.2596110-2-anup.patel@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: sifive_u: Allow passing custom DTBAnup Patel1-8/+20
Extend sifive_u machine to allow passing custom DTB using "-dtb" command-line parameter. This will help users pass modified DTB or Linux SiFive DTB to sifive_u machine. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201022053225.2596110-1-anup.patel@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03Merge remote-tracking branch ↵Peter Maydell5-87/+152
'remotes/berrange-gitlab/tags/sock-next-pull-request' into staging - Fix inverted logic in abstract socket QAPI support - Only report abstract socket support in QAPI on Linux hosts - Expand test coverage - Misc other code cleanups # gpg: Signature made Tue 03 Nov 2020 14:00:53 GMT # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * remotes/berrange-gitlab/tags/sock-next-pull-request: sockets: Make abstract UnixSocketAddress depend on CONFIG_LINUX sockets: Bypass "replace empty @path" for abstract unix sockets char-socket: Fix qemu_chr_socket_address() for abstract sockets sockets: Fix socket_sockaddr_to_address_unix() for abstract sockets sockets: Fix default of UnixSocketAddress member @tight test-util-sockets: Test the complete abstract socket matrix test-util-sockets: Synchronize properly, don't sleep(1) test-util-sockets: Factor out test_socket_unix_abstract_one() test-util-sockets: Clean up SocketAddress construction test-util-sockets: Correct to set has_abstract, has_tight test-util-sockets: Plug file descriptor leak Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03sockets: Make abstract UnixSocketAddress depend on CONFIG_LINUXMarkus Armbruster5-19/+50
The abstract socket namespace is a non-portable Linux extension. An attempt to use it elsewhere should fail with ENOENT (the abstract address looks like a "" pathname, which does not resolve). We report this failure like Failed to connect socket abc: No such file or directory Tolerable, although ENOTSUP would be better. However, introspection lies: it has @abstract regardless of host support. Easy enough to fix: since Linux provides them since 2.2, 'if': 'defined(CONFIG_LINUX)' should do. The above failure becomes Parameter 'backend.data.addr.data.abstract' is unexpected I consider this an improvement. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03sockets: Bypass "replace empty @path" for abstract unix socketsMarkus Armbruster1-1/+1
unix_listen_saddr() replaces empty @path by unique value. It obtains the value by creating and deleting a unique temporary file with mkstemp(). This is racy, as the comment explains. It's also entirely undocumented as far as I can tell. Goes back to commit d247d25f18 "sockets: helper functions for qemu (Gerd Hoffman)", v0.10.0. Since abstract socket addresses have no connection with filesystem pathnames, making them up with mkstemp() seems inappropriate. Bypass the replacement of empty @path. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03char-socket: Fix qemu_chr_socket_address() for abstract socketsMarkus Armbruster1-2/+14
Commit 776b97d360 "qemu-sockets: add abstract UNIX domain socket support" neglected to update qemu_chr_socket_address(). It shows shows neither @abstract nor @tight. Fix that. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03sockets: Fix socket_sockaddr_to_address_unix() for abstract socketsMarkus Armbruster1-2/+12
Commit 776b97d360 "qemu-sockets: add abstract UNIX domain socket support" neglected to update socket_sockaddr_to_address_unix(). The function returns a non-abstract socket address for abstract sockets (wrong) with a null @path (also wrong; a non-optional QAPI str member must never be null). The null @path is due to confused code going back all the way to commit 17c55decec "sockets: add helpers for creating SocketAddress from a socket". Add the required special case, and simplify the confused code. Fixes: 776b97d3605ed0fc94443048fdf988c7725e38a9 Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03sockets: Fix default of UnixSocketAddress member @tightMarkus Armbruster3-5/+7
An optional bool member of a QAPI struct can be false, true, or absent. The previous commit demonstrated that socket_listen() and socket_connect() are broken for absent @tight, and indeed QMP chardev- add also defaults absent member @tight to false instead of true. In C, QAPI members are represented by two fields, has_MEMBER and MEMBER. We have: has_MEMBER MEMBER false true false true true true absent false false/ignore When has_MEMBER is false, MEMBER should be set to false on write, and ignored on read. For QMP, the QAPI visitors handle absent @tight by setting both @has_tight and @tight to false. unix_listen_saddr() and unix_connect_saddr() however use @tight only, disregarding @has_tight. This is wrong and means that absent @tight defaults to false whereas it should default to true. The same is true for @has_abstract, though @abstract defaults to false and therefore has the same behavior for all of QMP, HMP and CLI. Fix unix_listen_saddr() and unix_connect_saddr() to check @has_abstract/@has_tight, and to default absent @tight to true. However, this is only half of the story. HMP chardev-add and CLI -chardev so far correctly defaulted @tight to true, but defaults to false again with the above fix for HMP and CLI. In fact, the "tight" and "abstract" options now break completely. Digging deeper, we find that qemu_chr_parse_socket() also ignores @has_tight, leaving it false when it sets @tight. That is also wrong, but the two wrongs cancelled out. Fix qemu_chr_parse_socket() to set @has_tight and @has_abstract; writing testcases for HMP and CLI is left for another day. Fixes: 776b97d3605ed0fc94443048fdf988c7725e38a9 Reported-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03test-util-sockets: Test the complete abstract socket matrixMarkus Armbruster1-26/+65
The test covers only two out of nine combinations. Test all nine. Four turn out to be broken. Marked /* BUG */. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03test-util-sockets: Synchronize properly, don't sleep(1)Markus Armbruster1-27/+13
The abstract sockets test spawns a thread to listen and accept, and a second one to connect, with a sleep(1) in between to "ensure" the former is listening when the latter tries to connect. Review fail. Risks spurious test failure, say when a heavily loaded machine doesn't schedule the first thread quickly enough. It's also slow. Listen and accept in the main thread, and start the connect thread in between. Look ma, no sleep! Run time drops from 2s wall clock to a few milliseconds. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03test-util-sockets: Factor out test_socket_unix_abstract_one()Markus Armbruster1-28/+20
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03test-util-sockets: Clean up SocketAddress constructionMarkus Armbruster1-38/+26
The thread functions build the SocketAddress from global variable @abstract_sock_name and the tight flag passed as pointer argument (either NULL or (gpointer)1). There is no need for such hackery; simply pass the SocketAddress instead. While there, dumb down g_rand_int_range() to g_random_int(). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03test-util-sockets: Correct to set has_abstract, has_tightMarkus Armbruster1-0/+4
The code tested doesn't care, which is a bug I will fix shortly. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03test-util-sockets: Plug file descriptor leakMarkus Armbruster1-0/+1
Fixes: 4d3a329af59ef8acd076f99f05e82531d8129b34 Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-03Merge remote-tracking branch ↵Peter Maydell6-41/+1106
'remotes/mdroth/tags/qga-pull-2020-10-27-v3-tag' into staging qemu-ga patch queue for soft-freeze * add guest-get-disks for w32/linux * add guest-{add,remove,get}-authorized-keys * fix API violations and schema documentation inconsistencies with recently-added guest-get-devices v3: - fix checkpatch errors regarding disallowed usages of g_assert* macros and other warnings v2: - fix BSD build error due to missing stub for guest_get_disks - fix clang build error on linux due to unused variable - disable qga-ssh-test for now due to a memory leak within GLib when G_TEST_OPTION_ISOLATE_DIRS is passed to g_test_init() since it break Gitlab CI build-oss-fuzz test - rebased and re-tested on master # gpg: Signature made Tue 03 Nov 2020 02:30:50 GMT # gpg: using RSA key CEACC9E15534EBABB82D3FA03353C9CEF108B584 # gpg: issuer "michael.roth@amd.com" # gpg: Good signature from "Michael Roth <flukshun@gmail.com>" [full] # gpg: aka "Michael Roth <mdroth@utexas.edu>" [full] # gpg: aka "Michael Roth <mdroth@linux.vnet.ibm.com>" [full] # Primary key fingerprint: CEAC C9E1 5534 EBAB B82D 3FA0 3353 C9CE F108 B584 * remotes/mdroth/tags/qga-pull-2020-10-27-v3-tag: qga: add ssh-get-authorized-keys meson: minor simplification qga: add *reset argument to ssh-add-authorized-keys qga: add ssh-{add,remove}-authorized-keys glib-compat: add g_unix_get_passwd_entry_qemu() qga: add implementation of guest-get-disks for Windows qga: add implementation of guest-get-disks for Linux qga: add command guest-get-disks qga: Flatten simple union GuestDeviceId qga-win: Fix guest-get-devices error API violations qga: Use common time encoding for guest-get-devices 'driver-date' qga: Rename guest-get-devices return member 'address' to 'id' Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03Merge remote-tracking branch ↵Peter Maydell17-486/+581
'remotes/pmaydell/tags/pull-target-arm-20201102' into staging target-arm queue: * target/arm: Fix Neon emulation bugs on big-endian hosts * target/arm: fix handling of HCR.FB * target/arm: fix LORID_EL1 access check * disas/capstone: Fix monitor disassembly of >32 bytes * hw/arm/smmuv3: Fix potential integer overflow (CID 1432363) * hw/arm/boot: fix SVE for EL3 direct kernel boot * hw/display/omap_lcdc: Fix potential NULL pointer dereference * hw/display/exynos4210_fimd: Fix potential NULL pointer dereference * target/arm: Get correct MMU index for other-security-state * configure: Test that gio libs from pkg-config work * hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work * docs: Fix building with Sphinx 3 * tests/qtest/npcm7xx_rng-test: Disable randomness tests # gpg: Signature made Mon 02 Nov 2020 17:09:00 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201102: (26 commits) tests/qtest/npcm7xx_rng-test: Disable randomness tests qemu-option-trace.rst.inc: Don't use option:: markup scripts/kerneldoc: For Sphinx 3 use c:macro for macros with arguments hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work configure: Test that gio libs from pkg-config work target/arm: Get correct MMU index for other-security-state hw/display/exynos4210_fimd: Fix potential NULL pointer dereference hw/display/omap_lcdc: Fix potential NULL pointer dereference hw/arm/boot: fix SVE for EL3 direct kernel boot hw/arm/smmuv3: Fix potential integer overflow (CID 1432363) disas/capstone: Fix monitor disassembly of >32 bytes target/arm: fix LORID_EL1 access check target/arm: fix handling of HCR.FB target/arm: Fix VUDOT/VSDOT (scalar) on big-endian hosts target/arm: Fix float16 pairwise Neon ops on big-endian hosts target/arm: Improve do_prewiden_3d target/arm: Simplify do_long_3d and do_2scalar_long target/arm: Rename neon_load_reg64 to vfp_load_reg64 target/arm: Add read/write_neon_element64 target/arm: Rename neon_load_reg32 to vfp_load_reg32 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-02qga: add ssh-get-authorized-keysMarc-André Lureau3-2/+106
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> *fix-up merge conflicts due to qga-ssh-test being disabled in earlier patch due to G_TEST_OPTION_ISOLATE_DIRS triggering build-oss-fuzz leak detector. *fix up style and disallowed g_assert* usage reported by checkpatch Signed-off-by: Michael Roth <michael.roth@amd.com>
generated by cgit v1.1 at 2024-08-22 14:32:05 +0000