riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-10-08	macfb: add common monitor modes supported by the MacOS toolbox ROM	Mark Cave-Ayland	4	-21/+156
2021-10-08	macfb: add qdev property to specify display type	Mark Cave-Ayland	3	-1/+12
2021-10-08	macfb: implement mode sense to allow display type to be detected	Mark Cave-Ayland	3	-2/+137
2021-10-08	macfb: add trace events for reading and writing the control registers	Mark Cave-Ayland	2	-1/+11
2021-10-08	macfb: use memory_region_init_ram() in macfb_common_realize() for the framebu...	Mark Cave-Ayland	1	-3/+2
2021-10-08	macfb: fix overflow of color_palette array	Mark Cave-Ayland	1	-1/+3
2021-10-08	macfb: fix invalid object reference in macfb_common_realize()	Mark Cave-Ayland	1	-1/+1
2021-10-08	macfb: update macfb.c to use the Error API best practices	Mark Cave-Ayland	1	-8/+8
2021-10-08	macfb: handle errors that occur during realize	Mark Cave-Ayland	1	-0/+11
2021-10-07	Merge remote-tracking branch 'remotes/vsementsov/tags/pull-jobs-2021-10-07-v2...	Richard Henderson	12	-92/+316
2021-10-07	Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-202...	Richard Henderson	15	-479/+516
2021-10-07	iotests: Add mirror-ready-cancel-error test	Hanna Reitz	2	-0/+148
2021-10-07	mirror: Do not clear .cancelled	Hanna Reitz	2	-3/+3
2021-10-07	mirror: Stop active mirroring after force-cancel	Hanna Reitz	1	-0/+2
2021-10-07	mirror: Check job_is_cancelled() earlier	Hanna Reitz	1	-5/+5
2021-10-07	mirror: Use job_is_cancelled()	Hanna Reitz	1	-1/+1
2021-10-07	job: Add job_cancel_requested()	Hanna Reitz	3	-9/+23
2021-10-07	job: Do not soft-cancel after a job is done	Hanna Reitz	1	-4/+21
2021-10-07	jobs: Give Job.force_cancel more meaning	Hanna Reitz	4	-9/+35
2021-10-07	job: @force parameter for job_cancel_sync()	Hanna Reitz	7	-50/+50
2021-10-07	job: Force-cancel jobs in a failed transaction	Hanna Reitz	1	-1/+6
2021-10-07	mirror: Drop s->synced	Hanna Reitz	1	-10/+9
2021-10-07	mirror: Keep s->synced on error	Hanna Reitz	1	-1/+0
2021-10-07	job: Context changes in job_completed_txn_abort()	Hanna Reitz	1	-5/+17
2021-10-07	hw/riscv: shakti_c: Mark as not user creatable	Alistair Francis	1	-0/+7
2021-10-07	hw/dma: sifive_pdma: Don't run DMA when channel is disclaimed	Bin Meng	1	-2/+9
2021-10-07	hw/dma: sifive_pdma: Fix Control.claim bit detection	Bin Meng	1	-1/+1
2021-10-07	hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART	Philippe Mathieu-Daudé	2	-16/+93
2021-10-07	hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion container	Philippe Mathieu-Daudé	2	-3/+9
2021-10-07	hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definition	Philippe Mathieu-Daudé	2	-8/+10
2021-10-07	hw/char: sifive_uart: Register device in 'input' category	Bin Meng	1	-0/+1
2021-10-07	hw/char: shakti_uart: Register device in 'input' category	Bin Meng	1	-0/+1
2021-10-07	hw/char: ibex_uart: Register device in 'input' category	Bin Meng	1	-0/+1
2021-10-07	target/riscv: Set mstatus_hs.[SD\|FS] bits if Clean and V=1 in mark_fs_dirty()	Frank Chang	2	-13/+21
2021-10-07	disas/riscv: Add Zb[abcs] instructions	Philipp Tomsich	1	-3/+154
2021-10-07	target/riscv: Remove RVB (replaced by Zb[abcs])	Philipp Tomsich	3	-33/+0
2021-10-07	target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh	Philipp Tomsich	2	-77/+21
2021-10-07	target/riscv: Add rev8 instruction, removing grev/grevi	Philipp Tomsich	4	-79/+15
2021-10-07	target/riscv: Add a REQUIRE_32BIT macro	Philipp Tomsich	1	-0/+6
2021-10-07	target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci	Philipp Tomsich	4	-55/+18
2021-10-07	target/riscv: Reassign instructions to the Zbb-extension	Philipp Tomsich	2	-41/+50
2021-10-07	target/riscv: Add instructions of the Zbc-extension	Philipp Tomsich	4	-1/+65
2021-10-07	target/riscv: Reassign instructions to the Zbs-extension	Philipp Tomsich	2	-18/+24
2021-10-07	target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B)	Philipp Tomsich	2	-78/+0
2021-10-07	target/riscv: Remove the W-form instructions from Zbs	Philipp Tomsich	2	-63/+0
2021-10-07	target/riscv: Reassign instructions to the Zba-extension	Philipp Tomsich	2	-13/+23
2021-10-07	target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties	Philipp Tomsich	2	-0/+8
2021-10-07	target/riscv: clwz must ignore high bits (use shift-left & changed logic)	Philipp Tomsich	1	-3/+5
2021-10-07	target/riscv: fix clzw implementation to operate on arg1	Philipp Tomsich	1	-1/+1
2021-10-07	target/riscv: Introduce temporary in gen_add_uw()	Philipp Tomsich	1	-2/+4