index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
Files
Lines
2021-02-25
scsi: introduce scsi_sense_from_errno()
Paolo Bonzini
3
-47
/
+51
2021-02-25
scsi-disk: do not complete requests early for rerror/werror=ignore
Paolo Bonzini
1
-2
/
+1
2021-02-25
scsi-disk: move scsi_handle_rw_error earlier
Paolo Bonzini
1
-85
/
+83
2021-02-25
virtio-scsi: don't process IO on fenced dataplane
Maxim Levitsky
1
-9
/
+15
2021-02-25
scsi: allow user to set werror as report
Zihao Chang
1
-1
/
+2
2021-02-25
scsi: add tracing for SG_IO commands
Hannes Reinecke
3
-2
/
+13
2021-02-25
scsi: make io_timeout configurable
Hannes Reinecke
3
-9
/
+18
2021-02-25
multiprocess: move feature to meson_options.txt
Paolo Bonzini
3
-11
/
+14
2021-02-25
configure: fix --enable-fuzzing linker failures
Alexander Bulekov
1
-0
/
+10
2021-02-25
hvf: Sign the code after installation
Akihiko Odaki
2
-7
/
+22
2021-02-21
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into ...
Peter Maydell
21
-420
/
+710
2021-02-21
vt82c686: Fix superio_cfg_{read,write}() functions
BALATON Zoltan
1
-5
/
+6
2021-02-21
vt82c686: Log superio_cfg unimplemented accesses
BALATON Zoltan
1
-0
/
+3
2021-02-21
vt82c686: Simplify by returning earlier
BALATON Zoltan
1
-6
/
+3
2021-02-21
vt82c686: Reduce indentation by returning early
BALATON Zoltan
1
-24
/
+23
2021-02-21
vt82c686: Remove index field of SuperIOConfig
BALATON Zoltan
1
-7
/
+14
2021-02-21
vt82c686: Move creation of ISA devices to the ISA bridge
BALATON Zoltan
2
-24
/
+25
2021-02-21
vt82c686: Simplify vt82c686b_realize()
BALATON Zoltan
1
-14
/
+6
2021-02-21
vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on it
BALATON Zoltan
3
-29
/
+59
2021-02-21
vt82c686: Set user_creatable=false for VT82C686B_PM
BALATON Zoltan
1
-1
/
+2
2021-02-21
vt82c686: Fix up power management io base and config
BALATON Zoltan
1
-10
/
+12
2021-02-21
vt82c686: Correctly reset all registers to default values on reset
BALATON Zoltan
1
-4
/
+4
2021-02-21
vt82c686: Correct vt82c686-pm I/O size
BALATON Zoltan
1
-1
/
+1
2021-02-21
vt82c686: Make vt82c686-pm an I/O tracing region
BALATON Zoltan
2
-2
/
+26
2021-02-21
vt82c686: Fix SMBus IO base and configuration registers
BALATON Zoltan
2
-16
/
+37
2021-02-21
vt82c686: Reorganise code
BALATON Zoltan
1
-139
/
+140
2021-02-21
vt82c686: Move superio memory region to SuperIOConfig struct
BALATON Zoltan
1
-8
/
+8
2021-02-21
target/mips: Use GPR move functions in gen_HILO1_tx79()
Philippe Mathieu-Daudé
1
-17
/
+4
2021-02-21
target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers
Philippe Mathieu-Daudé
2
-0
/
+22
2021-02-21
target/mips: Rename 128-bit upper halve GPR registers
Philippe Mathieu-Daudé
1
-1
/
+3
2021-02-21
target/mips: Promote 128-bit multimedia registers as global ones
Philippe Mathieu-Daudé
3
-27
/
+34
2021-02-21
target/mips: Make cpu_HI/LO registers public
Philippe Mathieu-Daudé
2
-1
/
+2
2021-02-21
target/mips: Include missing "tcg/tcg.h" header
Philippe Mathieu-Daudé
1
-0
/
+1
2021-02-21
target/mips: Remove unused 'rw' argument from page_table_walk_refill()
Philippe Mathieu-Daudé
1
-3
/
+3
2021-02-21
target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType
Philippe Mathieu-Daudé
2
-10
/
+10
2021-02-21
target/mips: Let get_seg*_physical_address() take MMUAccessType arg
Philippe Mathieu-Daudé
1
-5
/
+6
2021-02-21
target/mips: Let get_physical_address() take MMUAccessType argument
Philippe Mathieu-Daudé
1
-10
/
+10
2021-02-21
target/mips: Let raise_mmu_exception() take MMUAccessType argument
Philippe Mathieu-Daudé
1
-5
/
+5
2021-02-21
target/mips: Let cpu_mips_translate_address() take MMUAccessType arg
Philippe Mathieu-Daudé
2
-4
/
+4
2021-02-21
target/mips: Let do_translate_address() take MMUAccessType argument
Philippe Mathieu-Daudé
1
-3
/
+4
2021-02-21
target/mips: Replace magic value by MMU_DATA_LOAD definition
Philippe Mathieu-Daudé
2
-2
/
+2
2021-02-21
target/mips: Remove unused MMU definitions
Philippe Mathieu-Daudé
1
-16
/
+0
2021-02-21
target/mips: Remove access_type argument from get_physical_address()
Philippe Mathieu-Daudé
1
-13
/
+9
2021-02-21
target/mips: Remove access_type arg from get_segctl_physical_address()
Philippe Mathieu-Daudé
1
-10
/
+10
2021-02-21
target/mips: Remove access_type argument from get_seg_physical_address
Philippe Mathieu-Daudé
1
-3
/
+3
2021-02-21
target/mips: Remove access_type argument from map_address() handler
Philippe Mathieu-Daudé
2
-12
/
+11
2021-02-21
target/mips: fetch code with translator_ld
Philippe Mathieu-Daudé
1
-10
/
+10
2021-02-21
tests/acceptance: Test PMON with Loongson-3A1000 CPU
Jiaxun Yang
2
-0
/
+40
2021-02-21
hw/intc/loongson_liointc: Fix per core ISR handling
Jiaxun Yang
1
-3
/
+13
2021-02-21
hw/mips/boston: Use bootloader helper to set GCRs
Jiaxun Yang
1
-34
/
+11
[next]