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2024-02-29accel/tcg: Remove qemu_host_page_size from page_protect/page_unprotectRichard Henderson1-8/+10
Use qemu_real_host_page_size instead. Except for the final mprotect within page_protect, we already handled host < target page size. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20240102015808.132373-2-richard.henderson@linaro.org>
2024-02-29tcg: Avoid double lock if page tables happen to be in mmio memory.Jonathan Cameron1-24/+10
On i386, after fixing the page walking code to work with pages in MMIO memory (specifically CXL emulated interleaved memory), a crash was seen in an interrupt handling path. Useful part of backtrace 7 0x0000555555ab1929 in bql_lock_impl (file=0x555556049122 "../../accel/tcg/cputlb.c", line=2033) at ../../system/cpus.c:524 8 bql_lock_impl (file=file@entry=0x555556049122 "../../accel/tcg/cputlb.c", line=line@entry=2033) at ../../system/cpus.c:520 9 0x0000555555c9f7d6 in do_ld_mmio_beN (cpu=0x5555578e0cb0, full=0x7ffe88012950, ret_be=ret_be@entry=0, addr=19595792376, size=size@entry=8, mmu_idx=4, type=MMU_DATA_LOAD, ra=0) at ../../accel/tcg/cputlb.c:2033 10 0x0000555555ca0fbd in do_ld_8 (cpu=cpu@entry=0x5555578e0cb0, p=p@entry=0x7ffff4efd1d0, mmu_idx=<optimized out>, type=type@entry=MMU_DATA_LOAD, memop=<optimized out>, ra=ra@entry=0) at ../../accel/tcg/cputlb.c:2356 11 0x0000555555ca341f in do_ld8_mmu (cpu=cpu@entry=0x5555578e0cb0, addr=addr@entry=19595792376, oi=oi@entry=52, ra=0, ra@entry=52, access_type=access_type@entry=MMU_DATA_LOAD) at ../../accel/tcg/cputlb.c:2439 12 0x0000555555ca5f59 in cpu_ldq_mmu (ra=52, oi=52, addr=19595792376, env=0x5555578e3470) at ../../accel/tcg/ldst_common.c.inc:169 13 cpu_ldq_le_mmuidx_ra (env=0x5555578e3470, addr=19595792376, mmu_idx=<optimized out>, ra=ra@entry=0) at ../../accel/tcg/ldst_common.c.inc:301 14 0x0000555555b4b5fc in ptw_ldq (ra=0, in=0x7ffff4efd320) at ../../target/i386/tcg/sysemu/excp_helper.c:98 15 ptw_ldq (ra=0, in=0x7ffff4efd320) at ../../target/i386/tcg/sysemu/excp_helper.c:93 16 mmu_translate (env=env@entry=0x5555578e3470, in=0x7ffff4efd3e0, out=0x7ffff4efd3b0, err=err@entry=0x7ffff4efd3c0, ra=ra@entry=0) at ../../target/i386/tcg/sysemu/excp_helper.c:174 17 0x0000555555b4c4b3 in get_physical_address (ra=0, err=0x7ffff4efd3c0, out=0x7ffff4efd3b0, mmu_idx=0, access_type=MMU_DATA_LOAD, addr=18446741874686299840, env=0x5555578e3470) at ../../target/i386/tcg/sysemu/excp_helper.c:580 18 x86_cpu_tlb_fill (cs=0x5555578e0cb0, addr=18446741874686299840, size=<optimized out>, access_type=MMU_DATA_LOAD, mmu_idx=0, probe=<optimized out>, retaddr=0) at ../../target/i386/tcg/sysemu/excp_helper.c:606 19 0x0000555555ca0ee9 in tlb_fill (retaddr=0, mmu_idx=0, access_type=MMU_DATA_LOAD, size=<optimized out>, addr=18446741874686299840, cpu=0x7ffff4efd540) at ../../accel/tcg/cputlb.c:1315 20 mmu_lookup1 (cpu=cpu@entry=0x5555578e0cb0, data=data@entry=0x7ffff4efd540, mmu_idx=0, access_type=access_type@entry=MMU_DATA_LOAD, ra=ra@entry=0) at ../../accel/tcg/cputlb.c:1713 21 0x0000555555ca2c61 in mmu_lookup (cpu=cpu@entry=0x5555578e0cb0, addr=addr@entry=18446741874686299840, oi=oi@entry=32, ra=ra@entry=0, type=type@entry=MMU_DATA_LOAD, l=l@entry=0x7ffff4efd540) at ../../accel/tcg/cputlb.c:1803 22 0x0000555555ca3165 in do_ld4_mmu (cpu=cpu@entry=0x5555578e0cb0, addr=addr@entry=18446741874686299840, oi=oi@entry=32, ra=ra@entry=0, access_type=access_type@entry=MMU_DATA_LOAD) at ../../accel/tcg/cputlb.c:2416 23 0x0000555555ca5ef9 in cpu_ldl_mmu (ra=0, oi=32, addr=18446741874686299840, env=0x5555578e3470) at ../../accel/tcg/ldst_common.c.inc:158 24 cpu_ldl_le_mmuidx_ra (env=env@entry=0x5555578e3470, addr=addr@entry=18446741874686299840, mmu_idx=<optimized out>, ra=ra@entry=0) at ../../accel/tcg/ldst_common.c.inc:294 25 0x0000555555bb6cdd in do_interrupt64 (is_hw=1, next_eip=18446744072399775809, error_code=0, is_int=0, intno=236, env=0x5555578e3470) at ../../target/i386/tcg/seg_helper.c:889 26 do_interrupt_all (cpu=cpu@entry=0x5555578e0cb0, intno=236, is_int=is_int@entry=0, error_code=error_code@entry=0, next_eip=next_eip@entry=0, is_hw=is_hw@entry=1) at ../../target/i386/tcg/seg_helper.c:1130 27 0x0000555555bb87da in do_interrupt_x86_hardirq (env=env@entry=0x5555578e3470, intno=<optimized out>, is_hw=is_hw@entry=1) at ../../target/i386/tcg/seg_helper.c:1162 28 0x0000555555b5039c in x86_cpu_exec_interrupt (cs=0x5555578e0cb0, interrupt_request=<optimized out>) at ../../target/i386/tcg/sysemu/seg_helper.c:197 29 0x0000555555c94480 in cpu_handle_interrupt (last_tb=<synthetic pointer>, cpu=0x5555578e0cb0) at ../../accel/tcg/cpu-exec.c:844 Peter identified this as being due to the BQL already being held when the page table walker encounters MMIO memory and attempts to take the lock again. There are other examples of similar paths TCG, so this follows the approach taken in those of simply checking if the lock is already held and if it is, don't take it again. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240219173153.12114-4-Jonathan.Cameron@huawei.com> [rth: Use BQL_LOCK_GUARD] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29accel/tcg: Set can_do_io at at start of lookup_tb_ptr helperPeter Maydell1-0/+8
If a page table is in IO memory and lookup_tb_ptr probes the TLB it can result in a page table walk for the instruction fetch. If this hits IO memory and io_prepare falsely assumes it needs to do a TLB recompile. Avoid that by setting can_do_io at the start of lookup_tb_ptr. Link: https://lore.kernel.org/qemu-devel/CAFEAcA_a_AyQ=Epz3_+CheAT8Crsk9mOu894wbNW_FywamkZiw@mail.gmail.com/#t Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240219173153.12114-2-Jonathan.Cameron@huawei.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29tcg/aarch64: Apple does not align __int128_t in even registersRichard Henderson1-1/+5
From https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms When passing an argument with 16-byte alignment in integer registers, Apple platforms allow the argument to start in an odd-numbered xN register. The standard ABI requires it to begin in an even-numbered xN register. Cc: qemu-stable@nongnu.org Fixes: 5427a9a7604 ("tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2169 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <9fc0c2c7-dd57-459e-aecb-528edb74b4a7@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-29linux-user/elfload: Unprotect regions before core dumpRichard Henderson1-0/+22
By unprotecting regions, we re-instate writability and unify regions that have been split, which may reduce the total number of regions. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Rely on walk_memory_regions for vmasRichard Henderson1-135/+78
Rather than creating new data structures for vma, rely on the IntervalTree used by walk_memory_regions. Use PAGE_* constants, per the page table api, rather than PROT_* constants, per the mmap api. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Simplify vma_dump_sizeRichard Henderson1-24/+10
Use the flags that we've already saved in order to test accessibility. Use g2h_untagged and compare guest memory directly instead of copy_from_user. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Write process memory to core file in larger chunksRichard Henderson1-23/+4
We do not need to copy pages from guest memory before writing them out. Because vmas are contiguous in host memory, we can write them in one go. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Write corefile elf header in one blockRichard Henderson1-300/+116
Fixes a bug in which write_note() wrote namesz_rounded and datasz_rounded bytes, even though name and data pointers contain only the unrounded number of bytes. Instead of many small writes, allocate a block to contain all of the elf headers and all of the notes. Copy the data into the block piecemeal and the write it to the file as a chunk. This also avoids the need to lseek forward for alignment. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Size corefile before openingRichard Henderson1-39/+44
Verify the size of the corefile vs the rlimit before opening and creating the core file at all. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Lock cpu list and mmap during elf_core_dumpRichard Henderson1-6/+9
Do not allow changes to the set of cpus and memory regions while we are dumping core. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Truncate core file on openRichard Henderson1-1/+1
While we usually create a new corefile, truncate otherwise. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Open core file after vma_initRichard Henderson1-7/+9
Swap the ordering of vma_init and open. This will be necessary for further changes, and adjusts the error cleanup path. Narrow the scope of corefile, as the variable can be freed immediately after use in open(). Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Latch errno before cleanup in elf_core_dumpRichard Henderson1-7/+5
On the off-chance that one of the cleanup functions changes errno, latch the errno that we want to return beforehand. Flush errno to 0 upon success, rather than at the beginning. No need to avoid negation of 0. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Stack allocate struct mm_structRichard Henderson1-19/+9
Ignoring the fact that g_malloc cannot fail, the structure is quite small and might as well be allocated locally. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Tidy fill_note_info and struct elf_note_infoRichard Henderson1-32/+16
In fill_note_info, there were unnecessary checks for success of g_new/g_malloc. But these structures do not need to be dyamically allocated at all, and can in fact be statically allocated within the parent structure. This removes all error paths from fill_note_info, so change the return type to void. Change type of signr to match both caller (elf_core_dump) and callee (fill_prstatus), which both use int for signr. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Merge init_note_info and fill_note_infoRichard Henderson1-12/+3
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29linux-user/elfload: Disable core dump if getrlimit failsRichard Henderson1-1/+1
Do not dump core at all if getrlimit fails; this ensures that dumpsize is valid throughout the function, not just for the initial test vs rlim_cur. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-29loongarch: Change the UEFI loading mode to loongarchXianglai Li3-33/+107
The UEFI loading mode in loongarch is very different from that in other architectures:loongarch's UEFI code is in rom, while other architectures' UEFI code is in flash. loongarch UEFI can be loaded as follows: -machine virt,pflash=pflash0-format -bios ./QEMU_EFI.fd Other architectures load UEFI using the following methods: -machine virt,pflash0=pflash0-format,pflash1=pflash1-format loongarch's UEFI loading method makes qemu and libvirt incompatible when using NVRAM, and the cost of loongarch's current loading method far outweighs the benefits, so we decided to use the same UEFI loading scheme as other architectures. Cc: Andrea Bolognani <abologna@redhat.com> Cc: maobibo@loongson.cn Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Song Gao <gaosong@loongson.cn> Cc: zhaotianrui@loongson.cn Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Tested-by: Andrea Bolognani <abologna@redhat.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <0bd892aa9b88e0f4cc904cb70efd0251fc1cde29.1708336919.git.lixianglai@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2024-02-28Merge tag 'migration-next-pull-request' of https://gitlab.com/peterx/qemu ↵Peter Maydell24-211/+354
into staging Migration pull request - Fabiano's fixed-ram patches (1-5 only) - Peter's cleanups on multifd tls IOC referencing - Steve's cpr patches for vfio (migration patches only) - Fabiano's fix on mbps stats racing with COMPLETE state - Fabiano's fix on return path thread hang # -----BEGIN PGP SIGNATURE----- # # iIcEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZd7AbhIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wbg0gDyA3Vg3pIqCJ+u+hLZ+QKxY/pnu8Y5kF+E # HK2IdslQUQD+OX4ATUnl+CGMiVX9fjs1fKx0Z0Qetq8gC1YJF13yuA0= # =P2QF # -----END PGP SIGNATURE----- # gpg: Signature made Wed 28 Feb 2024 05:11:10 GMT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [marginal] # gpg: aka "Peter Xu <peterx@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'migration-next-pull-request' of https://gitlab.com/peterx/qemu: (25 commits) migration: Use migrate_has_error() in close_return_path_on_source() migration: Join the return path thread before releasing to_dst_file migration: Fix qmp_query_migrate mbps value migration: options incompatible with cpr migration: update cpr-reboot description migration: stop vm for cpr migration: notifier error checking migration: refactor migrate_fd_connect failures migration: per-mode notifiers migration: MigrationNotifyFunc migration: remove postcopy_after_devices migration: MigrationEvent for notifiers migration: convert to NotifierWithReturn migration: remove error from notifier data notify: pass error to notifier with return migration/multifd: Drop unnecessary helper to destroy IOC migration/multifd: Cleanup outgoing_args in state destroy migration/multifd: Make multifd_channel_connect() return void migration/multifd: Drop registered_yank migration/multifd: Cleanup TLS iochannel referencing ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-02-28Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell15-90/+157
* target/i386: Fix physical address truncation on 32-bit PAE * Remove globals for options -no-fd-bootchk and -win2k-hack # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmXebwQUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroPozAf/Vgc9u6C+8PcPDrol6qxjI+EOHLNy # 7M3/OFpUkwLXuOSawb6syYxHpLS38fKRcsb2ninngUmbRWA6p+KNUizlAFMj7op5 # wJmtdamCwCwXXaw20SfWxx2Ih0JS7FQsRsU94HTOdaDB17C9+hBcYwcggsOAXCmq # gyVenEF1mov2A4jLMhdVIRX784AAoEP+QAuhBKQBrQwRLCTTyNdHl7jXdB9w+2sh # KafokoFLcozJHz/tN3AhRKy6zjPugJyQmJwBRuj9tstCILtXpvf/ZE/3pUq5l3ZY # A6dCI0zWAlGNTkpKRXsMFozNIVP2htnyidy29XHptlY5acfjtQ++rMu3BQ== # =WY4H # -----END PGP SIGNATURE----- # gpg: Signature made Tue 27 Feb 2024 23:23:48 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: ide, vl: turn -win2k-hack into a property on IDE devices ide: collapse parameters to ide_init_drive target/i386: leave the A20 bit set in the final NPT walk target/i386: remove unnecessary/wrong application of the A20 mask target/i386: Fix physical address truncation target/i386: use separate MMU indexes for 32-bit accesses target/i386: introduce function to query MMU indices target/i386: check validity of VMCB addresses target/i386: mask high bits of CR3 in 32-bit mode vl, pc: turn -no-fd-bootchk into a machine property Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-02-28Merge tag 'pull-maintainer-updates-280224-1' of ↵Peter Maydell65-661/+1237
https://gitlab.com/stsquad/qemu into staging Testing, gdbstub and plugin updates: - fix some test/tcg license headers to GPLv2+ - bump up check-tcg timeout to 120s - avoid re-building VM images too often - update OpenBSD to 7.4 - use GDBFeature to build gdbstub XML - unify plugin vcpu count under qemu_plugin_num_vcpus - avoid spurious idle/resume callbacks on new vCPUs - ensure nios2-linux-user processes async work - call vcpu_init plugin callback through async work - define plugin helpers when registers being read - add plugin API for reading register values - add support for register tracking to execlog - update plugin docs with assumptions - mention plugins can trigger tb_flush in mttcg design doc # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmXfAv0ACgkQ+9DbCVqe # KkQyogf/X6T5lWsdZGb22FOYzaTLf5gfCPXArIVN+GsjSae3dU6qy/qVM1VRJQPw # mH8kvMY7QO5V9M2tL33WtZZg6hqWypXYU+Hit6sMmveKYMKS9ESEX28x3yybgt8Y # fyDywNODX7bs8Wb6NQjVkZvTmM2llrHEtQXPffaXaPyxOAzlGTV9Mf3Sop9rk4nG # 8IchzLmOOQ7XnVst/KRyq+29oOYsbyUtj13tNeWBZ5iXFDT6Q/nGwPQ12U2Ztn9N # FZvyzGG707dFaEDxIr4pl7n+lHJto29LMlSXlocANwG6wFNP3nfkSw/dXw3nkZZK # pOfrQKvnnunJKBd7495LYZxTDe505Q== # =/k97 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 28 Feb 2024 09:55:09 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-maintainer-updates-280224-1' of https://gitlab.com/stsquad/qemu: (29 commits) docs/devel: plugins can trigger a tb flush docs/devel: document some plugin assumptions docs/devel: lift example and plugin API sections up contrib/plugins: extend execlog to track register changes contrib/plugins: fix imatch tests/tcg: expand insn test case to exercise register API plugins: add an API to read registers plugins: create CPUPluginState and migrate plugin_mask gdbstub: expose api to find registers plugins: Use different helpers when reading registers cpu: call plugin init hook asynchronously linux-user: ensure nios2 processes queued work plugins: fix order of init/idle/resume callback plugins: add qemu_plugin_num_vcpus function plugins: remove previous n_vcpus functions from API gdbstub: Add members to identify registers to GDBFeature hw/core/cpu: Remove gdb_get_dynamic_xml member gdbstub: Infer number of core registers from XML gdbstub: Simplify XML lookup gdbstub: Change gdb_get_reg_cb and gdb_set_reg_cb ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-02-28docs/devel: plugins can trigger a tb flushPierrick Bouvier1-0/+1
When scoreboards need to be reallocated. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213094009.150349-8-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-30-alex.bennee@linaro.org>
2024-02-28docs/devel: document some plugin assumptionsAlex Bennée1-0/+49
While we attempt to hide implementation details from the plugin we shouldn't be totally obtuse. Let the user know what they can and can't expect with the various instrumentation options. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-29-alex.bennee@linaro.org>
2024-02-28docs/devel: lift example and plugin API sections upAlex Bennée1-3/+3
This makes them a bit more visible in the TCG emulation menu rather than hiding them away bellow the ToC limit. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-28-alex.bennee@linaro.org>
2024-02-28contrib/plugins: extend execlog to track register changesAlex Bennée2-52/+281
With the new plugin register API we can now track changes to register values. Currently the implementation is fairly dumb which will slow down if a large number of register values are being tracked. This could be improved by only instrumenting instructions which mention registers we are interested in tracking. Example usage: ./qemu-aarch64 -D plugin.log -d plugin \ -cpu max,sve256=on \ -plugin contrib/plugins/libexeclog.so,reg=sp,reg=z\* \ ./tests/tcg/aarch64-linux-user/sha512-sve will display in the execlog any changes to the stack pointer (sp) and the SVE Z registers. As testing registers every instruction will be quite a heavy operation there is an additional flag which attempts to optimise the register tracking by only instrumenting instructions which are likely to change its value. This relies on the QEMU disassembler showing up the register names in disassembly so is an explicit opt-in. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Cc: Akihiko Odaki <akihiko.odaki@daynix.com> Based-On: <20231025093128.33116-19-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-27-alex.bennee@linaro.org>
2024-02-28contrib/plugins: fix imatchAlex Bennée1-1/+1
We can't directly save the ephemeral imatch from argv as that memory will get recycled. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-26-alex.bennee@linaro.org>
2024-02-28tests/tcg: expand insn test case to exercise register APIAlex Bennée1-0/+21
This ensure we at least read every register the plugin API reports at least once during the check-tcg checks. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-25-alex.bennee@linaro.org>
2024-02-28plugins: add an API to read registersAlex Bennée3-2/+105
We can only request a list of registers once the vCPU has been initialised so the user needs to use either call the get function on vCPU initialisation or during the translation phase. We don't expose the reg number to the plugin instead hiding it behind an opaque handle. For now this is just the gdb_regnum encapsulated in an anonymous GPOINTER but in future as we add more state for plugins to track we can expand it. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1706 Based-on: <20231025093128.33116-18-akihiko.odaki@daynix.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-24-alex.bennee@linaro.org>
2024-02-28plugins: create CPUPluginState and migrate plugin_maskAlex Bennée6-8/+38
As we expand the per-vCPU data for plugins we don't want to pollute CPUState. For now this just moves the plugin_mask (renamed to event_mask) as the memory callbacks are accessed directly by TCG generated code. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-23-alex.bennee@linaro.org>
2024-02-28gdbstub: expose api to find registersAlex Bennée2-1/+54
Expose an internal API to QEMU to return all the registers for a vCPU. The list containing the details required to called gdb_read_register(). Based-on: <20231025093128.33116-15-akihiko.odaki@daynix.com> Cc: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-22-alex.bennee@linaro.org>
2024-02-28plugins: Use different helpers when reading registersAkihiko Odaki4-7/+52
This avoids optimizations incompatible when reading registers. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20231213-gdb-v17-12-777047380591@daynix.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-21-alex.bennee@linaro.org>
2024-02-28cpu: call plugin init hook asynchronouslyPierrick Bouvier1-2/+7
This ensures we run during a cpu_exec, which allows to call start/end exclusive from this init hook (needed for new scoreboard API introduced later). async work is run before any tb is translated/executed, so we can guarantee plugin init will be called before any other hook. The previous change made sure that any idle/resume cb call will not be done before initializing plugin for a given vcpu. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240213094009.150349-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-20-alex.bennee@linaro.org>
2024-02-28linux-user: ensure nios2 processes queued workAlex Bennée1-0/+1
While async processes are rare for linux-user we do use them from time to time. The most obvious one is tb_flush when we run out of translation space. We will also need this when we move plugin vcpu_init to an async task. Fix nios2 to follow its older, wiser and more stable siblings. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-19-alex.bennee@linaro.org>
2024-02-28plugins: fix order of init/idle/resume callbackPierrick Bouvier1-2/+7
We found that vcpu_init_hook was called *after* idle callback. vcpu_init is called from cpu_realize_fn, while idle/resume cb are called from qemu_wait_io_event (in vcpu thread). This change ensures we only call idle and resume cb only once a plugin was init for a given vcpu. Next change in the series will run vcpu_init asynchronously, which will make it run *after* resume callback as well. So we fix this now. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240213094009.150349-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-18-alex.bennee@linaro.org>
2024-02-28plugins: add qemu_plugin_num_vcpus functionPierrick Bouvier5-0/+19
We now keep track of how many vcpus were started. This way, a plugin can easily query number of any vcpus at any point of execution, which unifies user and system mode workflows. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213094009.150349-3-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-17-alex.bennee@linaro.org>
2024-02-28plugins: remove previous n_vcpus functions from APIPierrick Bouvier5-41/+5
This information is already accessible using qemu_info_t during plugin install. We will introduce another function (qemu_plugin_num_vcpus) which represent how many cpus were enabled, by tracking new cpu indexes. It's a breaking change, so we bump API version. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213094009.150349-2-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-16-alex.bennee@linaro.org>
2024-02-28gdbstub: Add members to identify registers to GDBFeatureAkihiko Odaki4-7/+26
These members will be used to help plugins to identify registers. The added members in instances of GDBFeature dynamically generated by CPUs will be filled in later changes. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20231213-gdb-v17-10-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-15-alex.bennee@linaro.org>
2024-02-28hw/core/cpu: Remove gdb_get_dynamic_xml memberAkihiko Odaki8-57/+0
This function is no longer used. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-9-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-14-alex.bennee@linaro.org>
2024-02-28gdbstub: Infer number of core registers from XMLAkihiko Odaki15-22/+6
GDBFeature has the num_regs member so use it where applicable to remove magic numbers. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20231213-gdb-v17-8-777047380591@daynix.com> [AJB: remove core reg check from microblaze read reg] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-13-alex.bennee@linaro.org>
2024-02-28gdbstub: Simplify XML lookupAkihiko Odaki3-60/+69
Now we know all instances of GDBFeature that is used in CPU so we can traverse them to find XML. This removes the need for a CPU-specific lookup function for dynamic XMLs. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-7-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-12-alex.bennee@linaro.org>
2024-02-28gdbstub: Change gdb_get_reg_cb and gdb_set_reg_cbAkihiko Odaki14-93/+238
Align the parameters of gdb_get_reg_cb and gdb_set_reg_cb with the gdb_read_register and gdb_write_register members of CPUClass to allow to unify the logic to access registers of the core and coprocessors in the future. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-6-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-11-alex.bennee@linaro.org>
2024-02-28gdbstub: Use GDBFeature for GDBRegisterStateAkihiko Odaki1-8/+6
Simplify GDBRegisterState by replacing num_regs and xml members with one member that points to GDBFeature. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231213-gdb-v17-5-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-10-alex.bennee@linaro.org>
2024-02-28gdbstub: Use GDBFeature for gdb_register_coprocessorAkihiko Odaki10-65/+60
This is a tree-wide change to introduce GDBFeature parameter to gdb_register_coprocessor(). The new parameter just replaces num_regs and xml parameters for now. GDBFeature will be utilized to simplify XML lookup in a following change. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-4-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-9-alex.bennee@linaro.org>
2024-02-28target/riscv: Use GDBFeature for dynamic XMLAkihiko Odaki3-49/+41
In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20231213-gdb-v17-3-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-8-alex.bennee@linaro.org>
2024-02-28target/ppc: Use GDBFeature for dynamic XMLAkihiko Odaki4-39/+21
In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231213-gdb-v17-2-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-7-alex.bennee@linaro.org>
2024-02-28target/arm: Use GDBFeature for dynamic XMLAkihiko Odaki4-137/+123
In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231213-gdb-v17-1-777047380591@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-6-alex.bennee@linaro.org>
2024-02-28tests/vm: update openbsd image to 7.4Alex Bennée1-4/+5
The old links are dead so even if we have the ISO cached we can't finish the install. Update to the current stable and tweak the install strings. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2192 Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-5-alex.bennee@linaro.org>
2024-02-28tests/vm: avoid re-building the VM images all the timeAlex Bennée2-3/+3
The main problem is that "check-venv" is a .PHONY target will always evaluate and trigger a full re-build of the VM images. While its tempting to drop it from the dependencies that does introduce a breakage on freshly configured builds. Fortunately we do have the otherwise redundant --force flag for the script which up until now was always on. If we make the usage of --force conditional on dependencies other than check-venv triggering the update we can avoid the costly rebuild and still run cleanly on a fresh checkout. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2118 Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-4-alex.bennee@linaro.org>
2024-02-28tests/tcg: bump TCG test timeout to 120sAlex Bennée1-6/+3
This is less than ideal but easier than making sure we get all the iterations of the memory test. Update the comment accordingly. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-3-alex.bennee@linaro.org>
generated by cgit v1.1 at 2025-07-29 12:13:12 +0000