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2024-04-29scripts/checkpatch: Avoid author email mangled by qemu-*@nongnu.orgPhilippe Mathieu-Daudé1-1/+1
Commit f5177798d8 ("scripts: report on author emails that are mangled by the mailing list") added a check for qemu-devel@ list, extend the regexp to cover more such qemu-trivial@, qemu-block@ and qemu-ppc@. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-04-29target/ppc/cpu_init: Remove "PowerPC" prefix from the CPU listThomas Huth1-4/+5
Printing a "PowerPC" in front of each CPU name is not helpful at all: It is confusing for the users since they don't know whether they have to specify these letters for the "-cpu" parameter, too, and it also takes some precious space in the dense output of the CPU entries. Let's simply remove this now and use two spaces at the beginning of the lines for the indentation of the entries instead, and add a "Available CPUs" in the very first line, like most other target architectures are doing it for their CPU help output already. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-04-29target/s390x/cpu_models: Rework the output of "-cpu help"Thomas Huth1-4/+5
Printing an "s390x" in front of each CPU name is not helpful at all: It is confusing for the users since they don't know whether they have to specify these letters for the "-cpu" parameter, too, and it also takes some precious space in the dense output of the CPU entries. Let's simply remove this now! While we're at it, use two spaces at the beginning of the lines for the indentation of the entries, and add a "Available CPUs" in the very first line, like most other target architectures are doing it for their "-cpu help" output already. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-04-29target/i386/cpu: Remove "x86" prefix from the CPU listThomas Huth1-1/+1
Printing an "x86" in front of each CPU name is not helpful at all: It is confusing for the users since they don't know whether they have to specify these letters for the "-cpu" parameter, too, and it also takes some precious space in the dense output of the CPU entries. Let's simply remove this now and use two spaces at the beginning of the lines for the indentation of the entries instead, like most other target architectures are doing it for their CPU help output already. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-04-29hw/ufs: Fix buffer overflow bugJeuk Kim1-0/+8
It fixes the buffer overflow vulnerability in the ufs device. The bug was detected by sanitizers. You can reproduce it by: cat << EOF |\ qemu-system-x86_64 \ -display none -machine accel=qtest -m 512M -M q35 -nodefaults -drive \ file=null-co://,if=none,id=disk0 -device ufs,id=ufs_bus -device \ ufs-lu,drive=disk0,bus=ufs_bus -qtest stdio outl 0xcf8 0x80000810 outl 0xcfc 0xe0000000 outl 0xcf8 0x80000804 outw 0xcfc 0x06 write 0xe0000058 0x1 0xa7 write 0xa 0x1 0x50 EOF Resolves: #2299 Fixes: 329f16624499 ("hw/ufs: Support for Query Transfer Requests") Reported-by: Zheyu Ma <zheyuma97@gmail.com> Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com>
2024-04-29hw/loongarch: Add cells missing from rtc nodeSong Gao1-3/+9
rtc node need interrupts and interrupt-parent cells. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-18-gaosong@loongson.cn>
2024-04-29hw/loongarch: Add cells missing from uart nodeSong Gao1-2/+7
uart node need interrupts and interrupt-parent cells. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-17-gaosong@loongson.cn>
2024-04-29hw/loongarch: fdt remove unused irqchip nodeSong Gao1-30/+1
This patch removes the unused fdt irqchip node. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-16-gaosong@loongson.cn>
2024-04-29hw/loongarch: fdt adds pcie irq_map nodeSong Gao1-4/+69
This patch adds pcie irq_map node for FDT. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-15-gaosong@loongson.cn>
2024-04-29hw/loongarch: fdt adds pch_msi ControllerSong Gao2-1/+33
fdt adds pch msi controller, we use 'loongson,pch-msi-1.0'. See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-msi.c https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.yang@flygoat.com Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-14-gaosong@loongson.cn>
2024-04-29hw/loongarch: fdt adds pch_pic ControllerSong Gao2-1/+30
fdt adds pch pic controller, we use 'loongson,pch-pic-1.0' See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-pic.c https://lore.kernel.org/r/20200528152757.1028711-4-jiaxun.yang@flygoat.com Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-13-gaosong@loongson.cn>
2024-04-29hw/loongarch: fdt adds Extend I/O Interrupt ControllerSong Gao2-1/+30
fdt adds Extend I/O Interrupt Controller, we use 'loongson,ls2k2000-eiointc'. See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubinbin@loongson.cn Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-12-gaosong@loongson.cn>
2024-04-29hw/loongarch: fdt adds cpu interrupt controller nodeSong Gao1-0/+21
fdt adds cpu interrupt controller node, we use 'loongson,cpu-interrupt-controller'. See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-cpu.c https://lore.kernel.org/r/20221114113824.1880-2-liupeibao@loongson.cn Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-11-gaosong@loongson.cn>
2024-04-29hw/loongarch: Fix fdt memory node wrong 'reg'Song Gao1-1/+1
The right fdt memory node like [1], not [2] [1] memory@0 { device_type = "memory"; reg = <0x00 0x00 0x00 0x10000000>; }; [2] memory@0 { device_type = "memory"; reg = <0x02 0x00 0x02 0x10000000>; }; Reviewed-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240426091551.2397867-10-gaosong@loongson.cn>
2024-04-29hw/loongarch: Init efi_fdt tableSong Gao4-4/+19
The efi_system_table adds a efi_fdt configuration table. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-9-gaosong@loongson.cn>
2024-04-29hw/loongarch: Init efi_initrd tableSong Gao2-2/+30
The efi_system_table adds a efi_initrd configuration table. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-8-gaosong@loongson.cn>
2024-04-29hw/loongarch: Init efi_boot_memmap tableSong Gao4-9/+79
The efi_system_table adds a efi_boot_memmap configuration table. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-7-gaosong@loongson.cn>
2024-04-29hw/loongarch: Init efi_system_tableSong Gao2-0/+70
Add init_systab and set boot_info->a2 Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-6-gaosong@loongson.cn>
2024-04-29hw/loongarch: Add init_cmdlineSong Gao3-0/+34
Add init_cmline and set boot_info->a0, a1 Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-5-gaosong@loongson.cn>
2024-04-29hw/loongarch: Add slave cpu boot_codeSong Gao1-1/+61
Load the slave CPU boot code at pflash0 and set the slave CPU elf_address to VIRT_FLASH0_BASE. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-4-gaosong@loongson.cn>
2024-04-29hw/loongarch: Add load initrdSong Gao1-1/+27
we load initrd ramdisk after kernel_high address Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-3-gaosong@loongson.cn>
2024-04-29hw/loongarch: Move boot functions to boot.cSong Gao5-113/+160
Move some boot functions to boot.c and struct loongarch_boot_info into struct LoongArchMachineState. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240426091551.2397867-2-gaosong@loongson.cn>
2024-04-29net/slirp: Use newer slirp_*_hostxfwd APINicholas Ngai1-14/+48
libslirp provides a newer slirp_*_hostxfwd API meant for address-agnostic forwarding instead of the is_udp parameter which is limited to just TCP/UDP. This paves the way for IPv6 and Unix socket support. Signed-off-by: Nicholas Ngai <nicholas@ngai.me> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Tested-by: Breno Leitao <leitao@debian.org> Message-Id: <20210925214820.18078-1-nicholas@ngai.me>
2024-04-26Merge tag 'accel-20240426' of https://github.com/philmd/qemu into stagingRichard Henderson123-356/+487
Accelerators patches A lot of trivial cleanups and simplifications (moving methods around, adding/removing #include statements). Most notable changes: - Rename NEED_CPU_H -> COMPILING_PER_TARGET - Rename few template headers using the '.h.inc' suffix - Extract some definitions / declarations into their own header: - accel/tcg/user-retaddr.h (helper_retaddr) - include/exec/abi_ptr.h (abi_ptr) - include/exec/breakpoint.h (CPUBreakpoint, CPUWatchpoint) - include/exec/mmu-access-type.h (MMUAccessType) - include/user/tswap-target.h (tswapl, bswaptls) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmYsAuEACgkQ4+MsLN6t # wN78Rg//V9UoE0U9Lh6Sd2WpcSAYP9D1CBa+iGXhrmel0utER1sQLu022nvcLdHc # XtCgtX3H0yECF8dPX02rVp8IbSlOv3c8N/a6BxD79cRGqgXBYR/dEUqfXqeLJn3l # a58YU3i7sLNQ0l7VnwTiBnI0lw170/xJl2B2mcR1SvWuH3dr5vTeIXNureu36ORo # rc0oqWHbw1Pyyn8ADE2kPyFCOiwPwvcOvAk8dXGfib+mNCwNVV+ZUtAPi711VD8d # 9VW2gu2sXwnWdpROrSugSw+aPVF4UjltL9qJEl5bxoqWFmlET1Zn2NpKvsocUXmh # CMQQS2Tr4LpaaVQJGxx0yUe0B65X5+gCkIhsMOubED7GRyTCjrkOPm6exz3ge6WV # YmIboggFAk3OjAzLs7yZVkWsTK1Y3+3eX0u7AWPUsUu7rCT/Toc6QxDS7eT2hJfq # UDXI355PGbImgiArQa+OsT7v1Le4/iQa+TfN4fdUDpxEdfaxhnijWh+E91CEp+w/ # Mq7db9Z1aMnhFKIKdkPYyfwB74yXQrmYchJ0QojZjbzqNGwkt9VeC7O9RcYjEaHM # hMIexwccxexqGH22wn8vPd6ZVKtiLaG4AXO0v6Dn2YJ7/zb/ntcI6lRZqdBAHKNK # MzkjTRRRR0wAfu8Lk8CaNNEqUP4Po43fbYymo6AZhIR8NqfApL0= # =ifBx # -----END PGP SIGNATURE----- # gpg: Signature made Fri 26 Apr 2024 12:39:13 PM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'accel-20240426' of https://github.com/philmd/qemu: (38 commits) plugins: Include missing 'qemu/bitmap.h' header hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h' exec: Move CPUTLBEntry helpers to cputlb.c exec: Restrict inclusion of 'user/guest-base.h' exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h' exec: Restrict 'cpu_ldst.h' to TCG accelerator exec: Restrict TCG specific declarations of 'cputlb.h' exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header exec: Declare MMUAccessType type in 'mmu-access-type.h' header exec: Declare abi_ptr type in its own 'abi_ptr.h' header exec/user: Do not include 'cpu.h' in 'abitypes.h' exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h' exec: Declare target_words_bigendian() in 'exec/tswap.h' exec/cpu-all: Remove unused tswapls() definitions exec/cpu-all: Remove unused 'qemu/thread.h' header exec/cpu-all: Reduce 'qemu/rcu.h' header inclusion accel/hvf: Use accel-specific per-vcpu @dirty field accel/nvmm: Use accel-specific per-vcpu @dirty field accel/whpx: Use accel-specific per-vcpu @dirty field accel/tcg: Rename helper-head.h -> helper-head.h.inc ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26plugins: Include missing 'qemu/bitmap.h' headerPhilippe Mathieu-Daudé1-0/+1
Since commit c006147122 ("plugins: create CPUPluginState and migrate plugin_mask") "qemu/plugin.h" uses DECLARE_BITMAP(), which is declared in "qemu/bitmap.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240418192525.97451-19-philmd@linaro.org>
2024-04-26Merge tag 'pull-nbd-2024-04-25' of https://repo.or.cz/qemu/ericb into stagingRichard Henderson4-72/+105
NBD patches for 2024-04-25 - Avoid calling poll() within coroutine # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEccLMIrHEYCkn0vOqp6FrSiUnQ2oFAmYqzkMACgkQp6FrSiUn # Q2ol3wf9HbwiYkyHhqybb4ykEs75N8B2JPbOj6gYRSBn7rz90k1vElDCM2yQhlDN # Ltuh8lTOaJb+Z4n2dKIF2m5hL2GTm/xtErIIpP7o6A+11mHW9ag/VLaAMdWJxmUr # WEUIH6mVtuRcxTTCp01l/JAYpUxOoQs1fyQljONH5kg1MAZpTTD61/cuhrXlvPLU # cVlrLfob90oYhydCq5o6ucW3GhaEYkaZzHIWFy7LphFySebMmnbnPhYf/JD6RZPL # s5K7njMK1DOyguCLlOzSuRM4gIbYunnr0Ofr/orTlAUZvbhRGKUlH0RTMWVMzgek # xArnEZYlsqF2wIvrz0GwMDL7BMmG7A== # =vXJj # -----END PGP SIGNATURE----- # gpg: Signature made Thu 25 Apr 2024 02:42:27 PM PDT # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] * tag 'pull-nbd-2024-04-25' of https://repo.or.cz/qemu/ericb: nbd/server: Mark negotiation functions as coroutine_fn nbd/server: do not poll within a coroutine context Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h'Philippe Mathieu-Daudé1-1/+5
Only include what is required, avoiding the full CPUState API from the huge "hw/core/cpu.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-4-philmd@linaro.org>
2024-04-26exec: Move CPUTLBEntry helpers to cputlb.cPhilippe Mathieu-Daudé2-55/+51
The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c: - tlb_index() - tlb_entry() - tlb_read_idx() - tlb_addr_write() Move them to this file, allowing to remove the huge "cpu.h" header inclusion from "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-13-philmd@linaro.org>
2024-04-26exec: Restrict inclusion of 'user/guest-base.h'Philippe Mathieu-Daudé6-3/+11
Declare 'have_guest_base' in "user/guest-base.h". Very few files require this header, so explicitly include it there instead of "exec/cpu-all.h" which is used in many source files. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-23-philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng>
2024-04-26exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h'Philippe Mathieu-Daudé3-4/+4
The include/user/ directory contains the user-emulation specific headers. Move guest-base.h there too. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240418192525.97451-15-philmd@linaro.org>
2024-04-26exec: Restrict 'cpu_ldst.h' to TCG acceleratorPhilippe Mathieu-Daudé1-1/+5
"exec/cpu_ldst.h" is specific to TCG, do not allow its inclusion from other accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-6-philmd@linaro.org>
2024-04-26exec: Restrict TCG specific declarations of 'cputlb.h'Philippe Mathieu-Daudé1-0/+5
Avoid TCG specific declarations being used from non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-5-philmd@linaro.org>
2024-04-26exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' headerPhilippe Mathieu-Daudé5-15/+35
The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUState and CPUClass. Some source files only require the BP/WP definitions and don't need to pull in all CPU* API. In order to simplify, create a new "exec/breakpoint.h" header. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240418192525.97451-3-philmd@linaro.org>
2024-04-26exec: Declare MMUAccessType type in 'mmu-access-type.h' headerPhilippe Mathieu-Daudé4-7/+21
The MMUAccessType enum is declared in "hw/core/cpu.h". "hw/core/cpu.h" contains declarations related to CPUState and CPUClass. Some source files only require MMUAccessType and don't need to pull in all CPU* declarations. In order to simplify, create a new "exec/mmu-access-type.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240418192525.97451-2-philmd@linaro.org>
2024-04-26exec: Declare abi_ptr type in its own 'abi_ptr.h' headerPhilippe Mathieu-Daudé4-15/+41
The abi_ptr type is declared in "exec/cpu_ldst.h" with all the load/store helpers. Some source files requiring abi_ptr type don't need the load/store helpers. In order to simplify, create a new "exec/abi_ptr.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231212123401.37493-21-philmd@linaro.org>
2024-04-26exec/user: Do not include 'cpu.h' in 'abitypes.h'Philippe Mathieu-Daudé1-1/+6
"exec/user/abitypes.h" requires: - "exec/cpu-defs.h" (TARGET_LONG_BITS) - "exec/tswap.h" (tswap32) In order to avoid "cpu.h", pick the minimum required headers. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231212123401.37493-20-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h'Philippe Mathieu-Daudé13-8/+33
tswapl() and bswaptls() are target-dependent and only used by user emulation. Move their definitions to a new header: "exec/user/tswap-target.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-17-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26exec: Declare target_words_bigendian() in 'exec/tswap.h'Philippe Mathieu-Daudé9-16/+18
We usually check target endianess before swapping values, so target_words_bigendian() declaration makes sense in "exec/tswap.h" with the target swapping helpers. Remove "hw/core/cpu.h" when it was only included to get the target_words_bigendian() declaration. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-16-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26exec/cpu-all: Remove unused tswapls() definitionsPhilippe Mathieu-Daudé1-2/+0
Last use of tswapls() was removed 2 years ago in commit aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-15-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26exec/cpu-all: Remove unused 'qemu/thread.h' headerPhilippe Mathieu-Daudé1-1/+0
Nothing is required from "qemu/thread.h" in "exec/cpu-all.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-13-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26exec/cpu-all: Reduce 'qemu/rcu.h' header inclusionPhilippe Mathieu-Daudé2-1/+1
"exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h", however "exec/ram_addr.h" does. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-17-philmd@linaro.org>
2024-04-26accel/hvf: Use accel-specific per-vcpu @dirty fieldPhilippe Mathieu-Daudé6-12/+12
HVF has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240424174506.326-4-philmd@linaro.org>
2024-04-26accel/nvmm: Use accel-specific per-vcpu @dirty fieldPhilippe Mathieu-Daudé1-10/+11
NVMM has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240424174506.326-3-philmd@linaro.org>
2024-04-26accel/whpx: Use accel-specific per-vcpu @dirty fieldPhilippe Mathieu-Daudé1-11/+12
WHPX has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240424174506.326-2-philmd@linaro.org>
2024-04-26accel/tcg: Rename helper-head.h -> helper-head.h.incPhilippe Mathieu-Daudé4-3/+3
Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename "exec/helper-head.h" as "exec/helper-head.h.inc". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240424173333.96148-4-philmd@linaro.org>
2024-04-26accel/tcg: Rename load-extract/store-insert headers using .h.inc suffixPhilippe Mathieu-Daudé8-2/+2
Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename 'store-insert-al16.h' as 'store-insert-al16.h.inc' and 'load-extract-al16-al8.h' as 'load-extract-al16-al8.h.inc'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240424173333.96148-3-philmd@linaro.org>
2024-04-26accel/tcg: Include missing headers in 'tb-jmp-cache.h'Philippe Mathieu-Daudé1-0/+3
Due to missing headers, when including "tb-jmp-cache.h" we might get: accel/tcg/tb-jmp-cache.h:21:21: error: field ‘rcu’ has incomplete type 21 | struct rcu_head rcu; | ^~~ accel/tcg/tb-jmp-cache.h:24:9: error: unknown type name ‘vaddr’ 24 | vaddr pc; | ^~~~~ Add the missing "qemu/rcu.h" and "exec/cpu-common.h" headers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240111162442.43755-1-philmd@linaro.org>
2024-04-26accel/tcg: Include missing 'hw/core/cpu.h' headerPhilippe Mathieu-Daudé1-0/+2
tcg_cpu_init_cflags() accesses CPUState fields, so requires "hw/core/cpu.h" to get its structure definition. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-12-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-04-26accel/tcg: Un-inline retaddr helpers to 'user-retaddr.h'Philippe Mathieu-Daudé4-26/+34
set_helper_retaddr() is only used in accel/tcg/user-exec.c. clear_helper_retaddr() is only used in accel/tcg/cpu-exec.c and accel/tcg/user-exec.c. No need to expose their definitions to all user-emulation files including "exec/cpu_ldst.h", move them to a new "user-retaddr.h" header (restricted to accel/tcg/). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-19-philmd@linaro.org>
2024-04-26target/i386: Include missing 'exec/exec-all.h' headerPhilippe Mathieu-Daudé1-0/+1
The XRSTOR instruction ends calling tlb_flush(), declared in "exec/exec-all.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-13-philmd@linaro.org>
generated by cgit v1.1 at 2025-07-10 00:41:29 +0000