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2021-05-10hw/misc/mps2-scc: Add "QEMU interface" commentPeter Maydell1-0/+12
The MPS2 SCC device doesn't have any documentation of its properties; add a "QEMU interface" format comment describing them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210504120912.23094-2-peter.maydell@linaro.org
2021-05-10hw/arm/imx25_pdk: Fix error message for invalid RAM sizePhilippe Mathieu-Daudé1-3/+2
The i.MX25 PDK board has 2 banks for SDRAM, each can address up to 256 MiB. So the total RAM usable for this board is 512M. When we ask for more we get a misleading error message: $ qemu-system-arm -M imx25-pdk -m 513M qemu-system-arm: Invalid RAM size, should be 128 MiB Update the error message to better match the reality: $ qemu-system-arm -M imx25-pdk -m 513M qemu-system-arm: RAM size more than 512 MiB is not supported Fixes: bf350daae02 ("arm/imx25_pdk: drop RAM size fixup") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210407225608.1882855-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-10include/disas/dis-asm.h: Handle being included outside 'extern "C"'Peter Maydell3-6/+10
Make dis-asm.h handle being included outside an 'extern "C"' block; this allows us to remove the 'extern "C"' blocks that our two C++ files that include it are using. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-10include/qemu/bswap.h: Handle being included outside extern "C" blockPeter Maydell1-4/+22
Make bswap.h handle being included outside an 'extern "C"' block: all system headers are included first, then all declarations are put inside an 'extern "C"' block. This requires a little rearrangement as currently we have an ifdef ladder that has some system includes and some local declarations or definitions, and we need to separate those out. We want to do this because dis-asm.h includes bswap.h, dis-asm.h may need to be included from C++ files, and system headers should not be included within 'extern "C"' blocks. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-10osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselvesPeter Maydell3-4/+20
Both os-win32.h and os-posix.h include system header files. Instead of having osdep.h include them inside its 'extern "C"' block, make these headers handle that themselves, so that we don't include the system headers inside 'extern "C"'. This doesn't fix any current problems, but it's conceptually the right way to handle system headers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-10hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset()Peter Maydell1-1/+1
The omap_mmc_reset() function resets its SD card via device_legacy_reset(). We know that the SD card does not have a qbus of its own, so the new device_cold_reset() function (which resets both the device and its child buses) is equivalent here to device_legacy_reset() and we can just switch to the new API. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210430222348.8514-1-peter.maydell@linaro.org
2021-05-10target/arm: Make WFI a NOP for userspace emulatorsPeter Maydell1-0/+14
The WFI insn is not system-mode only, though it doesn't usually make a huge amount of sense for userspace code to execute it. Currently if you try it in qemu-arm then the helper function will raise an EXCP_HLT exception, which is not covered by the switch in cpu_loop() and results in an abort: qemu: unhandled CPU exception 0x10001 - aborting R00=00000001 R01=408003e4 R02=408003ec R03=000102ec R04=00010a28 R05=00010158 R06=00087460 R07=00010158 R08=00000000 R09=00000000 R10=00085b7c R11=408002a4 R12=408002b8 R13=408002a0 R14=0001057c R15=000102f8 PSR=60000010 -ZC- A usr32 qemu:handle_cpu_signal received signal outside vCPU context @ pc=0x7fcbfa4f0a12 Make the WFI helper function return immediately in the usermode emulator. This turns WFI into a NOP, which is OK because: * architecturally "WFI is a NOP" is a permitted implementation * aarch64 Linux kernels use the SCTLR_EL1.nTWI bit to trap userspace WFI and NOP it (though aarch32 kernels currently just let WFI do whatever it would do) We could in theory make the translate.c code special case user-mode emulation and NOP the insn entirely rather than making the helper do nothing, but because no real world code will be trying to execute WFI we don't care about efficiency and the helper provides a single place where we can make the change rather than having to touch multiple places in translate.c and translate-a64.c. Fixes: https://bugs.launchpad.net/qemu/+bug/1926759 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430162212.825-1-peter.maydell@linaro.org
2021-05-10target/arm: Make translate-neon.c.inc its own compilation unitPeter Maydell4-11/+14
Switch translate-neon.c.inc from being #included into translate.c to being its own compilation unit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-14-peter.maydell@linaro.org
2021-05-10target/arm: Make functions used by translate-neon globalPeter Maydell2-8/+10
Make the remaining functions needed by the translate-neon code global. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-13-peter.maydell@linaro.org
2021-05-10target/arm: Move NeonGenThreeOpEnvFn typedef to translate.hPeter Maydell2-3/+2
Move the NeonGenThreeOpEnvFn typedef to translate.h together with the other similar typedefs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210430132740.10391-12-peter.maydell@linaro.org
2021-05-10target/arm: Delete unused typedefPeter Maydell1-2/+0
The VFPGenFixPointFn typedef is unused; delete it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210430132740.10391-11-peter.maydell@linaro.org
2021-05-10target/arm: Move vfp_reg_ptr() to translate-neon.c.incPeter Maydell2-7/+7
The function vfp_reg_ptr() is used only in translate-neon.c.inc; move it there. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-10-peter.maydell@linaro.org
2021-05-10target/arm: Make translate-vfp.c.inc its own compilation unitPeter Maydell4-9/+13
Switch translate-vfp.c.inc from being #included into translate.c to being its own compilation unit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-9-peter.maydell@linaro.org
2021-05-10target/arm: Make functions used by translate-vfp globalPeter Maydell2-17/+26
Make the remaining functions which are needed by translate-vfp.c.inc global. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-8-peter.maydell@linaro.org
2021-05-10target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.incPeter Maydell2-20/+20
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32() and vfp_store_reg64() are used only in translate-vfp.c.inc. Move them to that file. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-7-peter.maydell@linaro.org
2021-05-10target/arm: Move gen_aa32 functions to translate-a32.hPeter Maydell2-35/+69
Move the various gen_aa32* functions and macros out of translate.c and into translate-a32.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-6-peter.maydell@linaro.org
2021-05-10target/arm: Split m-nocp trans functions into their own filePeter Maydell5-198/+226
Currently the trans functions for m-nocp.decode all live in translate-vfp.inc.c; move them out into their own translation unit, translate-m-nocp.c. The trans_* functions here are pure code motion with no changes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-5-peter.maydell@linaro.org
2021-05-10target/arm: Make functions used by m-nocp globalPeter Maydell3-33/+65
We want to split out the .c.inc files which are currently included into translate.c so they are separate compilation units. To do this we need to make some functions which are currently file-local to translate.c have global scope; create a translate-a32.h paralleling the existing translate-a64.h as a place for these declarations to live, so that code moved into the new compilation units can call them. The functions made global here are those required by the m-nocp.decode functions, except that I have converted the whole family of {read,write}_neon_element* and also both the load_cpu and store_cpu functions for consistency, even though m-nocp only wants a few functions from each. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-4-peter.maydell@linaro.org
2021-05-10target/arm: Share unallocated_encoding() and gen_exception_insn()Peter Maydell4-22/+12
The unallocated_encoding() function is the same in both translate-a64.c and translate.c; make the translate.c function global and drop the translate-a64.c version. To do this we need to also share gen_exception_insn(), which currently exists in two slightly different versions for A32 and A64: merge those into a single function that can work for both. This will be useful for splitting up translate.c, which will require unallocated_encoding() to no longer be file-local. It's also hopefully less confusing to have only one version of the function rather than two. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-3-peter.maydell@linaro.org
2021-05-10target/arm: Move constant expanders to translate.hPeter Maydell2-24/+24
Some of the constant expanders defined in translate.c are generically useful and will be used by the separate C files for VFP and Neon once they are created; move the expander definitions to translate.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210430132740.10391-2-peter.maydell@linaro.org
2021-05-10target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()Peter Maydell1-1/+1
In tlbi_aa64_vae2is_write() the calculation bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_E2 : ARMMMUIdx_SE2, pageaddr) has the two arms of the ?: expression reversed. Fix the bug. Fixes: b6ad6062f1e5 Reported-by: Rebecca Cran <rebecca@nuviainc.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> Reviewed-by: Rebecca Cran <rebecca@nuviainc.com> Message-id: 20210420123106.10861-1-peter.maydell@linaro.org
2021-05-10linux-user/aarch64: Enable hwcap for RND, BTI, and MTERichard Henderson1-0/+13
These three features are already enabled by TCG, but are missing their hwcap bits. Update HWCAP2 from linux v5.12. Cc: qemu-stable@nongnu.org (for 6.0.1) Buglink: https://bugs.launchpad.net/bugs/1926044 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210427214108.88503-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-10docs: fix link in sbsa descriptionAlex Bennée1-1/+1
A trailing _ makes all the difference to the rendered link. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20210428131316.31390-1-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-06Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell21-60/+1562
staging * NetBSD NVMM support * RateLimit mutex * Prepare for Meson 0.57 upgrade # gpg: Signature made Tue 04 May 2021 13:15:37 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: glib-compat: accept G_TEST_SLOW environment variable gitlab-ci: use --meson=internal for CFI jobs configure: handle meson options that have changed type configure: reindent meson invocation slirp: add configure option to disable smbd ratelimit: protect with a mutex Add NVMM Accelerator: add maintainers for NetBSD/NVMM Add NVMM accelerator: acceleration enlightenments Add NVMM accelerator: x86 CPU support Add NVMM accelerator: configure and build logic oslib-win32: do not rely on macro to get redefined function name Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-05Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' ↵Peter Maydell48-1197/+4009
into staging ppc patch queue 2021-05-04 Here's the first ppc pull request for qemu-6.1. It has a wide variety of stuff accumulated during the 6.0 freeze. Highlights are: * Multi-phase reset cleanups for PAPR * Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target * Cleanup of AIL logic and extension to POWER10 * Further improvements to handling of hot unplug failures on PAPR * Allow much larger numbers of CPU on pseries * Support for the H_SCM_HEALTH hypercall * Add support for the Pegasos II board * Substantial cleanup to hflag handling * Assorted minor fixes and cleanups # gpg: Signature made Tue 04 May 2021 06:52:39 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210504: (46 commits) hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset() hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset() target/ppc: removed VSCR from SPR registration target/ppc: Reduce the size of ppc_spr_t target/ppc: Clean up _spr_register et al target/ppc: Add POWER10 exception model target/ppc: rework AIL logic in interrupt delivery target/ppc: move opcode table logic to translate.c target/ppc: code motion from translate_init.c.inc to gdbstub.c spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() spapr.h: increase FDT_MAX_SIZE spapr.c: do not use MachineClass::max_cpus to limit CPUs ppc: Rename current DAWR macros and variables target/ppc: POWER10 supports scv target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour docs/system: ppc: Add documentation for ppce500 machine roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support roms/Makefile: Update ppce500 u-boot build directory name ppc/spapr: Add support for implement support for H_SCM_HEALTH ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-05Merge remote-tracking branch ↵Peter Maydell371-507/+53
'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210503' ↵Peter Maydell20-76/+1389
into staging Aspeed patches : * Fixes for the DMA space * New model for ASPEED's Hash and Crypto Engine (Joel and Klaus) * Acceptance tests (Joel) * A fix for the XDMA model * Some extra features for the SMC controller. * Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick) # gpg: Signature made Mon 03 May 2021 06:23:36 BST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-aspeed-20210503: aspeed: Add support for the quanta-q7l1-bmc board hw/block: m25p80: Add support for mt25ql02g and mt25qu02g aspeed: Add support for the rainier-bmc board aspeed: Deprecate the swift-bmc machine tests/qtest: Rename m25p80 test in aspeed_smc test aspeed/smc: Add extra controls to request DMA aspeed/smc: Add a 'features' attribute to the object class hw/misc/aspeed_xdma: Add AST2600 support tests/acceptance: Test ast2600 machine tests/acceptance: Test ast2400 and ast2500 machines tests/qtest: Add test for Aspeed HACE aspeed: Integrate HACE hw: Model ASPEED's Hash and Crypto Engine hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias aspeed/i2c: Rename DMA address space aspeed/i2c: Fix DMA address mask aspeed/smc: Remove unused "sdram-base" property aspeed/smc: Use the RAM memory region for DMAs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04glib-compat: accept G_TEST_SLOW environment variablePaolo Bonzini1-0/+17
Provide an alternative way to pass the desired thoroughness of the test. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04gitlab-ci: use --meson=internal for CFI jobsPaolo Bonzini1-3/+7
If we use the system Meson but it is too old, the subsequent "meson configure" will fail. Always use the submodule when building with CFI. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04configure: handle meson options that have changed typePaolo Bonzini1-0/+9
Usually Meson uses pre-serialized information in meson-private to speed up re-runs. This is not possible for version changes, where Meson instead rebuilds the serialized information using cmd_line.txt. In some cases cmd_line.txt can contain stale information, since it is not rebuild except when "meson setup" is invoked. Update it in the configure script to allow upgrading our Meson version. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04configure: reindent meson invocationPaolo Bonzini1-38/+38
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04slirp: add configure option to disable smbdJoelle van Dyne3-12/+32
Replace Windows specific macro with a more generic feature detection macro. Allows slirp smb feature to be disabled manually as well. Acked-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Joelle van Dyne <j@getutm.app> Message-Id: <20210315180341.31638-5-j@getutm.app> [Use $default_feature as the default. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04ratelimit: protect with a mutexPaolo Bonzini3-0/+19
Right now, rate limiting is protected by the AioContext mutex, which is taken for example both by the block jobs and by qmp_block_job_set_speed (via find_block_job). We would like to remove the dependency of block layer code on the AioContext mutex, since most drivers and the core I/O code are already not relying on it. However, there is no existing lock that can easily be taken by both ratelimit_set_speed and ratelimit_calculate_delay, especially because the latter might run in coroutine context (and therefore under a CoMutex) but the former will not. Since concurrent calls to ratelimit_calculate_delay are not possible, one idea could be to use a seqlock to get a snapshot of slice_ns and slice_quota. But for now keep it simple, and just add a mutex to the RateLimit struct; block jobs are generally not performance critical to the point of optimizing the clock cycles spent in synchronization. This also requires the introduction of init/destroy functions, so add them to the two users of ratelimit.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04Add NVMM Accelerator: add maintainers for NetBSD/NVMMReinoud Zandijk1-0/+11
Signed-off-by: Kamil Rytarowski <kamil@NetBSD.org> Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org> Message-Id: <20210402202535.11550-5-reinoud@NetBSD.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04Add NVMM accelerator: acceleration enlightenmentsReinoud Zandijk3-1/+28
Signed-off-by: Kamil Rytarowski <kamil@NetBSD.org> Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org> Message-Id: <20210402202535.11550-4-reinoud@NetBSD.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04Add NVMM accelerator: x86 CPU supportReinoud Zandijk5-0/+1370
Signed-off-by: Kamil Rytarowski <kamil@NetBSD.org> Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org> Message-Id: <20210402202535.11550-3-reinoud@NetBSD.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04Add NVMM accelerator: configure and build logicReinoud Zandijk5-5/+30
Signed-off-by: Kamil Rytarowski <kamil@NetBSD.org> Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org> Message-Id: <20210402202535.11550-2-reinoud@NetBSD.org> [Check for nvmm_vcpu_stop. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04oslib-win32: do not rely on macro to get redefined function namePaolo Bonzini1-1/+1
On Windows with glib <2.50, g_poll is redefined to use the variant defined in util/oslib-win32.c. Use the same name in the declaration and definition for ease of grepping. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-04Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-user-20210430' ↵Peter Maydell3-29/+31
into staging bsd-user: start to cleanup the mess A number of small cleanups to get started. All the checkpatch.pl warnings for bsdload.c have been fixed, as well as a warning from qemu.h (though more remain and this patch series fails the format check still). I've also fixed a compile-time warning about a missing break. # gpg: Signature made Fri 30 Apr 2021 16:40:08 BST # gpg: using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100 # gpg: Good signature from "Warner Losh <wlosh@netflix.com>" [unknown] # gpg: aka "Warner Losh <imp@bsdimp.com>" [unknown] # gpg: aka "Warner Losh <imp@freebsd.org>" [unknown] # gpg: aka "Warner Losh <imp@village.org>" [unknown] # gpg: aka "Warner Losh <wlosh@bsdimp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 2035 F894 B00A A3CF 7CCD E1B7 6C1C D128 7DB0 1100 * remotes/bsdimp/tags/pull-bsd-user-20210430: bsd-user: style tweak: Put {} around all if/else/for statements bsd-user: put back a break; that had gone missing... bsd-user: style tweak: return is not a function, eliminate () bsd-user: style tweak: keyword space ( bsd-user: whitespace changes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset()Peter Maydell1-2/+2
The pnv_psi.c code uses device_legacy_reset() for two purposes: * to reset itself from its qemu_register_reset() handler * to reset a XiveSource object it has Neither it nor the XiveSource have any qbuses, so the new device_cold_reset() function (which resets both the device and its child buses) is equivalent here to device_legacy_reset() and we can just switch to the new API. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210503151849.8766-4-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset()Peter Maydell1-1/+1
The spapr_vio_quiesce_one() function resets the TCE table object (TYPE_SPAPR_TCE_TABLE) via device_legacy_reset(). We know that objects of that type do not have a qbus of their own, so the new device_cold_reset() function (which resets both the device and its child buses) is equivalent here to device_legacy_reset() and we can just switch to the new API. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210503151849.8766-3-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset()Peter Maydell1-1/+1
The h_int_reset() function resets the XIVE interrupt controller via device_legacy_reset(). We know that the interrupt controller does not have a qbus of its own, so the new device_cold_reset() function (which resets both the device and its child buses) is equivalent here to device_legacy_reset() and we can just switch to the new API. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210503151849.8766-2-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04target/ppc: removed VSCR from SPR registrationBruno Larsen (billionai)1-7/+13
Since vscr is not an spr, its initialization was removed from the spr registration functions, and moved to the relevant init_procs. We may look into adding vscr to the reset path instead of the init path (as suggested by David Gibson), but this looked like a good enough solution for now. Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210430193533.82136-6-bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04target/ppc: Reduce the size of ppc_spr_tRichard Henderson1-4/+8
We elide values when registering sprs, we might as well save space in the array as well. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210501022923.1179736-3-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04target/ppc: Clean up _spr_register et alRichard Henderson1-82/+76
Introduce 3 helper macros to elide arguments that we cannot supply. This reduces the repetition required to get the job done. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210501022923.1179736-2-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04target/ppc: Add POWER10 exception modelNicholas Piggin6-8/+65
POWER10 adds a new bit that modifies interrupt behaviour, LPCR[HAIL], and it removes support for the LPCR[AIL]=0b10 mode. Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20210501072436.145444-3-npiggin@gmail.com> [dwg: Corrected tab indenting] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04target/ppc: rework AIL logic in interrupt deliveryNicholas Piggin4-70/+108
The AIL logic is becoming unmanageable spread all over powerpc_excp(), and it is slated to get even worse with POWER10 support. Move it all to a new helper function. Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20210501072436.145444-2-npiggin@gmail.com> [dwg: Corrected tab indenting] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04target/ppc: move opcode table logic to translate.cBruno Larsen (billionai)3-390/+403
code motion to remove opcode callback table from translate_init.c.inc to translate.c in preparation to remove the #include <translate_init.c.inc> from translate.c. Also created destroy_ppc_opcodes and removed that logic from ppc_cpu_unrealize Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210429162130.2412-2-bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04target/ppc: code motion from translate_init.c.inc to gdbstub.cBruno Larsen (billionai)3-253/+264
All the code related to gdb has been moved from translate_init.c.inc file to the gdbstub.c file, where it makes more sense. Version 4 fixes the omission of internal.h in gdbstub, mentioned in <87sg3d2gf5.fsf@linux.ibm.com>, and the extra blank line. Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Suggested-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20210426184706.48040-1-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04spapr_drc.c: handle hotunplug errors in drc_unisolate_logical()Daniel Henrique Barboza1-0/+23
At this moment, PAPR does not provide a way to report errors during a device removal operation. This led the pSeries machine to implement extra mechanisms to try to fallback and recover from an error that might have happened during the hotunplug in the guest side. This started to change a bit with commit fe1831eff8a4 ("spapr_drc.c: use DRC reconfiguration to cleanup DIMM unplug state"), where one way to fallback from a memory removal error was introduced. Around the same time, in [1], the idea of using RTAS set-indicator for this role was first introduced. The RTAS set-indicator call, when attempting to UNISOLATE a DRC that is already UNISOLATED or CONFIGURED, returns RTAS_OK and does nothing else for both QEMU and phyp. This gives us an opportunity to use this behavior to signal the hypervisor layer when a device removal errir happens, allowing QEMU/phyp to do a proper error handling. Using set-indicator to report HP errors isn't strange to PAPR, as per R1-13.5.3.4-4. of table 13.7 of current PAPR [2]: "For all DR options: If this is a DR operation that involves the user insert- ing a DR entity, then if the firmware can determine that the inserted entity would cause a system disturbance, then the set-indicator RTAS call must not unisolate the entity and must return an error status which is unique to the particular error." A change was proposed to the pSeries Linux kernel to call set-indicator to move a DRC to 'unisolate' in the case of a hotunplug error in the guest side [3]. Setting a DRC that is already unisolated or configured to 'unisolate' is a no-op (returns RTAS_OK) for QEMU and also for phyp. Being a benign change for hypervisors that doesn't care about handling such errors, we expect the kernel to accept this change at some point. This patch prepares the pSeries machine for this new kernel feature by changing drc_unisolate_logical() to handle guest side hotunplug errors. For CPUs it's a simple matter of setting drc->unplug_requested to 'false', while for LMBs the process is similar to the rollback that is done in rtas_ibm_configure_connector(). [1] https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg06395.html [2] https://openpowerfoundation.org/wp-content/uploads/2020/07/LoPAR-20200611.pdf [3] https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20210416210216.380291-3-danielhb413@gmail.com/ Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20210420165100.108368-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.1 at 2025-01-10 05:41:31 +0000