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2019-05-28block/backup: unify different modes code pathVladimir Sementsov-Ogievskiy1-33/+10
Do full, top and incremental mode copying all in one place. This unifies the code path and helps further improvements. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190429090842.57910-5-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28block/backup: refactor and tolerate unallocated cluster skippingVladimir Sementsov-Ogievskiy1-37/+23
Split allocation checking to separate function and reduce nesting. Consider bdrv_is_allocated() fail as allocated area, as copying more than needed is not wrong (and we do it anyway) and seems better than fail the whole job. And, most probably we will fail on the next read, if there are real problem with source. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190429090842.57910-4-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28block/backup: move to copy_bitmap with granularityVladimir Sementsov-Ogievskiy1-25/+23
We are going to share this bitmap between backup and backup-top filter driver, so let's share something more meaningful. It also simplifies some calculations. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190429090842.57910-3-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28block/backup: simplify backup_incremental_init_copy_bitmapVladimir Sementsov-Ogievskiy1-28/+12
Simplify backup_incremental_init_copy_bitmap using the function bdrv_dirty_bitmap_next_dirty_area. Note: move to job->len instead of bitmap size: it should not matter but less code. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190429090842.57910-2-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2: do encryption in threadsVladimir Sementsov-Ogievskiy4-21/+81
Do encryption/decryption in threads, like it is already done for compression. This improves asynchronous encrypted io. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190506142741.41731-9-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2: bdrv_co_pwritev: move encryption code out of the lockVladimir Sementsov-Ogievskiy1-14/+21
Encryption will be done in threads, to take benefit of it, we should move it out of the lock first. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190506142741.41731-8-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2: qcow2_co_preadv: improve lockingVladimir Sementsov-Ogievskiy1-10/+2
Background: decryption will be done in threads, to take benefit of it, we should move it out of the lock first. But let's go further: it turns out, that only qcow2_get_cluster_offset() needs locking, so reduce locking to it. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-id: 20190506142741.41731-7-vsementsov@virtuozzo.com Reviewed-by: Alberto Garcia <berto@igalia.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2-threads: split out generic pathVladimir Sementsov-Ogievskiy3-19/+34
Move generic part out of qcow2_co_do_compress, to reuse it for encryption and rename things that would be shared with encryption path. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190506142741.41731-6-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2-threads: qcow2_co_do_compress: protect queuing by mutexVladimir Sementsov-Ogievskiy1-3/+7
Drop dependence on AioContext lock. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190506142741.41731-5-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2-threads: use thread_pool_submit_coVladimir Sementsov-Ogievskiy1-15/+2
Use thread_pool_submit_co, instead of reinventing it here. Note, that thread_pool_submit_aio() never returns NULL, so checking it was an extra thing. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190506142741.41731-4-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2: add separate file for threaded data processing functionsVladimir Sementsov-Ogievskiy4-170/+209
Move compression-on-threads to separate file. Encryption will be in it too. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190506142741.41731-3-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28qcow2.h: add missing includeVladimir Sementsov-Ogievskiy7-6/+1
qcow2.h depends on block_int.h. Compilation isn't broken currently only due to block_int.h always included before qcow2.h. Though, it seems better to directly include block_int.h in qcow2.h. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 20190506142741.41731-2-vsementsov@virtuozzo.com Signed-off-by: Max Reitz <mreitz@redhat.com>
2019-05-28Merge remote-tracking branch ↵Peter Maydell58-580/+2178
'remotes/stsquad/tags/pull-testing-next-280519-2' into staging Various testing updates - semihosting re-factor (used in system tests) - aarch64 and alpha system tests - editorconfig tweak for .S - some docker image updates - iotests clean-up (without make check inclusion) # gpg: Signature made Tue 28 May 2019 17:26:34 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-next-280519-2: (27 commits) tests/qemu-iotests: re-format output to for make check-block tests/qemu-iotests/group: Re-use the "auto" group for tests that can always run Makefile.target: support per-target coverage reports Makefile: include per-target build directories in coverage report Makefile: fix coverage-report reference to BUILD_DIR .travis.yml: enable aarch64-softmmu and alpha-softmmu tcg tests tests/tcg/alpha: add system boot.S tests/tcg/multiarch: expand system memory test to cover more tests/tcg/minilib: support %c format char tests/tcg/multiarch: move the system memory test tests/tcg/aarch64: add system boot.S editorconfig: add settings for .s/.S files tests/tcg/multiarch: add hello world system test tests/tcg/multiarch: add support for multiarch system tests tests/docker: Test more components on the Fedora default image tests/docker: add ubuntu 18.04 MAINTAINERS: update for semihostings new home target/mips: convert UHI_plog to use common semihosting code target/mips: only build mips-semi for softmmu target/arm: correct return values for WRITE/READ in arm-semi ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-28Merge remote-tracking branch ↵Peter Maydell10-210/+922
'remotes/amarkovic/tags/mips-queue-may-19-2019-v3' into staging MIPS queue for May 19th, 2019 - v3 # gpg: Signature made Sun 26 May 2019 17:07:07 BST # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-may-19-2019-v3: BootLinuxSshTest: Test some userspace commands on Malta target/mips: realign comments to fix checkpatch warnings target/mips: add or remove space to fix checkpatch errors linux-user: fix __NR_semtimedop undeclared error mips: Decide to map PAGE_EXEC in map_address target/mips: Refactor and fix INSERT.<B|H|W|D> instructions target/mips: Refactor and fix COPY_U.<B|H|W> instructions target/mips: Refactor and fix COPY_S.<B|H|W|D> instructions target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host target/mips: Make the results of MOD_<U|S>.<B|H|W|D> the same as on hardware target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on hardware Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-28Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.1-sf0' ↵Peter Maydell27-514/+1053
into staging RISC-V Patches for the 4.1 Soft Freeze, Part 1 This tag contains a handful of patches that I'd like to target for 4.1: * An emulation for SiFive's GPIO device. * A fix to disallow sfence.vma from userspace. * Additional decodetree cleanups that should have no functional impact. * C extension emulation fidelity fixes that were noticed as part of that cleanup process. * A new "spike" target, along with the deprecation of a handful of old targets and CPUs. * Some initial infastructure related to the hypervisor extension. * An emulation fidelity fix that prevents prevents arbitrary bits in the SIP CSR from being set. * A small performance improvement that avoids excessive TLB flushing when the ASID does not change. This time I've used a new testing workflow: I've tested on both 32-bit and 64-bit builds of OpenEmbedded, via the default OpenSBI-based boot flow. # gpg: Signature made Sat 25 May 2019 01:05:57 BST # gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/palmer/tags/riscv-for-master-4.1-sf0: (29 commits) target/riscv: Only flush TLB if SATP.ASID changes target/riscv: More accurate handling of `sip` CSR target/riscv: Add checks for several RVC reserved operands target/riscv: Add the HGATP register masks target/riscv: Add the HSTATUS register masks target/riscv: Add Hypervisor CSR macros target/riscv: Allow setting mstatus virtulisation bits target/riscv: Add the MPV and MTL mstatus bits target/riscv: Improve the scause logic target/riscv: Trigger interrupt on MIP update asynchronously target/riscv: Mark privilege level 2 as reserved riscv: spike: Add a generic spike machine target/riscv: Deprecate the generic no MMU CPUs target/riscv: Add a base 32 and 64 bit CPU target/riscv: Create settable CPU properties riscv: virt: Allow specifying a CPU via commandline linux-user/riscv: Add the CPU type as a comment target/riscv: Remove unused include of riscv_htif.h for virt board riscv target/riscv: Remove spaces from register names target/riscv: Split gen_arith_imm into functional and temp ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-28Merge remote-tracking branch ↵Peter Maydell22-187/+146
'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine Core queue, 2019-05-24 * Display more helpful message when an object type is missing (Philippe Mathieu-Daudé) * Use object_initialize_child for correct reference counting (Philippe Mathieu-Daudé) # gpg: Signature made Fri 24 May 2019 19:31:06 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: hw/intc/nvic: Use object_initialize_child for correct reference counting hw/arm/mps2: Use object_initialize_child for correct reference counting hw/microblaze/zynqmp: Use object_initialize_child for correct ref. counting hw/microblaze/zynqmp: Use object_initialize_child for correct ref. counting hw/microblaze/zynqmp: Let the SoC manage the IPI devices hw/microblaze/zynqmp: Move the IPI state into the PMUSoC state hw/mips: Use object_initialize_child for correct reference counting hw/mips: Use object_initialize() on MIPSCPSState hw/arm: Use object_initialize_child for correct reference counting hw/arm/aspeed: Use object_initialize_child for correct ref. counting hw/arm/bcm2835: Use object_initialize_child for correct ref. counting hw/arm/bcm2835: Use object_initialize() on PL011State hw/arm/bcm2835: Use TYPE_PL011 instead of hardcoded string hw/virtio: Use object_initialize_child for correct reference counting hw/misc/macio: Use object_initialize_child for correct ref. counting hw/ppc/pnv: Use object_initialize_child for correct reference counting qom/object: Display more helpful message when an object type is missing Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-28tests/qemu-iotests: re-format output to for make check-blockAlex Bennée1-60/+117
This attempts to clean-up the output to better match the output of the rest of the QEMU check system when called with -makecheck. This includes: - formatting as " TEST iotest-FMT: nnn" - only dumping config on failure (when -makecheck enabled) The non-make check output has been cleaned up as well: - line re-displayed (\r) at the end - fancy colours for pass/fail/skip - timestamps always printed (option removed) Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20190503143904.31211-1-alex.bennee@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com>
2019-05-28tests/qemu-iotests/group: Re-use the "auto" group for tests that can always runThomas Huth1-82/+95
Currently, all tests are in the "auto" group. This is a little bit pointless. OTOH, we need a group for the tests that we can automatically run during "make check" each time, too. Tests in this new group are supposed to run with every possible QEMU configuration, for example they must run with every QEMU binary (also non-x86), without failing when an optional features is missing (but reporting "skip" is ok), and be able to run on all kind of host filesystems and users (i.e. also as "nobody" or "root"). So let's use the "auto" group for this class of tests now. The initial list has been determined by running the iotests with non-x86 QEMU targets and with our CI pipelines on Gitlab, Cirrus-CI and Travis (i.e. including macOS and FreeBSD). Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20190502084506.8009-7-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-05-28Makefile.target: support per-target coverage reportsAlex Bennée1-0/+16
Add support for generating a single targets coverage report. Execute: make coverage-report In the target build directory. This coverage report only cares about target specific blobs so only searches the target build subdirectory. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28Makefile: include per-target build directories in coverage reportAlex Bennée1-1/+3
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28Makefile: fix coverage-report reference to BUILD_DIRAlex Bennée1-1/+1
Commit 337f2311f actually claimed to do this in the commit log but didn't actually. Oops. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28.travis.yml: enable aarch64-softmmu and alpha-softmmu tcg testsAlex Bennée1-1/+1
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28tests/tcg/alpha: add system boot.SRichard Henderson4-0/+576
This provides the bootstrap and low level helper functions for an alpha kernel. We use direct access to the DP264 serial port for test output, and hard machine halt to exit the emulation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190501184306.15208-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-05-28tests/tcg/multiarch: expand system memory test to cover moreAlex Bennée3-72/+282
Expand the memory test to cover move of the softmmu code. Specifically we: - improve commentary - add some helpers (for later BE support) - reduce boiler plate into helpers - add signed reads at various sizes/offsets - required -DCHECK_UNALIGNED Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28tests/tcg/minilib: support %c format charAlex Bennée1-0/+3
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28tests/tcg/multiarch: move the system memory testAlex Bennée1-0/+0
There is nothing inherently architecture specific about the memory test although we may have to manage different restrictions of unaligned access across architectures. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28tests/tcg/aarch64: add system boot.SAlex Bennée3-0/+295
This provides the bootstrap and low level helper functions for an aarch64 kernel. We use semihosting to handle test output and exiting the emulation. semihosting's parameter passing is a little funky so we end up using the stack and pointing to that as the parameter block. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28editorconfig: add settings for .s/.S filesAlex Bennée1-0/+5
We are starting to add assembler foe tests/tcg so lets make sure we get the mode right. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28tests/tcg/multiarch: add hello world system testAlex Bennée2-1/+1
This is not really i386 only, we can have the same test for all architectures supporting system tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28tests/tcg/multiarch: add support for multiarch system testsAlex Bennée2-0/+15
We can certainly support some common tests for system emulation that make use of our minimal defined boot.S support. It will still be up to individual architectures to ensure they build so we provide a MULTIARCH_TESTS variable that they can tack onto TESTS themselves. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28tests/docker: Test more components on the Fedora default imagePhilippe Mathieu-Daudé1-0/+7
Install optional dependencies of QEMU to get better coverage. The following components are now enabled: $ ./configure ... Multipath support yes VNC SASL support yes RDMA support yes PVRDMA support yes libiscsi support yes seccomp support yes libpmem support yes libudev yes Note: The udev-devel package is provided by systemd-devel. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190504055440.20406-1-philmd@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com>
2019-05-28tests/docker: add ubuntu 18.04Gerd Hoffmann1-0/+57
Based on the ubuntu.docker file. Used to reproduce the build failure Peter was seeing. Others might find this useful too ;) Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20190503070241.24786-1-kraxel@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-28MAINTAINERS: update for semihostings new homeAlex Bennée1-0/+7
Seeing as I touched it I should at least keep an eye on it. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28target/mips: convert UHI_plog to use common semihosting codeAlex Bennée1-6/+6
Rather than printing directly to stdout lets use our common semihosting code. There is one minor difference in that the output currently defaults to stderr instead of stdout however this can be controlled by connecting semihosting to a chardev. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-05-28target/mips: only build mips-semi for softmmuAlex Bennée3-1/+12
The is_uhi gates all semihosting calls and always returns false for CONFIG_USER_ONLY builds. There is no reason to build and link mips-semi for these builds so lets fix that. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28target/arm: correct return values for WRITE/READ in arm-semiAlex Bennée1-8/+12
The documentation says the write should return the number of bytes not written on an error (0 means everything was written). Read provides a buffer length and the return value should be the buffer length - bytes actually read. Remove the incorrect FIXME's and return the correct values. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-28target/arm: add LOG_UNIMP messages to arm-semiAlex Bennée1-2/+3
Clean-up our unimplemented bits with a proper message. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28target/arm: use the common interface for WRITE0/WRITEC in arm-semiAlex Bennée3-25/+30
Now we have a common semihosting console interface use that for our string output. However ARM is currently unique in also supporting semihosting for linux-user so we need to replicate the API in linux-user. If other architectures gain this support we can move the file later. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28target/arm: fixup some of the commentary for arm-semiAlex Bennée1-9/+31
This cleans up a number of the block comments to fit the proper style. While we are at it we also reference the official specification and document what the return register value can be. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-28semihosting: enable chardev backed output for consoleAlex Bennée6-3/+51
It will be useful for a number of use-cases to be able to re-direct output to a file like we do with serial output. This does the wiring to allow us to treat then semihosting console like just another character output device. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-05-28semihosting: implement a semihosting consoleAlex Bennée3-0/+116
This provides two functions for handling console output that handle the common backend behaviour for semihosting. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-05-28semihosting: introduce CONFIG_SEMIHOSTINGAlex Bennée11-1/+82
There isn't much point building semihosting for platforms that don't support it. Introduce a new symbol and enable it only for the softmmu targets that need it. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-28semihosting: move semihosting configuration into its own directoryAlex Bennée19-139/+186
In preparation for having some more common semihosting code let's excise the current config magic from vl.c into its own file. We shall later add more conditionals to the build configurations so we can avoid building this if we don't need it. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-26BootLinuxSshTest: Test some userspace commands on MaltaPhilippe Mathieu-Daudé3-0/+232
This tests boot a full VM and check the serial console until the SSH daemon is running, then start a SSH session and run some commands. This test can be run using: $ avocado --show=ssh run -t arch:mips tests/acceptance/linux_ssh_mips_malta.py ssh: Entering interactive session. ssh: # uname -a ssh: Linux debian-mips 3.2.0-4-4kc-malta #1 Debian 3.2.51-1 mips GNU/Linux ssh: # lspci -d 11ab:4620 ssh: 00:00.0 Host bridge: Marvell Technology Group Ltd. GT-64120/64120A/64121A System Controller (rev 10) ssh: # cat /sys/bus/i2c/devices/i2c-0/name ssh: SMBus PIIX4 adapter at 1100 ssh: # cat /proc/mtd ssh: dev: size erasesize name ssh: mtd0: 00100000 00010000 "YAMON" ssh: mtd1: 002e0000 00010000 "User FS" ssh: mtd2: 00020000 00010000 "Board Config" ssh: # md5sum /dev/mtd2ro ssh: 0dfbe8aa4c20b52e1b8bf3cb6cbdf193 /dev/mtd2ro ssh: # poweroff Acked-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190523161832.22490-5-f4bug@amsat.org>
2019-05-26target/mips: realign comments to fix checkpatch warningsJules Irenge1-12/+22
Realign comments to fix warnings issued by checkpatc.pl tool "WARNING: Block comments use a leading /* on a separate line" within "target/mips/cpu.h" file. Signed-off-by: Jules Irenge <jbi.octave@gmail.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190413202818.13622-3-jbi.octave@gmail.com>
2019-05-26target/mips: add or remove space to fix checkpatch errorsJules Irenge1-81/+94
Add or remove space to fix errors issued by checkpatch.pl tool "ERROR: spaces required around that..." "ERROR: space required after that..." "ERROR: space required before the open parenthesis" "ERROR: space required after that..." "ERROR: space prohibited between function name and open parenthesis" "ERROR: code indent should never use tabs" "ERROR: line over 90 characters" within "target/mips/cpu.h" file. Signed-off-by: Jules Irenge <jbi.octave@gmail.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190413202818.13622-2-jbi.octave@gmail.com>
2019-05-26linux-user: fix __NR_semtimedop undeclared errorLaurent Vivier1-8/+16
In current code, __NR_msgrcv and__NR_semtimedop are supposed to be defined if __NR_msgsnd is defined. But linux headers 5.2-rc1 for MIPS define __NR_msgsnd without defining __NR_semtimedop and it breaks the QEMU build. __NR_semtimedop is defined in asm-mips/unistd_n64.h and asm-mips/unistd_n32.h but not in asm-mips/unistd_o32.h. Commit d9cb4336159a ("linux headers: update against Linux 5.2-rc1") has updated asm-mips/unistd_o32.h and added __NR_msgsnd but not __NR_semtimedop. It introduces __NR_semtimedop_time64 instead. This patch fixes the problem by checking for each __NR_XXX symbol before defining the corresponding syscall. Fixes: d9cb4336159a ("linux headers: update against Linux 5.2-rc1") Reported-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20190523175413.14448-1-laurent@vivier.eu>
2019-05-26mips: Decide to map PAGE_EXEC in map_addressJakub Jermář1-5/+8
This commit addresses QEMU Bug #1825311: mips_cpu_handle_mmu_fault renders all accessed pages executable It allows finer-grained control over whether the accessed page should be executable by moving the decision to the underlying map_address function, which has more information for this. As a result, pages that have the XI bit set in the TLB and are accessed for read/write, don't suddenly end up being executable. Fixes: https://bugs.launchpad.net/qemu/+bug/1825311 Fixes: 2fb58b73746e ('target-mips: add RI and XI fields to TLB entry') Signed-off-by: Jakub Jermář <jakub.jermar@kernkonzept.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190517123533.868479-1-jakub.jermar@kernkonzept.com>
2019-05-26target/mips: Refactor and fix INSERT.<B|H|W|D> instructionsMateja Marjanovic3-18/+71
The old version of the helper for the INSERT.<B|H|W|D> MSA instructions has been replaced with four helpers that don't use switch, and change the endianness of the given index, when executed on a big endian host. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1554212605-16457-6-git-send-email-mateja.marjanovic@rt-rk.com>
2019-05-26target/mips: Refactor and fix COPY_U.<B|H|W> instructionsMateja Marjanovic3-21/+59
The old version of the helper for the COPY_U.<B|H|W> MSA instructions has been replaced with four helpers that don't use switch, and change the endianness of the given index, when executed on a big endian host. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1554212605-16457-5-git-send-email-mateja.marjanovic@rt-rk.com>
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