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2022-10-24treewide: Remove the unnecessary space before semicolonBin Meng11-15/+15
2022-10-22include/hw/scsi/scsi.h: Remove unused scsi_legacy_handle_cmdline() prototypePeter Maydell1-1/+0
2022-10-22vmstate-static-checker:remove this redundant returndinglimin1-1/+0
2022-10-22tests/qtest: vhost-user-test: Fix [-Werror=format-overflow=] build warningBin Meng1-2/+2
2022-10-22tests/qtest: migration-test: Fix [-Werror=format-overflow=] build warningBin Meng1-2/+2
2022-10-22Drop useless casts from g_malloc() & friends to pointerMarkus Armbruster10-17/+15
2022-10-22elf2dmp: free memory in failurelu zhipeng1-0/+1
2022-10-22hw/core: Tidy up unnecessary casting away of constMarkus Armbruster1-2/+3
2022-10-22.gitignore: add multiple items to .gitignoreWang, Lei1-0/+3
2022-10-20Merge tag 'pull-target-arm-20221020' of https://git.linaro.org/people/pmaydel...Stefan Hajnoczi20-603/+914
2022-10-20hw/ide/microdrive: Use device_cold_reset() for self-resetsPeter Maydell1-4/+4
2022-10-20target/arm: Enable TARGET_TB_PCRELRichard Henderson6-71/+178
2022-10-20target/arm: Introduce gen_pc_plus_diff for aarch32Richard Henderson1-17/+21
2022-10-20target/arm: Introduce gen_pc_plus_diff for aarch64Richard Henderson1-12/+29
2022-10-20target/arm: Change gen_jmp* to work on displacementsRichard Henderson1-16/+21
2022-10-20target/arm: Remove gen_exception_internal_insn pc argumentRichard Henderson2-8/+8
2022-10-20target/arm: Change gen_exception_insn* to work on displacementsRichard Henderson6-46/+43
2022-10-20target/arm: Change gen_*set_pc_im to gen_*update_pcRichard Henderson5-54/+56
2022-10-20target/arm: Change gen_goto_tb to work on displacementsRichard Henderson2-23/+27
2022-10-20target/arm: Introduce curr_insn_lenRichard Henderson3-4/+8
2022-10-20target/arm: Use bool consistently for get_phys_addr subroutinesRichard Henderson1-4/+3
2022-10-20target/arm: Split out get_phys_addr_twostageRichard Henderson1-91/+100
2022-10-20target/arm: Use softmmu tlbs for page table walkingRichard Henderson3-75/+145
2022-10-20target/arm: Move be test for regime into S1TranslateResultRichard Henderson1-2/+4
2022-10-20target/arm: Plumb debug into S1TranslateRichard Henderson1-18/+37
2022-10-20target/arm: Split out S1Translate typeRichard Henderson1-61/+79
2022-10-20target/arm: Restrict tlb flush from vttbr_write to vmid changeRichard Henderson1-2/+2
2022-10-20target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idxRichard Henderson3-49/+127
2022-10-20target/arm: Add ARMMMUIdx_Phys_{S,NS}Richard Henderson3-4/+24
2022-10-20target/arm: Use probe_access_full for BTIRichard Henderson5-31/+20
2022-10-20target/arm: Use probe_access_full for MTERichard Henderson5-86/+36
2022-10-20target/arm: Enable TARGET_PAGE_ENTRY_EXTRARichard Henderson2-0/+15
2022-10-20target/arm: update the cortex-a15 MIDR to latest revAlex Bennée1-1/+3
2022-10-20hw/char/pl011: fix baud rate calculationBaruch Siach1-1/+1
2022-10-18Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi32-2931/+5980
2022-10-18Merge tag 'pull-ppc-20221017' of https://gitlab.com/danielhb/qemu into stagingStefan Hajnoczi37-370/+589
2022-10-18target/i386: remove old SSE decoderPaolo Bonzini5-1907/+19
2022-10-18target/i386: move 3DNow to the new decoderPaolo Bonzini6-76/+74
2022-10-18tests/tcg: extend SSE tests to AVXPaolo Bonzini3-94/+112
2022-10-18target/i386: Enable AVX cpuid bits when using TCGPaul Brook1-5/+5
2022-10-18target/i386: implement VLDMXCSR/VSTMXCSRPaolo Bonzini2-0/+45
2022-10-18target/i386: implement XSAVE and XRSTOR of AVX registersPaolo Bonzini1-3/+75
2022-10-18target/i386: reimplement 0x0f 0x28-0x2f, add AVXPaolo Bonzini3-0/+185
2022-10-18target/i386: reimplement 0x0f 0x10-0x17, add AVXPaolo Bonzini5-0/+264
2022-10-18target/i386: reimplement 0x0f 0xc2, 0xc4-0xc6, add AVXPaolo Bonzini3-0/+81
2022-10-18target/i386: reimplement 0x0f 0x38, add AVXPaolo Bonzini6-8/+524
2022-10-18target/i386: Use tcg gvec ops for pmovmskbRichard Henderson1-5/+83
2022-10-18target/i386: reimplement 0x0f 0x3a, add AVXPaolo Bonzini5-1/+491
2022-10-18target/i386: clarify (un)signedness of immediates from 0F3Ah opcodesPaolo Bonzini2-5/+5
2022-10-18target/i386: reimplement 0x0f 0xd0-0xd7, 0xe0-0xe7, 0xf0-0xf7, add AVXPaolo Bonzini4-11/+122