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2023-02-04target/s390x: Implement CC_OP_NZ in gen_op_calc_ccRichard Henderson1-0/+3
This case is trivial to implement inline. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSGRichard Henderson4-78/+33
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for passing float128Richard Henderson4-105/+121
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Fix SPEC_in1_x1.
2023-02-04target/s390x: Use Int128 for returning float128Richard Henderson4-59/+63
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Remove extraneous return_low128.
2023-02-04target/s390x: Copy wout_x1 to wout_x1_PRichard Henderson2-6/+14
Make a copy of wout_x1 before modifying it, as wout_x1_P emphasizing that it operates on the out/out2 pair. The insns that use x1_P are data movement that will not change to Int128. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for return from TRERichard Henderson3-7/+9
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for return from CKSMRichard Henderson3-7/+8
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for return from CLSTRichard Henderson3-10/+11
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use a single return for helper_divs64/u64Richard Henderson4-35/+56
Pack the quotient and remainder into a single Int128. Use the divu128 primitive to remove the cpu_abort on 32-bit hosts. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Extended div test case to cover these insns.
2023-02-04target/s390x: Use a single return for helper_divs32/u32Richard Henderson3-18/+18
Pack the quotient and remainder into a single uint64_t. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Fix operand ordering; use tcg_extr32_i64.
2023-02-04tests/tcg/s390x: Add cdsg.cIlya Leoshkevich2-0/+97
Add a simple test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20230201133257.3223115-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tests/tcg/s390x: Add long-double.cRichard Henderson2-0/+25
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tests/tcg/s390x: Add clst.cIlya Leoshkevich2-0/+83
Add a basic test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20221025213008.2209006-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tests/tcg/s390x: Add div.cIlya Leoshkevich2-0/+41
Add a basic test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20221101111300.2539919-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCXRichard Henderson3-101/+47
Note that the previous direct reference to reserve_val, - tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode - ? offsetof(CPUPPCState, reserve_val2) - : offsetof(CPUPPCState, reserve_val))); was incorrect because all references should have gone through cpu_reserve_val. Create a cpu_reserve_val2 tcg temp to fix this. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221112061122.2720163-2-richard.henderson@linaro.org>
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASPRichard Henderson3-89/+19
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20221112042555.2622152-3-richard.henderson@linaro.org>
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXPRichard Henderson3-135/+35
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20221112042555.2622152-2-richard.henderson@linaro.org>
2023-02-04tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}Richard Henderson2-48/+92
Normally this is automatically handled by the CF_PARALLEL checks with in tcg_gen_atomic_cmpxchg_i{32,64}, but x86 has a special case of !PREFIX_LOCK where it always wants the non-atomic version. Split these out so that x86 does not have to roll its own. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add tcg_gen_{non}atomic_cmpxchg_i128Richard Henderson4-0/+146
This will allow targets to avoid rolling their own. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add guest load/store primitives for TCGv_i128Richard Henderson5-0/+324
These are not yet considering atomicity of the 16-byte value; this is a direct replacement for the current target code which uses a pair of 8-byte operations. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add basic data movement for TCGv_i128Richard Henderson3-0/+37
Add code generation functions for data movement between TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract). Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add temp allocation for TCGv_i128Richard Henderson2-18/+74
This enables allocation of i128. The type is not yet usable, as we have not yet added data movement ops. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128Richard Henderson9-3/+21
Fill in the parameters for the host ABI for Int128 for those backends which require no extra modification. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128Richard Henderson4-26/+48
Fill in the parameters for libffi for Int128. Adjust the interpreter to allow for 16-byte return values. Adjust tcg_out_call to record the return value length. Call parameters are no longer all the same size, so we cannot reuse the same call_slots array for every function. Compute it each time now, but only fill in slots required for the call we're about to make. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg/tci: Fix big-endian return register orderingRichard Henderson1-9/+10
We expect the backend to require register pairs in host-endian ordering, thus for big-endian the first register of a pair contains the high part. We were forcing R0 to contain the low part for calls. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128Richard Henderson2-1/+39
Fill in the parameters for the host ABI for Int128. Adjust tcg_target_call_oarg_reg for _WIN64, and tcg_out_call for i386 sysv. Allow TCG_TYPE_V128 stores without AVX enabled. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04include/qemu/int128: Use Int128 structure for TCIRichard Henderson3-9/+87
We are about to allow passing Int128 to/from tcg helper functions, but libffi doesn't support __int128_t, so use the structure. In order for atomic128.h to continue working, we must provide a mechanism to frob between real __int128_t and the structure. Provide a new union, Int128Alias, for this. We cannot modify Int128 itself, as any changed alignment would also break libffi. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add TCG_CALL_RET_BY_VECRichard Henderson2-0/+20
This will be used by _WIN64 to return i128. Not yet used, because allocation is not yet enabled. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Introduce tcg_target_call_oarg_regRichard Henderson11-46/+72
Replace the flat array tcg_target_call_oarg_regs[] with a function call including the TCGCallReturnKind. Extend the set of registers for ARM to r0-r3 to match the ABI: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#result-return Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add TCG_CALL_{RET,ARG}_BY_REFRichard Henderson2-3/+135
These will be used by some hosts, both 32 and 64-bit, to pass and return i128. Not yet used, because allocation is not yet enabled. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Introduce tcg_out_addi_ptrRichard Henderson11-0/+86
Implement the function for arm, i386, and s390x, which will use it. Add stubs for all other backends. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Allocate objects contiguously in temp_allocate_frameRichard Henderson1-8/+26
When allocating a temp to the stack frame, consider the base type and allocate all parts at once. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Handle dh_typecode_i128 with TCG_CALL_{RET,ARG}_NORMALRichard Henderson1-4/+33
Many hosts pass and return 128-bit quantities like sequential 64-bit quantities. Treat this just like we currently break down 64-bit quantities for a 32-bit host. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Define TCG_TYPE_I128 and related helper macrosRichard Henderson2-7/+17
Begin staging in support for TCGv_i128 with Int128. Define the type enumerator, the typedef, and the helper-head.h macros. This cannot yet be used, because you can't allocate temporaries of this new type. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Init temp_subindex in liveness_pass_2Richard Henderson1-0/+1
Correctly handle large types while lowering. Fixes: fac87bd2a49b ("tcg: Add temp_subindex to TCGTemp") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04accel/tcg: Test CPUJumpCache in tb_jmp_cache_clear_pageEric Auger1-1/+6
After commit 4e4fa6c12d ("accel/tcg: Complete cpu initialization before registration"), it looks the CPUJumpCache pointer can be NULL. This causes a SIGSEV when running debug-wp-migration kvm unit test. At the first place it should be clarified why this TCG code is called with KVM acceleration. This may hide another bug. Fixes: 4e4fa6c12d ("accel/tcg: Complete cpu initialization before registration") Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20230203171510.2867451-1-eric.auger@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04Merge tag 'pull-monitor-2023-02-03-v2' of https://repo.or.cz/qemu/armbru ↵Peter Maydell54-4264/+4556
into staging Monitor patches for 2023-02-03 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmPeAkgSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTUagP/iZ24jXaWoFOKaO70wdQ/tdoQObWZnUV # 8xJNJYmYYbWoiq9wQXHebi/yEgBudso1lLzAnp8lsF12ybnNV1zsjyV/yumEKSNW # 3nL1NZIcuY9IDmCe97clY9nm9H2lUhjjyCG3gnjg+uC3JjlSjO/T8lbkdT+fYnkR # AInVTCPYFjSO9MIOhN0WNIY73HlAjr4zx5TEgS/D4pFj6iGq2qEniSDGMRf+/fVr # uSbIXbQlum+VAdxbGMSVf8yQPlNcFUXUpSJrbgJE272H6saQuvn5mkwD0RcYXyaI # OlfXpATDRNTsP3yYImxgr7y29Exo1HnCuC6T1n/+fwkirtMR3a7X6XjaQwFsWcrx # xxGiHQOve3r/I3DAO6A64T2ceD/XuI43LygqkkljfuoXifnJz7Lo39P9HrY0dhpC # KSld2n/Vv4xYyykvqAzpvzijwq679ILIbTplhm9gOrfrDRZjWad3uLAcYxsTXXR8 # BQbHGovcAzTOEx/0Quo3NThpAeNYPGyrPz3xBIV+XtPJGWvFsrA/s/po4qWDTmF6 # UTzPoEmznsD+DRboNOKfinCsOnpTAru4gbXevi7sfmMHQbLYN5xgsrF7WdlaxWa6 # 4QbJyNUq0O+aL0gyfVLuiZBCQ32Jaz1WvowK856Yl4jwczP5HM0ujyyM75+Kx072 # PdnMgxYYLSij # =d+wL # -----END PGP SIGNATURE----- # gpg: Signature made Sat 04 Feb 2023 06:59:20 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-monitor-2023-02-03-v2' of https://repo.or.cz/qemu/armbru: (35 commits) monitor: Rename misc.c to hmp-target.c monitor: Loosen coupling between misc.c and monitor.c slightly monitor: Move remaining QMP stuff from misc.c to qmp-cmds.c monitor: Move remaining HMP commands from misc.c to hmp-cmds.c monitor: Move target-dependent HMP commands to hmp-cmds-target.c monitor: Move monitor_putc() next to monitor_puts & external linkage monitor: Split file descriptor passing stuff off misc.c qdev: Move HMP command completion from monitor to softmmu/ acpi: Move the QMP command from monitor/ to hw/acpi/ stats: Move HMP commands from monitor/ to stats/ stats: Move QMP commands from monitor/ to stats/ runstate: Move HMP commands from monitor/ to softmmu/ tpm: Move HMP commands from monitor/ to softmmu/ virtio: Move HMP commands from monitor/ to hw/virtio/ migration: Move the QMP command from monitor/ to migration/ migration: Move HMP commands from monitor/ to migration/ net: Move hmp_info_network() to net-hmp-cmds.c net: Move HMP commands from monitor to net/ hmp: Rewrite strlist_from_comma_list() as hmp_split_at_comma() rocker: Move HMP commands from monitor to hw/net/rocker/ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-04monitor: Rename misc.c to hmp-target.cMarkus Armbruster2-2/+2
What's left in misc.c is exactly the target-dependent part of the HMP core. Rename accordingly. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-33-armbru@redhat.com>
2023-02-04monitor: Loosen coupling between misc.c and monitor.c slightlyMarkus Armbruster3-10/+4
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-32-armbru@redhat.com>
2023-02-04monitor: Move remaining QMP stuff from misc.c to qmp-cmds.cMarkus Armbruster2-52/+52
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-31-armbru@redhat.com>
2023-02-04monitor: Move remaining HMP commands from misc.c to hmp-cmds.cMarkus Armbruster4-221/+233
This requires giving them external linkage. Rename do_help_cmd() to hmp_help(), and do_print() to hmp_print(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-30-armbru@redhat.com>
2023-02-04monitor: Move target-dependent HMP commands to hmp-cmds-target.cMarkus Armbruster4-351/+388
Target-independent hmp_gpa2hva(), hmp_gpa2hpa() move along to stay next to hmp_gva2gpa(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-29-armbru@redhat.com>
2023-02-04monitor: Move monitor_putc() next to monitor_puts & external linkageMarkus Armbruster3-27/+28
monitor_putc() will soon be used from more than one .c file. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-28-armbru@redhat.com>
2023-02-04monitor: Split file descriptor passing stuff off misc.cMarkus Armbruster3-434/+469
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-27-armbru@redhat.com>
2023-02-04qdev: Move HMP command completion from monitor to softmmu/Markus Armbruster2-82/+82
This moves the completion code from MAINTAINERS sections "Human Monitor (HMP)" and "QMP" to section "QOM". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-26-armbru@redhat.com>
2023-02-04acpi: Move the QMP command from monitor/ to hw/acpi/Markus Armbruster3-21/+31
This moves the command from MAINTAINERS section "QMP" to section "ACPI/SMBIOS)". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-25-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-02-04stats: Move HMP commands from monitor/ to stats/Markus Armbruster3-235/+248
This moves these commands from MAINTAINERS section "Human Monitor (HMP)" to section "Stats". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-24-armbru@redhat.com>
2023-02-04stats: Move QMP commands from monitor/ to stats/Markus Armbruster7-153/+170
This moves these commands from MAINTAINERS section "QMP" to new section "Stats". Status is Orphan. Volunteers welcome! Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-23-armbru@redhat.com>
2023-02-04runstate: Move HMP commands from monitor/ to softmmu/Markus Armbruster6-64/+86
This moves these commands from MAINTAINERS section "Human Monitor (HMP)" and "QMP" to "Main loop". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-22-armbru@redhat.com>
2023-02-04tpm: Move HMP commands from monitor/ to softmmu/Markus Armbruster4-55/+67
This moves these commands from MAINTAINERS section "Human Monitor (HMP)" to "TPM". Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20230124121946.1139465-21-armbru@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
generated by cgit v1.1 at 2025-01-08 21:32:46 +0000