aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2020-12-19qobject: Drop qstring_get_try_str()Markus Armbruster3-17/+5
2020-12-19qobject: Drop qobject_get_try_str()Markus Armbruster2-12/+0
2020-12-19Revert "qobject: let object_property_get_str() use new API"Markus Armbruster1-3/+6
2020-12-19block: Avoid qobject_get_try_str()Markus Armbruster1-3/+3
2020-12-19qmp: Fix tracing of non-string command IDsMarkus Armbruster1-12/+18
2020-12-19qobject: Move internals to qobject-internal.hMarkus Armbruster15-21/+47
2020-12-19hw/rdma: Replace QList by GQueueMarkus Armbruster4-26/+30
2020-12-19Revert "qstring: add qstring_free()"Markus Armbruster2-23/+5
2020-12-19qobject: Change qobject_to_json()'s value to GStringMarkus Armbruster12-93/+79
2020-12-19qobject: Use GString instead of QString to accumulate JSONMarkus Armbruster3-47/+58
2020-12-19qobject: Make qobject_to_json_pretty() take a pretty argumentMarkus Armbruster6-19/+13
2020-12-19monitor: Use GString instead of QString for output bufferMarkus Armbruster3-14/+10
2020-12-19hmp: Simplify how qmp_human_monitor_command() gets outputMarkus Armbruster1-5/+1
2020-12-19test-visitor-serialization: Clean up test_primitives()Markus Armbruster1-7/+37
2020-12-19test-visitor-serialization: Drop insufficient precision workaroundMarkus Armbruster1-16/+2
2020-12-19string-output-visitor: Fix to use sufficient precisionMarkus Armbruster2-2/+2
2020-12-19test-string-output-visitor: Cover "unround" numberMarkus Armbruster1-2/+2
2020-12-19qobject: Fix qnum_to_string() to use sufficient precisionMarkus Armbruster3-27/+9
2020-12-19tests/check-qnum: Cover qnum_to_string() for "unround" argumentMarkus Armbruster1-0/+6
2020-12-19tests/check-qjson: Replace redundant large_number()Markus Armbruster1-44/+3
2020-12-19tests/check-qjson: Cover number 2^63Markus Armbruster1-2/+39
2020-12-19tests/check-qjson: Examine QNum more thoroughlyMarkus Armbruster1-3/+16
2020-12-19tests/check-qjson: Don't skip funny QNumber to JSON conversionsMarkus Armbruster1-30/+25
2020-12-19qapi: Use QAPI_LIST_PREPEND() where possibleEric Blake32-424/+161
2020-12-19migration: Refactor migrate_cap_addEric Blake1-13/+9
2020-12-19rocker: Revamp fp_port_get_infoEric Blake3-15/+12
2020-12-18Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201...Peter Maydell20-307/+434
2020-12-17riscv/opentitan: Update the OpenTitan memory layoutAlistair Francis2-30/+74
2020-12-17hw/riscv: Use the CPU to determine if 32-bitAlistair Francis5-37/+29
2020-12-17target/riscv: cpu: Set XLEN independently from targetAlistair Francis1-9/+16
2020-12-17target/riscv: csr: Remove compile time XLEN checksAlistair Francis2-88/+92
2020-12-17target/riscv: cpu_helper: Remove compile time XLEN checksAlistair Francis1-5/+7
2020-12-17target/riscv: cpu: Remove compile time XLEN checksAlistair Francis1-9/+10
2020-12-17target/riscv: Specify the XLEN for CPUsAlistair Francis1-10/+23
2020-12-17target/riscv: Add a riscv_cpu_is_32bit() helper functionAlistair Francis2-0/+11
2020-12-17target/riscv: fpu_helper: Match function defs in HELPER macrosAlistair Francis2-24/+8
2020-12-17hw/riscv: sifive_u: Remove compile time XLEN checksAlistair Francis1-25/+30
2020-12-17hw/riscv: spike: Remove compile time XLEN checksAlistair Francis1-21/+24
2020-12-17hw/riscv: virt: Remove compile time XLEN checksAlistair Francis1-15/+17
2020-12-17hw/riscv: boot: Remove compile time XLEN checksAlistair Francis5-31/+39
2020-12-17riscv: virt: Remove target macro conditionalsAlistair Francis2-7/+1
2020-12-17riscv: spike: Remove target macro conditionalsAlistair Francis2-7/+1
2020-12-17target/riscv: Add a TYPE_RISCV_CPU_BASE CPUAlistair Francis1-0/+6
2020-12-17hw/riscv: Expand the is 32-bit check to support more CPUsAlistair Francis1-1/+11
2020-12-17intc/ibex_plic: Clear interrupts that occur during claim processAlistair Francis1-3/+10
2020-12-17target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSRAlex Richardson1-2/+2
2020-12-17target/riscv: Fix the bug of HLVX/HLV/HSVYifei Jiang1-1/+2
2020-12-17hw/core/register.c: Don't use '#' flag of printf formatXinhao Zhang1-8/+8
2020-12-17hw/riscv: microchip_pfsoc: add QSPI NOR flashVitaly Wool2-0/+24
2020-12-17hw/riscv: sifive_u: Add UART1 DT node in the generated DTBAnup Patel1-0/+15
generated by cgit v1.1 at 2024-10-13 04:16:17 +0000