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2019-09-23s390x/tcg: MVN: Fault-safe handlingDavid Hildenbrand1-4/+13
We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCIN: Fault-safe handlingDavid Hildenbrand1-3/+12
We can process a maximum of 256 bytes, crossing two pages. Calculate the accessed range upfront - src is accessed right-to-left. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: NC: Fault-safe handlingDavid Hildenbrand1-4/+13
We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: XC: Fault-safe handlingDavid Hildenbrand1-6/+12
We can process a maximum of 256 bytes, crossing two pages. While at it, increment the length once. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: OC: Fault-safe handlingDavid Hildenbrand1-4/+13
We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCLU: Fault-safe handlingDavid Hildenbrand1-3/+5
The last remaining bit is padding with two bytes. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVC: Fault-safe handling on destructive overlapsDavid Hildenbrand1-2/+3
The last remaining bit for MVC is handling destructive overlaps in a fault-safe way. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCS/MVCP: Use access_memmove()David Hildenbrand1-14/+12
As we are moving between address spaces, we can use access_memmove() without checking for destructive overlaps (especially of real storage locations): "Each storage operand is processed left to right. The storage-operand-consistency rules are the same as for MOVE (MVC), except that when the operands overlap in real storage, the use of the common real- storage locations is not necessarily recognized." Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: Fault-safe memmoveDavid Hildenbrand1-99/+139
Replace fast_memmove() variants by access_memmove() variants, that first try to probe access to all affected pages (maximum is two pages). Introduce access_get_byte()/access_set_byte(). We might be able to speed up memmove in special cases even further (do single-byte access, use memmove() for remaining bytes in page), however, we'll skip that for now. In MVCOS, simply always call access_memmove_as() and drop the TODO about LAP. LAP is already handled in the MMU. Get rid of adj_len_to_page(), which is now unused. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: Fault-safe memsetDavid Hildenbrand1-20/+103
Replace fast_memset() by access_memset(), that first tries to probe access to all affected pages (maximum is two). We'll use the same mechanism for other types of accesses soon. Only in very rare cases (especially TLB_NOTDIRTY), we'll have to fallback to ld/st helpers. Try to speed up that case as suggested by Richard. We'll rework most involved handlers soon to do all accesses via new fault-safe helpers, especially MVC. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLYDavid Hildenbrand2-0/+8
Although we basically ignore the index all the time for CONFIG_USER_ONLY, let's simply skip all the checks and always return MMU_USER_IDX in cpu_mmu_index() and get_mem_index(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVST: Fix storing back the addresses to registersDavid Hildenbrand4-19/+19
24 and 31-bit address space handling is wrong when it comes to storing back the addresses to the register. While at it, read gprs 0 implicitly. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVST: Check for specification exceptionsDavid Hildenbrand1-0/+3
Bit position 32-55 of general register 0 must be zero. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCS/MVCP: Properly wrap the lengthDavid Hildenbrand1-0/+6
... and don't perform any move in case the length is zero. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCOS: Lengths are 32 bit in 24/31-bit modeDavid Hildenbrand1-3/+11
Triggered by a review comment from Richard, also MVCOS has a 32-bit length in 24/31-bit addressing mode. Add a new helper. Rename wrap_length() to wrap_length31(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCS/MVCP: Check for special operation exceptionsDavid Hildenbrand1-0/+12
Let's perform the documented checks. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCLU/MVCLE: Process max 4k bytes at a timeDavid Hildenbrand1-23/+31
Let's stay within single pages. ... and indicate cc=3 in case there is work remaining. Keep unicode padding simple. While reworking, properly wrap the addresses. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVPG: Properly wrap the addressesDavid Hildenbrand1-2/+9
We have to mask of any unused bits. While at it, document what exactly is missing. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVPG: Check for specification exceptionsDavid Hildenbrand1-0/+7
Perform the checks documented in the PoP. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVC: Use is_destructive_overlap()David Hildenbrand1-1/+1
Let's use the new helper, that also detects destructive overlaps when wrapping. We'll make the remaining code (e.g., fast_memmove()) aware of wrapping later. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVC: Increment the length onceDavid Hildenbrand1-8/+12
Let's increment the length once. While at it, cleanup the comment. The memset() example is given as a programming note in the PoP, so drop the description. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCL: Process max 4k bytes at a timeDavid Hildenbrand1-6/+38
Process max 4k bytes at a time, writing back registers between the accesses. The instruction is interruptible. "For operands longer than 2K bytes, access exceptions are not recognized for locations more than 2K bytes beyond the current location being processed." Note that on z/Architecture, 2k vs. 4k access cannot get differentiated as long as pages are not crossed. This seems to be a leftover from ESA/390. Simply stay within single pages. MVCL handling is quite different than MVCLE/MVCLU handling, so split up the handlers. Defer interrupt handling, as that will require more thought, add a TODO for that. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCL: Detect destructive overlapsDavid Hildenbrand1-1/+18
We'll have to zero-out unused bit positions, so make sure to write the addresses back. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: MVCL: Zero out unused bits of addressDavid Hildenbrand1-2/+21
We have to zero out unused bits in 24 and 31-bit addressing mode. Provide a new helper. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/tcg: Reset exception_index to -1 instead of 0David Hildenbrand1-3/+3
We use the marker "-1" for "no exception". s390_cpu_do_interrupt() might get confused by that. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
2019-09-23s390x/cpumodel: Add the z15 name to the description of gen15aChristian Borntraeger1-1/+1
We now know that gen15a is called z15. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-23s390x/kvm: Officially require at least kernel 3.15Thomas Huth3-7/+7
Since QEMU v2.10, the KVM acceleration does not work on older kernels anymore since the code accidentally requires the KVM_CAP_DEVICE_CTRL capability now - it should have been optional instead. Instead of fixing the bug, we asked in the ChangeLog of QEMU 2.11 - 3.0 that people should speak up if they still need support of QEMU running with KVM on older kernels, but seems like nobody really complained. Thus let's make this official now and turn it into a proper error message, telling the users to use at least kernel 3.15 now. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20190913091443.27565-1-thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-23Merge tag 's390-ccw-bios-2019-09-18' of https://gitlab.com/huth/qemu into ↵Christian Borntraeger3-1/+2
s390-next Small fixes for the s390-ccw firmware
2019-09-20Acceptance tests: use avocado.utils.ssh for SSH interactionCleber Rosa2-56/+25
This replaces paramiko with avocado.utils.ssh module, which is based on a (open)ssh binary, supposedly more ubiquitous. Signed-off-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190919225905.10829-1-crosa@redhat.com> [Cleber: consolidated existing skipUnless from tests to setUp] Signed-off-by: Cleber Rosa <crosa@redhat.com>
2019-09-20tests/acceptance: Add new test cases in linux_ssh_mips_malta.pyAleksandar Markovic1-0/+45
Add 15 new tests cases. They all rely on simple commands used for detecting hardware configuration information. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1564760158-27536-3-git-send-email-aleksandar.markovic@rt-rk.com> Reviewed-by: Cleber Rosa <crosa@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-09-20tests/acceptance: Refactor and improve reporting in linux_ssh_mips_malta.pyAleksandar Markovic1-15/+21
This patch restructures code organization around the test case executions. At the same time, rather than outputing a cryptic message: FAIL: True not found in [False], the following will be reported too, if the command output does not meet specified expectations: 'lspci -d 11ab:4620' output doesn't contain the word 'GT-64120' Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1564760158-27536-2-git-send-email-aleksandar.markovic@rt-rk.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-09-20Acceptance test x86_cpu_model_versions: split into smaller testsCleber Rosa1-8/+15
The justifications being automatic destruction of the vm instances when no longer needed and more compact test naming under a common class. Besides those, a smaller test makes the one and only assertion rather obvious, which suggests that we could even get rid of the more verbose (and manual) error messages (to be decided). Naming of the tests tries to follow the following pattern: test_($cpu_version)_($no_arch_capabitilies_set_or_unset)_($machine_version) The presence of each naming component is optional, depending on whether the test manually sets it or not. Signed-off-by: Cleber Rosa <crosa@redhat.com> Message-Id: <20190828193628.7687-4-crosa@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-09-20Acceptance test x86_cpu_model_versions: fix mismatches between test and messagesCleber Rosa1-3/+3
This fixes a few mismatches between the test and the error messages produced in case of failures. Signed-off-by: Cleber Rosa <crosa@redhat.com> Message-Id: <20190828193628.7687-3-crosa@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-09-20Acceptance test x86_cpu_model_versions: shutdown VMsCleber Rosa1-0/+7
This shuts down the VMs that won't be used any longer during the remainder of the test. It's debatable if the very last one should also be shutdown manually, and my opinion is that it shouldn't because that's taken care by the immediately following tearDown(). Signed-off-by: Cleber Rosa <crosa@redhat.com> Message-Id: <20190828193628.7687-2-crosa@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2019-09-20Acceptance test machine_m68k_nextcube.py: relax the error code patternCleber Rosa1-1/+1
Instead of looking for a specific error, let's relax the pattern because different errors have been seen (I'm consistenly getting 52) and the real goal of this test is to validate the framebuffer operation, and not to reproduce one specific error. Signed-off-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20190919161400.26399-1-crosa@redhat.com> Signed-off-by: Cleber Rosa <crosa@redhat.com>
2019-09-20pc: Add an SMB0 ACPI device to q35Corey Minyard12-10/+28
This is so I2C devices can be found in the ACPI namespace. Currently that's only IPMI, but devices can be easily added now. Adding the devices required some PCI information, and the bus itself to be added to the PCMachineState structure. Note that this only works on Q35, the ACPI for PIIX4 is not capable of handling an SMBus device. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2019-09-20ipmi: Fix SSIF ACPI handling to use the right CRSCorey Minyard4-9/+10
Pass in the CRS so that it can be set to the SMBus for IPMI later. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20acpi: Add i2c serial bus CRS handlingCorey Minyard2-0/+58
This will be required for getting IPMI SSIF (SMBus interface) into the ACPI tables. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20ipmi: Add an SMBus IPMI interfaceCorey Minyard5-0/+392
Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20ipmi: Add PCI IPMI interfacesCorey Minyard7-0/+309
Pretty straightforward, just hook the current KCS and BT code into the PCI system with the proper configuration. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: M: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20smbios:ipmi: Ignore IPMI devices with no fwinfo functionCorey Minyard1-0/+3
Not all devices have fwinfo (like the coming PCI one), so ignore them if the their fwinfo function is NULL. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20ipmi: Allow a size value to be passed for I/O spaceCorey Minyard7-11/+44
PCI device I/O must be >= 8 bytes in length or they don't work. Allow the size to be passed in, the default size of 2 or 3 won't work. Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20ipmi: Split out BT-specific code from ISA BT codeCorey Minyard4-421/+520
Get ready for PCI and other BT interfaces. No functional changes, just split the code into generic BT code and ISA-specific BT code. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-20ipmi: Split out KCS-specific code from ISA KCS codeCorey Minyard4-397/+505
Get ready for PCI and other KCS interfaces. No functional changes, just split the code into the generic KCS code and the ISA-specific code. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-20ipmi: Add a UUID device propertyCorey Minyard2-11/+21
Using the UUID that qemu generates probably isn't the best thing to do, allow it to be passed in via properties, and use QemuUUID for the type. If the UUID is not set, return an unsupported command error. This way we are not providing an all-zero (or randomly generated) GUID to the IPMI user. This lets the host fall back to the other method of using the get device id command to determind the BMC being accessed. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: Cédric Le Goater <clg@kaod.org> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com>
2019-09-20qdev: Add a no default uuid propertyCorey Minyard1-0/+7
This is for IPMI, which will behave differently if the UUID is not set. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: Fam Zheng <famz@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2019-09-20tests:ipmi: Fix IPMI BT testsCorey Minyard2-4/+5
The IPMI BT tests had a race condition, if it receive an IPMI command to enable interrupt, it would write the message to enable interrupts after it wrote the command response. So the test code could receive the command response and issue the next command before the device handled the interrupt enable command, and thus no interrupt. So send the message to enable interrupt before the command response. Also add some sleeps to give qemu time to handle responses, there was no delay before, and it could result in an invalid timeout. And re-enable the tests, as hopefully they are fixed now. Note that I was unable to reproduce this even with the instructions Peter gave me, but hopefully this fixes the issue. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20ipmi: Generate an interrupt on watchdog pretimeout expiryCorey Minyard1-1/+3
Add the watchdog pretimeout to the bits that cause an interrupt on attn. Otherwise the user won't know. Signed-off-by: Corey Minyard <cminyard@mvista.com>
2019-09-20ipmi: Fix the get watchdog commandCorey Minyard1-0/+2
It wasn't returning the set timeout like it should have been. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-09-20ipmi: Fix watchdog NMI handlingCorey Minyard2-4/+4
The wrong logic was used for detection (so it wouldn't work at all) and the wrong interface was used to inject the NMI if the detection logic was correct. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
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