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2024-05-24target/ppc: Move mul{li, lw, lwo, hw, hwu} instructions to decodetree.Chinmay Rath3-89/+75
2024-05-24target/ppc: Move floating-point arithmetic instructions to decodetree.Chinmay Rath5-248/+192
2024-05-24target/ppc: Merge various fpu helpersChinmay Rath1-159/+62
2024-05-24target/ppc: Add ISA v3.1 variants of sync instructionNicholas Piggin2-15/+32
2024-05-24target/ppc: Fix embedded memory barriersNicholas Piggin1-2/+2
2024-05-24target/ppc: Move sync instructions to decodetreeNicholas Piggin3-100/+139
2024-05-24tcg/cputlb: remove other-cpu capability from TLB flushingNicholas Piggin1-33/+9
2024-05-24tcg/cputlb: Remove non-synced variants of global TLB flushesNicholas Piggin3-194/+19
2024-05-24target/ppc: Fix broadcast tlbie synchronisationNicholas Piggin4-2/+16
2024-05-24ppc/spapr: Add ibm,pi-featuresNicholas Piggin1-0/+28
2024-05-24spapr: avoid overhead of finding vhyp class in critical operationsNicholas Piggin8-40/+17
2024-05-23Merge tag 'pull-tcg-20240523' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson11-9/+73
2024-05-23Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson19-150/+491
2024-05-23Merge tag 'pull-loongarch-20240523' of https://gitlab.com/gaosong/qemu into s...Richard Henderson5-87/+176
2024-05-22accel/tcg: Init tb size and icount before plugin_gen_tb_endRichard Henderson1-4/+4
2024-05-22tcg/arm: Support TCG_TARGET_HAS_tst_vecRichard Henderson2-4/+21
2024-05-22tcg/aarch64: Support TCG_TARGET_HAS_tst_vecRichard Henderson2-3/+25
2024-05-22tcg: Expand TCG_COND_TST* if not TCG_TARGET_HAS_tst_vecRichard Henderson1-0/+18
2024-05-22tcg: Introduce TCG_TARGET_HAS_tst_vecRichard Henderson7-0/+7
2024-05-23hw/loongarch/virt: Fix FDT memory node address widthJiaxun Yang1-1/+2
2024-05-23target/loongarch: Add loongarch vector property unconditionallyBibo Mao1-10/+4
2024-05-23hw/loongarch: Remove minimum and default memory sizeBibo Mao1-5/+0
2024-05-23hw/loongarch: Refine system dram memory regionBibo Mao1-36/+17
2024-05-23hw/loongarch: Refine fwcfg memory mapBibo Mao1-3/+57
2024-05-23hw/loongarch: Refine fadt memory table for numa memoryBibo Mao1-3/+43
2024-05-23hw/loongarch: Refine acpi srat table for numa memoryBibo Mao1-24/+34
2024-05-23hw/loongarch: Add VM mode in IOCSR feature register in kvm modeBibo Mao1-3/+9
2024-05-23target/loongarch/kvm: fpu save the vreg registers high 192bitSong Gao1-0/+6
2024-05-23target/loongarch/kvm: Fix VM recovery from disk failuresSong Gao1-2/+4
2024-05-22Merge tag 'migration-20240522-pull-request' of https://gitlab.com/farosas/qem...Richard Henderson10-53/+64
2024-05-22tests/qtest/migration-test: Fix the check for a successful run of analyze-mig...Thomas Huth1-1/+1
2024-05-22tests/qtest/migration-test: Run some basic tests on s390x and ppc64 with TCG,...Thomas Huth1-19/+20
2024-05-22hw/core/machine: move compatibility flags for VirtIO-net USO to machine 8.1Fiona Ebner1-3/+3
2024-05-22virtio-gpu: fix v2 migrationMarc-André Lureau3-8/+24
2024-05-22migration: fix a typoMarc-André Lureau1-1/+1
2024-05-22migration: add "exists" info to load-state-field traceMarc-André Lureau2-3/+4
2024-05-22migration/colo: Tidy up bql_unlock() around bdrv_activate_all()Li Zhijian1-2/+1
2024-05-22migration/colo: make colo_incoming_co() return voidLi Zhijian4-13/+7
2024-05-22migration/colo: Minor fix for colo error messageLi Zhijian1-3/+3
2024-05-22target-i386: hyper-v: Correct kvm_hv_handle_exit return valuedonsheng1-1/+1
2024-05-22i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 2...Zhao Liu1-9/+1
2024-05-22i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[4]Zhao Liu2-43/+56
2024-05-22i386: Add cache topology info in CPUCacheInfoZhao Liu2-0/+43
2024-05-22hw/i386/pc: Support smp.modules for x86 PC machineZhao Liu2-8/+11
2024-05-22tests: Add test case of APIC ID for module level parsingZhuocheng Ding1-4/+15
2024-05-22i386/cpu: Introduce module-id to X86CPUZhao Liu3-8/+28
2024-05-22i386: Support module_id in X86CPUTopoIDsZhao Liu3-14/+34
2024-05-22i386: Expose module level in CPUID[0x1F]Zhao Liu4-3/+12
2024-05-22i386: Support modules_per_die in X86CPUTopoInfoZhao Liu4-31/+58
2024-05-22i386: Introduce module level cpu topology to CPUX86StateZhao Liu3-0/+9
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