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2019-11-26hvf: correctly handle REX prefix in relation to legacy prefixesCameron Esfahani2-38/+46
In real x86 processors, the REX prefix must come after legacy prefixes. REX before legacy is ignored. Update the HVF emulation code to properly handle this. Fix some spelling errors in constants. Fix some decoder table initialization issues found by Coverity. Signed-off-by: Cameron Esfahani <dirty@apple.com> Message-Id: <eff30ded8307471936bec5d84c3b6efbc95e3211.1574625592.git.dirty@apple.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-26hvf: remove TSC synchronization code because it isn't fully completeCameron Esfahani3-9/+1
The existing code in QEMU's HVF support to attempt to synchronize TSC across multiple cores is not sufficient. TSC value on other cores can go backwards. Until implementation is fixed, remove calls to hv_vm_sync_tsc(). Pass through TSC to guest OS. Signed-off-by: Cameron Esfahani <dirty@apple.com> Message-Id: <44c4afd2301b8bf99682b229b0796d84edd6d66f.1574625592.git.dirty@apple.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-26hvf: non-RAM, non-ROMD memory ranges are now correctly mapped inCameron Esfahani1-15/+35
If an area is non-RAM and non-ROMD, then remove mappings so accesses will trap and can be emulated. Change hvf_find_overlap_slot() to take a size instead of an end address: it wouldn't return a slot because callers would pass the same address for start and end. Don't always map area as read/write/execute, respect area flags. Signed-off-by: Cameron Esfahani <dirty@apple.com> Message-Id: <1d8476c8f86959273fbdf23c86f8b4b611f5e2e1.1574625592.git.dirty@apple.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-26target/i386: add two missing VMX features for Skylake and CascadeLake ServerPaolo Bonzini1-2/+4
They are present in client (Core) Skylake but pasted wrong into the server SKUs. Reported-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-25Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell3-24/+37
virtio, pc: fixes More small bugfixes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 25 Nov 2019 08:43:07 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: intel_iommu: TM field should not be in reserved bits intel_iommu: refine SL-PEs reserved fields checking virtio-input: fix memory leak on unrealize Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-25Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-11-25' into ↵Peter Maydell1-3/+5
staging Miscellaneous patches for 2019-11-25 # gpg: Signature made Mon 25 Nov 2019 06:00:24 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-misc-2019-11-25: util/cutils: Fix incorrect integer->float conversion caught by clang Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-25Merge remote-tracking branch 'remotes/gkurz/tags/9p-fix-2019-11-23' into stagingPeter Maydell1-2/+4
9pfs fixes for QEMU 4.2 This fixes a potential QEMU crash if the underlying filesystem returns a null block size in statfs(). # gpg: Signature made Sat 23 Nov 2019 15:19:36 GMT # gpg: using RSA key B4828BAF943140CEF2A3491071D4D5E5822F73D6 # gpg: Good signature from "Greg Kurz <groug@kaod.org>" [full] # gpg: aka "Gregory Kurz <gregory.kurz@free.fr>" [full] # gpg: aka "[jpeg image of size 3330]" [full] # Primary key fingerprint: B482 8BAF 9431 40CE F2A3 4910 71D4 D5E5 822F 73D6 * remotes/gkurz/tags/9p-fix-2019-11-23: 9pfs: Fix divide by zero bug Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-25intel_iommu: TM field should not be in reserved bitsQi, Yadong2-6/+16
When dt is supported, TM field should not be Reserved(0). Refer to VT-d Spec 9.8 Signed-off-by: Zhang, Qi <qi1.zhang@intel.com> Signed-off-by: Qi, Yadong <yadong.qi@intel.com> Message-Id: <20191125003321.5669-3-yadong.qi@intel.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-11-25intel_iommu: refine SL-PEs reserved fields checkingQi, Yadong2-21/+21
1. split the resevred fields arrays into two ones, 2. large page only effect for L2(2M) and L3(1G), so remove checking of L1 and L4 for large page. Signed-off-by: Zhang, Qi <qi1.zhang@intel.com> Signed-off-by: Qi, Yadong <yadong.qi@intel.com> Message-Id: <20191125003321.5669-2-yadong.qi@intel.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-11-25virtio-input: fix memory leak on unrealizeMarc-André Lureau1-0/+3
Spotted by ASAN + minor stylistic change. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20191121095649.25453-1-marcandre.lureau@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
2019-11-25util/cutils: Fix incorrect integer->float conversion caught by clangFangrui Song1-3/+5
Clang does not like do_strtosz()'s code to guard against overflow: qemu/util/cutils.c:245:23: error: implicit conversion from 'unsigned long' to 'double' changes value from 18446744073709550592 to 18446744073709551616 [-Werror,-Wimplicit-int-float-conversion] The warning will be enabled by default in clang 10. It is not available for clang <= 9. val * mul >= 0xfffffffffffffc00 is indeed wrong. 0xfffffffffffffc00 is not representable exactly as double. It's half-way between the representable values 0xfffffffffffff800 and 0x10000000000000000. Which one we get is implementation-defined. Bad. We want val * mul > (the largest uint64_t exactly representable as double). That's 0xfffffffffffff800. Write it as nextafter(0x1p64, 0) with a suitable comment. Signed-off-by: Fangrui Song <i@maskray.me> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Patch split, commit message improved] Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20191122080039.12771-3-armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Juan Quintela <quintela@redhat.com>
2019-11-239pfs: Fix divide by zero bugDan Schatzberg1-2/+4
Some filesystems may return 0s in statfs (trivially, a FUSE filesystem can do so). QEMU should handle this gracefully and just behave the same as if statfs failed. Signed-off-by: Dan Schatzberg <dschatzberg@fb.com> Acked-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org>
2019-11-21Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell4-1/+796
* x86 updates for Intel errata (myself, Eduardo) * the big ugly list of x86 VMX features, which was targeted for 5.0 but caused a Libvirt regression (myself) # gpg: Signature made Thu 21 Nov 2019 15:35:13 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: i386: Add -noTSX aliases for hle=off, rtm=off CPU models i386: Add new versions of Skylake/Cascadelake/Icelake without TSX target/i386: add support for MSR_IA32_TSX_CTRL target/i386: add VMX features to named CPU models Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-21i386: Add -noTSX aliases for hle=off, rtm=off CPU modelsEduardo Habkost1-0/+5
We have been trying to avoid adding new aliases for CPU model versions, but in the case of changes in defaults introduced by the TAA mitigation patches, the aliases might help avoid user confusion when applying host software updates. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-21i386: Add new versions of Skylake/Cascadelake/Icelake without TSXEduardo Habkost1-0/+47
One of the mitigation methods for TAA[1] is to disable TSX support on the host system. Linux added a mechanism to disable TSX globally through the kernel command line, and many Linux distributions now default to tsx=off. This makes existing CPU models that have HLE and RTM enabled not usable anymore. Add new versions of all CPU models that have the HLE and RTM features enabled, that can be used when TSX is disabled in the host system. References: [1] TAA, TSX asynchronous Abort: https://software.intel.com/security-software-guidance/insights/deep-dive-intel-transactional-synchronization-extensions-intel-tsx-asynchronous-abort https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/tsx_async_abort.html Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-21target/i386: add support for MSR_IA32_TSX_CTRLPaolo Bonzini4-1/+39
The MSR_IA32_TSX_CTRL MSR can be used to hide TSX (also known as the Trusty Side-channel Extension). By virtualizing the MSR, KVM guests can disable TSX and avoid paying the price of mitigating TSX-based attacks on microarchitectural side channels. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-21target/i386: add VMX features to named CPU modelsPaolo Bonzini1-0/+705
This allows using "-cpu Haswell,+vmx", which we did not really want to support in QEMU but was produced by Libvirt when using the "host-model" CPU model. Without this patch, no VMX feature is _actually_ supported (only the basic instruction set extensions are) and KVM fails to load in the guest. This was produced from the output of scripts/kvm/vmxcap using the following very ugly Python script: bits = { 'INS/OUTS instruction information': ['FEAT_VMX_BASIC', 'MSR_VMX_BASIC_INS_OUTS'], 'IA32_VMX_TRUE_*_CTLS support': ['FEAT_VMX_BASIC', 'MSR_VMX_BASIC_TRUE_CTLS'], 'External interrupt exiting': ['FEAT_VMX_PINBASED_CTLS', 'VMX_PIN_BASED_EXT_INTR_MASK'], 'NMI exiting': ['FEAT_VMX_PINBASED_CTLS', 'VMX_PIN_BASED_NMI_EXITING'], 'Virtual NMIs': ['FEAT_VMX_PINBASED_CTLS', 'VMX_PIN_BASED_VIRTUAL_NMIS'], 'Activate VMX-preemption timer': ['FEAT_VMX_PINBASED_CTLS', 'VMX_PIN_BASED_VMX_PREEMPTION_TIMER'], 'Process posted interrupts': ['FEAT_VMX_PINBASED_CTLS', 'VMX_PIN_BASED_POSTED_INTR'], 'Interrupt window exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_VIRTUAL_INTR_PENDING'], 'Use TSC offsetting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_USE_TSC_OFFSETING'], 'HLT exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_HLT_EXITING'], 'INVLPG exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_INVLPG_EXITING'], 'MWAIT exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_MWAIT_EXITING'], 'RDPMC exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_RDPMC_EXITING'], 'RDTSC exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_RDTSC_EXITING'], 'CR3-load exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_CR3_LOAD_EXITING'], 'CR3-store exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_CR3_STORE_EXITING'], 'CR8-load exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_CR8_LOAD_EXITING'], 'CR8-store exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_CR8_STORE_EXITING'], 'Use TPR shadow': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_TPR_SHADOW'], 'NMI-window exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_VIRTUAL_NMI_PENDING'], 'MOV-DR exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_MOV_DR_EXITING'], 'Unconditional I/O exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_UNCOND_IO_EXITING'], 'Use I/O bitmaps': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_USE_IO_BITMAPS'], 'Monitor trap flag': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_MONITOR_TRAP_FLAG'], 'Use MSR bitmaps': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_USE_MSR_BITMAPS'], 'MONITOR exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_MONITOR_EXITING'], 'PAUSE exiting': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_PAUSE_EXITING'], 'Activate secondary control': ['FEAT_VMX_PROCBASED_CTLS', 'VMX_CPU_BASED_ACTIVATE_SECONDARY_CONTROLS'], 'Virtualize APIC accesses': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES'], 'Enable EPT': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_ENABLE_EPT'], 'Descriptor-table exiting': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_DESC'], 'Enable RDTSCP': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_RDTSCP'], 'Virtualize x2APIC mode': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE'], 'Enable VPID': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_ENABLE_VPID'], 'WBINVD exiting': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_WBINVD_EXITING'], 'Unrestricted guest': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_UNRESTRICTED_GUEST'], 'APIC register emulation': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT'], 'Virtual interrupt delivery': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY'], 'PAUSE-loop exiting': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_PAUSE_LOOP_EXITING'], 'RDRAND exiting': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_RDRAND_EXITING'], 'Enable INVPCID': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_ENABLE_INVPCID'], 'Enable VM functions': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_ENABLE_VMFUNC'], 'VMCS shadowing': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_SHADOW_VMCS'], 'RDSEED exiting': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_RDSEED_EXITING'], 'Enable PML': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_ENABLE_PML'], 'Enable XSAVES/XRSTORS': ['FEAT_VMX_SECONDARY_CTLS', 'VMX_SECONDARY_EXEC_XSAVES'], 'Save debug controls': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_SAVE_DEBUG_CONTROLS'], 'Load IA32_PERF_GLOBAL_CTRL': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL'], 'Acknowledge interrupt on exit': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_ACK_INTR_ON_EXIT'], 'Save IA32_PAT': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_SAVE_IA32_PAT'], 'Load IA32_PAT': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_LOAD_IA32_PAT'], 'Save IA32_EFER': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_SAVE_IA32_EFER'], 'Load IA32_EFER': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_LOAD_IA32_EFER'], 'Save VMX-preemption timer value': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER'], 'Clear IA32_BNDCFGS': ['FEAT_VMX_EXIT_CTLS', 'VMX_VM_EXIT_CLEAR_BNDCFGS'], 'Load debug controls': ['FEAT_VMX_ENTRY_CTLS', 'VMX_VM_ENTRY_LOAD_DEBUG_CONTROLS'], 'IA-32e mode guest': ['FEAT_VMX_ENTRY_CTLS', 'VMX_VM_ENTRY_IA32E_MODE'], 'Load IA32_PERF_GLOBAL_CTRL': ['FEAT_VMX_ENTRY_CTLS', 'VMX_VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL'], 'Load IA32_PAT': ['FEAT_VMX_ENTRY_CTLS', 'VMX_VM_ENTRY_LOAD_IA32_PAT'], 'Load IA32_EFER': ['FEAT_VMX_ENTRY_CTLS', 'VMX_VM_ENTRY_LOAD_IA32_EFER'], 'Load IA32_BNDCFGS': ['FEAT_VMX_ENTRY_CTLS', 'VMX_VM_ENTRY_LOAD_BNDCFGS'], 'Store EFER.LMA into IA-32e mode guest control': ['FEAT_VMX_MISC', 'MSR_VMX_MISC_STORE_LMA'], 'HLT activity state': ['FEAT_VMX_MISC', 'MSR_VMX_MISC_ACTIVITY_HLT'], 'VMWRITE to VM-exit information fields': ['FEAT_VMX_MISC', 'MSR_VMX_MISC_VMWRITE_VMEXIT'], 'Inject event with insn length=0': ['FEAT_VMX_MISC', 'MSR_VMX_MISC_ZERO_LEN_INJECT'], 'Execute-only EPT translations': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_EXECONLY'], 'Page-walk length 4': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_PAGE_WALK_LENGTH_4'], 'Paging-structure memory type WB': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_WB'], '2MB EPT pages': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_2MB | MSR_VMX_EPT_1GB'], 'INVEPT supported': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVEPT'], 'EPT accessed and dirty flags': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_AD_BITS'], 'Single-context INVEPT': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVEPT_SINGLE_CONTEXT'], 'All-context INVEPT': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVEPT_ALL_CONTEXT'], 'INVVPID supported': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVVPID'], 'Individual-address INVVPID': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVVPID_SINGLE_ADDR'], 'Single-context INVVPID': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT'], 'All-context INVVPID': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVVPID_ALL_CONTEXT'], 'Single-context-retaining-globals INVVPID': ['FEAT_VMX_EPT_VPID_CAPS', 'MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT_NOGLOBALS'], 'EPTP Switching': ['FEAT_VMX_VMFUNC', 'MSR_VMX_VMFUNC_EPT_SWITCHING'] } import sys import textwrap out = {} for l in sys.stdin.readlines(): l = l.rstrip() if l.endswith('!!'): l = l[:-2].rstrip() if l.startswith(' ') and (l.endswith('default') or l.endswith('yes')): l = l[4:] for key, value in bits.items(): if l.startswith(key): ctl, bit = value if ctl in out: out[ctl] = out[ctl] + ' | ' else: out[ctl] = ' [%s] = ' % ctl out[ctl] = out[ctl] + bit for x in sorted(out.keys()): print("\n ".join(textwrap.wrap(out[x] + ","))) Note that the script has a bug in that some keys apply to both VM entry and VM exit controls ("load IA32_PERF_GLOBAL_CTRL", "load IA32_EFER", "load IA32_PAT". Those have to be fixed by hand. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-21Merge remote-tracking branch ↵Peter Maydell4-3/+10
'remotes/kraxel/tags/fixes-20191121-pull-request' into staging two audio fixes and one gtk message fix. # gpg: Signature made Thu 21 Nov 2019 10:04:32 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/fixes-20191121-pull-request: ui/gtk: fix gettext message's charset. display: xlnx_dp: Provide sufficient bytes for silent audio channel audio: fix audio recording Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-21Merge remote-tracking branch ↵Peter Maydell7-12/+30
'remotes/stsquad/tags/pull-rc3-testing-and-tcg-201119-1' into staging A few test and doc fixes: - tweak DEBUG behaviour for vm-test-build - rename and update plug docs for versioning - slim down MAIN_SOFTMMU_TARGETS # gpg: Signature made Wed 20 Nov 2019 10:56:23 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-rc3-testing-and-tcg-201119-1: tests/tcg: modify multiarch tests to work with clang .travis.yml: drop 32 bit systems from MAIN_SOFTMMU_TARGETS docs/devel: update tcg-plugins.rst with API versioning details docs/devel: rename plugins.rst to tcg-plugins.rst tests/vm: make --interactive (and therefore DEBUG=1) unconditional Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-21ui/gtk: fix gettext message's charset.yanminhui2-1/+2
Signed-off-by: yanminhui <yanminhui163@163.com> Message-Id: <20191116031037.1207-1-yanminhui163@163.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-11-21display: xlnx_dp: Provide sufficient bytes for silent audio channelSai Pavan Boddu1-2/+7
Fill the audio channel with required number of bytes to cover the elapsed time. This prevents rate control reset, and avoids debug prints like below log: Resetting rate control (65692 samples) ... Resetting rate control (65721 samples) ... Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1573833408-2388-1-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-11-20Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell3-4/+4
virtio, acpi: fixes A couple of bugfixes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 20 Nov 2019 09:57:44 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: tests: acpi: always retain dumped ACPI tables in case of error vhost-user-input: use free(elem) instead of g_free(elem) libvhost-user: Zero memory allocated for VuVirtqInflightDesc Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-20tests/tcg: modify multiarch tests to work with clangTaylor Simpson2-3/+5
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <1574032465-12186-1-git-send-email-tsimpson@quicinc.com> [AJB: tweak header line] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-11-20.travis.yml: drop 32 bit systems from MAIN_SOFTMMU_TARGETSAlex Bennée1-1/+1
The older clangs are still struggling to build and run everything withing the 50 minute timeout so lets lighten the load a bit more. We still have coverage for GCC and hopefully no obscure 32 bit guest only breakages slip through the cracks. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
2019-11-20docs/devel: update tcg-plugins.rst with API versioning detailsAlex Bennée1-6/+21
While we are at it fix up the quoted code sections with the inline :: approach. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Robert Foley <robert.foley@linaro.org>
2019-11-20docs/devel: rename plugins.rst to tcg-plugins.rstAlex Bennée3-1/+2
This makes it a bit clearer what this is about. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-20tests/vm: make --interactive (and therefore DEBUG=1) unconditionalAlex Bennée1-1/+1
While the concept of only dropping to ssh if a test fails is nice it is more useful for this to be unconditional. You usually just want to get the build up and running and then noodle around debugging or attempting to replicate. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
2019-11-20tests: acpi: always retain dumped ACPI tables in case of errorIgor Mammedov1-1/+1
If IASL wasn't able to parse expected file, test will just print warning "Warning! iasl couldn't parse the expected aml\n" and remove temporary table dumped from guest. Typically expected tables are always valid, with an exception when patchset introduces new tables. Make sure dumped tables are retained even if expected files are not valid, so one could have a chance to manualy check new tables. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1574240560-12538-1-git-send-email-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-11-20vhost-user-input: use free(elem) instead of g_free(elem)Stefan Hajnoczi1-2/+2
The virtqueue element returned by vu_queue_pop() is allocated using malloc(3) by virtqueue_alloc_element(). Use the matching free(3) function instead of glib's g_free(). Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20191119111626.112206-1-stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-20libvhost-user: Zero memory allocated for VuVirtqInflightDescXie Yongji1-1/+1
Use a zero-initialized VuVirtqInflightDesc struct to avoid that scan-build reports that vq->resubmit_list[0].counter may be garbage value in vu_check_queue_inflights(). Fixes: 5f9ff1eff ("libvhost-user: Support tracking inflight I/O in shared memory") Reported-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Xie Yongji <xieyongji@baidu.com> Message-Id: <20191119075759.4334-1-xieyongji@baidu.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-11-20audio: fix audio recordingVolker Rümelin1-0/+1
With current code audio recording with all audio backends except PulseAudio and DirectSound is broken. The generic audio recording buffer management forgot to update the current read position after a read. Fixes: ff095e5231 "audio: api for mixeng code free backends" Signed-off-by: Volker Rümelin <vr_qemu@t-online.de> Reviewed-by: Zoltán Kővágó <DirtY.iCE.hu@gmail.com> Message-id: 2fc947cf-7b42-de68-3f11-cbcf1c096be9@t-online.de Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-11-19Update version for v4.2.0-rc2 releasev4.2.0-rc2Peter Maydell1-1/+1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell16-59/+103
* microvm docs and fixes (Sergio, Liam) * New processor features for Intel errata (myself, Pawan) * Kconfig fixes (myself, Thomas) * Revert mc146818rtc change (myself) * Deprecate scsi-disk (myself) * RTC fix (myself, Marcelo) # gpg: Signature made Tue 19 Nov 2019 09:03:49 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: mc146818rtc: fix timer interrupt reinjection again Revert "mc146818rtc: fix timer interrupt reinjection" scsi: deprecate scsi-disk hw/i386: Move save_tsc_khz from PCMachineClass to X86MachineClass docs/microvm.rst: add instructions for shutting down the guest docs/microvm.rst: fix alignment in "Limitations" vfio: vfio-pci requires EDID hw/i386: Fix compiler warning when CONFIG_IDE_ISA is disabled target/i386: Export TAA_NO bit to guests target/i386: add PSCHANGE_NO bit for the ARCH_CAPABILITIES MSR microvm: fix memory leak in microvm_fix_kernel_cmdline scripts: Detect git worktrees for get_maintainer.pl --git Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20191119' ↵Peter Maydell5-22/+22
into staging The DTrace via SystemTap backend can not support the dynamic '*' width format. We failed at noticing it for the 4.1 release, and LP#1844817 was opened to track it. Fix this regression for the next release. # gpg: Signature made Tue 19 Nov 2019 13:56:50 GMT # gpg: using RSA key 89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (Phil) <philmd@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 89C1 E78F 601E E86C 8674 95CB A2A3 FD6E DEAD C0DE * remotes/philmd-gitlab/tags/mips-next-20191119: hw/mips/gt64xxx: Remove dynamic field width from trace events hw/block/pflash: Remove dynamic field width from trace events Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19hw/mips/gt64xxx: Remove dynamic field width from trace eventsPhilippe Mathieu-Daudé2-10/+10
Since not all trace backends support dynamic field width in format (dtrace via stap does not), replace by a static field width instead. We previously passed to the trace API 'width << 1' as the number of hex characters to display (the dynamic field width). We don't need this anymore. Instead, display the size of bytes accessed. Fixes: ab6bff424f ("gt64xxx_pci: Convert debug printf to trace events") Reported-by: Eric Blake <eblake@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Buglink: https://bugs.launchpad.net/qemu/+bug/1844817 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-19hw/block/pflash: Remove dynamic field width from trace eventsPhilippe Mathieu-Daudé3-12/+12
Since not all trace backends support dynamic field width in format (dtrace via stap does not), replace by a static field width instead. We previously passed to the trace API 'width << 1' as the number of hex characters to display (the dynamic field width). We don't need this anymore. Instead, display the size of bytes accessed. Fixes: e8aa2d95ea ("pflash: Simplify trace_pflash_io_read/write") Fixes: c1474acd5d ("pflash: Simplify trace_pflash_data_read/write") Reported-by: Eric Blake <eblake@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Buglink: https://bugs.launchpad.net/qemu/+bug/1844817 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-11-19Merge remote-tracking branch ↵Peter Maydell8-81/+113
'remotes/pmaydell/tags/pull-target-arm-20191119' into staging target-arm queue: * Support EL0 v7m msr/mrs for CONFIG_USER_ONLY * Relax r13 restriction for ldrex/strex for v8.0 * Do not reject rt == rt2 for strexd * net/cadence_gem: Set PHY autonegotiation restart status * ssi: xilinx_spips: Skip spi bus update for a few register writes * pl031: Expose RTCICR as proper WC register # gpg: Signature made Tue 19 Nov 2019 13:30:35 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20191119: target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY target/arm: Relax r13 restriction for ldrex/strex for v8.0 target/arm: Do not reject rt == rt2 for strexd net/cadence_gem: Set PHY autonegotiation restart status ssi: xilinx_spips: Skip spi bus update for a few register writes target/arm: Merge arm_cpu_vq_map_next_smaller into sole caller pl031: Expose RTCICR as proper WC register Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLYRichard Henderson2-43/+73
Simply moving the non-stub helper_v7m_mrs/msr outside of !CONFIG_USER_ONLY is not an option, because of all of the other system-mode helpers that are called. But we can split out a few subroutines to handle the few EL0 accessible registers without duplicating code. Reported-by: Christophe Lyon <christophe.lyon@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191118194916.3670-1-richard.henderson@linaro.org [PMM: deleted now-redundant comment; added a default case to switch in v7m_msr helper] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19target/arm: Relax r13 restriction for ldrex/strex for v8.0Richard Henderson1-4/+8
Armv8-A removes UNPREDICTABLE for R13 for these cases. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191117090621.32425-3-richard.henderson@linaro.org [PMM: changed ENABLE_ARCH_8 checks to check a new bool 'v8a', since these cases are still UNPREDICTABLE for v8M] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19target/arm: Do not reject rt == rt2 for strexdRichard Henderson1-1/+1
There was too much cut and paste between ldrexd and strexd, as ldrexd does prohibit two output registers the same. Fixes: af288228995 Reported-by: Michael Goffioul <michael.goffioul@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191117090621.32425-2-richard.henderson@linaro.org Reviewed-by: Robert Foley <robert.foley@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19net/cadence_gem: Set PHY autonegotiation restart statusLinus Ziegert1-4/+5
The Linux kernel PHY driver sets AN_RESTART in the BMCR of the PHY when autonegotiation is started. Recently the kernel started to read back the PHY's AN_RESTART bit and now checks whether the autonegotiation is complete and the bit was cleared [1]. Otherwise the link status is down. The emulated PHY needs to clear AN_RESTART immediately to inform the kernel driver about the completion of autonegotiation phase. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c36757eb9dee Signed-off-by: Linus Ziegert <linus.ziegert+qemu@holoplot.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20191104181604.21943-1-linus.ziegert+qemu@holoplot.com Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19ssi: xilinx_spips: Skip spi bus update for a few register writesSai Pavan Boddu1-4/+18
A few configuration register writes need not update the spi bus state, so just return after the register write. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Tested-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1573830705-14579-1-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19target/arm: Merge arm_cpu_vq_map_next_smaller into sole callerRichard Henderson3-20/+7
Coverity reports, in sve_zcr_get_valid_len, "Subtract operation overflows on operands arm_cpu_vq_map_next_smaller(cpu, start_vq + 1U) and 1U" First, the aarch32 stub version of arm_cpu_vq_map_next_smaller, returning 0, does exactly what Coverity reports. Remove it. Second, the aarch64 version of arm_cpu_vq_map_next_smaller has a set of asserts, but they don't cover the case in question. Further, there is a fair amount of extra arithmetic needed to convert from the 0-based zcr register, to the 1-base vq form, to the 0-based bitmap, and back again. This can be simplified by leaving the value in the 0-based form. Finally, use test_bit to simplify the common case, where the length in the zcr registers is in fact a supported length. Reported-by: Coverity (CID 1407217) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 20191118091414.19440-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19pl031: Expose RTCICR as proper WC registerAlexander Graf1-5/+1
The current PL031 RTCICR register implementation always clears the IRQ pending status on a register write, regardless of the value the guest writes. To justify that behavior, it references the ARM926EJ-S Development Chip Reference Manual (DDI0287B) and indicates that said document states that any write clears the internal IRQ state. It is indeed true that in section 11.1 this document says: "The interrupt is cleared by writing any data value to the interrupt clear register RTCICR". However, later in section 11.2.2 it contradicts itself by saying: "Writing 1 to bit 0 of RTCICR clears the RTCINTR flag." The latter statement matches the PL031 TRM (DDI0224C), which says: "Writing 1 to bit position 0 clears the corresponding interrupt. Writing 0 has no effect." Let's assume that the self-contradictory DDI0287B is in error, and follow the reference manual for the device itself, by making the register write-one-to-clear. Reported-by: Hendrik Borghorst <hborghor@amazon.de> Signed-off-by: Alexander Graf <graf@amazon.com> Message-id: 20191104115228.30745-1-graf@amazon.com [PMM: updated commit message to note that DDI0287B says two conflicting things] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2019-11-19' ↵Peter Maydell1-5/+31
into staging Monitor patches for 2019-11-19 # gpg: Signature made Tue 19 Nov 2019 08:50:57 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-monitor-2019-11-19: monitor/qmp: resume monitor when clearing its queue Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-11-19' into ↵Peter Maydell44-40/+606
staging nbd patches for 2019-11-19 - iotests: more tests of NBD reconnect, various test output improvements - nbd: fix spec compliance issue with long strings - slience a Coverity warning on coroutines # gpg: Signature made Tue 19 Nov 2019 03:06:41 GMT # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2019-11-19: tests: More iotest 223 improvements iotests: Include QMP input in .out files iotests: Switch nbd tests to use Unix rather than TCP iotests: Fix 173 MAINTAINERS: add more bitmap-related to Dirty Bitmaps section nbd: Don't send oversize strings bitmap: Enforce maximum bitmap name length nbd/server: Prefer heap over stack for parsing client names qemu-coroutine-sleep: Silence Coverity warning iotests: Test NBD client reconnection Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-19mc146818rtc: fix timer interrupt reinjection againPaolo Bonzini1-7/+9
Commit 369b41359af46bded5799c9ef8be2b641d92e043 broke timer interrupt reinjection when there is no period change by the guest. In that case, old_period is 0, which ends up zeroing irq_coalesced (counter of reinjected interrupts). The consequence is Windows 7 is unable to synchronize time via NTP. Easily reproducible by playing a fullscreen video with cirrus and VNC. Fix by passing s->period when periodic_timer_update is called due to expiration of the timer. With this change, old_period == 0 only means that the periodic timer was off. Reported-by: Marcelo Tosatti <mtosatti@redhat.com> Co-developed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-19Revert "mc146818rtc: fix timer interrupt reinjection"Paolo Bonzini1-34/+33
This reverts commit b429de730174b388ea5760e3debb0d542ea3c261, except that the reversal of the outer "if (period)" is left in. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-19scsi: deprecate scsi-diskPaolo Bonzini4-3/+23
It's an old compatibility shim that just delegates to scsi-cd or scsi-hd. Just like ide-drive, we don't need this. Acked-by: Peter Krempa <pkrempa@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-19hw/i386: Move save_tsc_khz from PCMachineClass to X86MachineClassLiam Merwick7-9/+9
Attempting to migrate a VM using the microvm machine class results in the source QEMU aborting with the following message/backtrace: target/i386/machine.c:955:tsc_khz_needed: Object 0x555556608fa0 is not an instance of type generic-pc-machine abort() object_class_dynamic_cast_assert() vmstate_save_state_v() vmstate_save_state() vmstate_save() qemu_savevm_state_complete_precopy() migration_thread() migration_thread() migration_thread() qemu_thread_start() start_thread() clone() The access to the machine class returned by MACHINE_GET_CLASS() in tsc_khz_needed() is crashing as it is trying to dereference a different type of machine class object (TYPE_PC_MACHINE) to that of this microVM. This can be resolved by extending the changes in the following commit f0bb276bf8d5 ("hw/i386: split PCMachineState deriving X86MachineState from it") and moving the save_tsc_khz field in PCMachineClass to X86MachineClass. Fixes: f0bb276bf8d5 ("hw/i386: split PCMachineState deriving X86MachineState from it") Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <1574075605-25215-1-git-send-email-liam.merwick@oracle.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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