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2021-05-25target/arm: Implement SVE2 FLOGBStephen Long4-0/+119
2021-05-25target/arm: Implement SVE2 FCVTXNT, FCVTXStephen Long2-10/+41
2021-05-25target/arm: Implement SVE2 FCVTLTStephen Long4-0/+46
2021-05-25target/arm: Implement SVE2 FCVTNTRichard Henderson4-0/+45
2021-05-25target/arm: Implement SVE2 TBL, TBXStephen Long4-19/+119
2021-05-25target/arm: Implement SVE2 crypto constructive binary operationsRichard Henderson3-0/+25
2021-05-25target/arm: Implement SVE2 crypto destructive binary operationsRichard Henderson3-0/+50
2021-05-25target/arm: Implement SVE2 crypto unary operationsRichard Henderson2-0/+17
2021-05-25target/arm: Implement SVE mixed sign dot productRichard Henderson4-0/+22
2021-05-25target/arm: Implement SVE mixed sign dot product (indexed)Richard Henderson5-0/+31
2021-05-25target/arm: Macroize helper_gvec_{s,u}dot_idx_{b,h}Richard Henderson1-131/+29
2021-05-25target/arm: Macroize helper_gvec_{s,u}dot_{b,h}Richard Henderson1-64/+22
2021-05-25target/arm: Implement SVE2 complex integer dot productRichard Henderson4-0/+135
2021-05-25target/arm: Implement SVE2 complex integer multiply-add (indexed)Richard Henderson4-0/+64
2021-05-25target/arm: Implement SVE2 integer multiply long (indexed)Richard Henderson4-0/+31
2021-05-25target/arm: Implement SVE2 multiply-add long (indexed)Richard Henderson4-0/+71
2021-05-25target/arm: Implement SVE2 saturating multiply high (indexed)Richard Henderson4-0/+118
2021-05-25target/arm: Implement SVE2 signed saturating doubling multiply highRichard Henderson4-0/+116
2021-05-25target/arm: Implement SVE2 saturating multiply (indexed)Richard Henderson4-0/+51
2021-05-25target/arm: Implement SVE2 saturating multiply-add (indexed)Richard Henderson4-0/+76
2021-05-25target/arm: Implement SVE2 saturating multiply-add high (indexed)Richard Henderson4-0/+66
2021-05-25target/arm: Implement SVE2 integer multiply-add (indexed)Richard Henderson2-0/+39
2021-05-25target/arm: Implement SVE2 integer multiply (indexed)Richard Henderson2-0/+37
2021-05-25target/arm: Split out formats for 3 vectors + 1 indexRichard Henderson2-20/+47
2021-05-25target/arm: Split out formats for 2 vectors + 1 indexRichard Henderson1-4/+10
2021-05-25target/arm: Pass separate addend to FCMLA helpersRichard Henderson5-51/+62
2021-05-25target/arm: Pass separate addend to {U, S}DOT helpersRichard Henderson6-77/+110
2021-05-25target/arm: Use correct output type for gvec_sdot_*_bRichard Henderson1-4/+4
2021-05-25target/arm: Implement SVE2 SPLICE, EXTStephen Long2-7/+39
2021-05-25target/arm: Implement SVE2 FMMLAStephen Long5-0/+125
2021-05-25target/arm: Implement SVE2 gather load insnsStephen Long2-0/+19
2021-05-25target/arm: Implement SVE2 scatter store insnsStephen Long2-0/+18
2021-05-25target/arm: Implement SVE2 XARRichard Henderson8-21/+172
2021-05-25target/arm: Implement SVE2 HISTCNT, HISTSEGStephen Long4-0/+163
2021-05-25target/arm: Implement SVE2 RSUBHNB, RSUBHNTStephen Long4-0/+22
2021-05-25target/arm: Implement SVE2 SUBHNB, SUBHNTStephen Long4-0/+23
2021-05-25target/arm: Implement SVE2 RADDHNB, RADDHNTStephen Long4-0/+22
2021-05-25target/arm: Implement SVE2 ADDHNB, ADDHNTStephen Long4-0/+62
2021-05-25target/arm: Implement SVE2 complex integer multiply-addRichard Henderson6-8/+113
2021-05-25target/arm: Implement SVE2 integer multiply-add longRichard Henderson4-0/+133
2021-05-25target/arm: Implement SVE2 saturating multiply-add highRichard Henderson4-6/+195
2021-05-25target/arm: Implement SVE2 saturating multiply-add longRichard Henderson4-0/+112
2021-05-25target/arm: Implement SVE2 MATCH, NMATCHStephen Long4-0/+101
2021-05-25target/arm: Implement SVE2 bitwise ternary operationsRichard Henderson4-0/+281
2021-05-25target/arm: Implement SVE2 WHILERW, WHILEWRRichard Henderson2-0/+70
2021-05-25target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHSRichard Henderson4-17/+82
2021-05-25target/arm: Implement SVE2 SQSHRN, SQRSHRNRichard Henderson4-0/+149
2021-05-25target/arm: Implement SVE2 UQSHRN, UQRSHRNRichard Henderson4-0/+137
2021-05-25target/arm: Implement SVE2 SQSHRUN, SQRSHRUNRichard Henderson4-0/+153
2021-05-25target/arm: Implement SVE2 SHRN, RSHRNRichard Henderson4-2/+236