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2019-10-01target/mips: msa: Split helpers for AVE_<S|U>.<B|H|W|D>Aleksandar Markovic3-25/+187
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-13-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: msa: Split helpers for B<CLR|NEG|SEL>.<B|H|W|D>Aleksandar Markovic3-35/+267
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-12-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: msa: Unroll loops and demacro <BMNZ|BMZ|BSEL>.VAleksandar Markovic2-27/+43
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-11-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: msa: Split helpers for BINS<L|R>.<B|H|W|D>Aleksandar Markovic3-40/+206
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-10-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: msa: Split helpers for PCNT.<B|H|W|D>Aleksandar Markovic3-73/+95
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: msa: Split helpers for <NLOC|NLZC>.<B|H|W|D>Aleksandar Markovic3-33/+181
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: Clean up translate.cAleksandar Markovic1-12/+18
Mostly fix errors and warnings reported by 'checkpatch.pl -f'. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1569331602-2586-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: Clean up mips-defs.hAleksandar Markovic1-26/+32
Mostly fix errors and warnings reported by 'checkpatch.pl -f'. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1569331602-2586-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: Clean up kvm_mips.hAleksandar Markovic1-1/+1
Mostly fix errors and warnings reported by 'checkpatch.pl -f'. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1569331602-2586-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-10-01target/mips: Clean up internal.hAleksandar Markovic1-23/+37
Mostly fix errors and warnings reported by 'checkpatch.pl -f'. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1569331602-2586-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-09-30Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20190930' into ↵Peter Maydell9-128/+203
staging - do not abuse memory_region_allocate_system_memory and split the memory according to KVM memslots in KVM code instead (Paolo, Igor) - change splitting to split at 4TB (Christian) - do not claim s390 (31bit) support in configure (Thomas) - sclp error checking (Janosch, Claudio) - new s390 pci maintainer (Matt, Collin) - fix s390 pci (again) (Matt) # gpg: Signature made Mon 30 Sep 2019 12:52:51 BST # gpg: using RSA key 117BBC80B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" [full] # Primary key fingerprint: F922 9381 A334 08F9 DBAB FBCA 117B BC80 B5A6 1C7C * remotes/borntraeger/tags/s390x-20190930: s390/kvm: split kvm mem slots at 4TB s390: do not call memory_region_allocate_system_memory() multiple times kvm: split too big memory section on several memslots kvm: clear dirty bitmaps from all overlapping memslots kvm: extract kvm_log_clear_one_slot configure: Remove s390 (31-bit mode) from the list of supported CPUs s390x: sclp: Report insufficient SCCB length s390x: sclp: fix error handling for oversize control blocks s390x: sclp: boundary check s390x: sclp: refactor invalid command check s390: PCI: fix IOMMU region init MAINTAINERS: Update S390 PCI Maintainer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-30s390/kvm: split kvm mem slots at 4TBChristian Borntraeger1-5/+4
Instead of splitting at an unaligned address, we can simply split at 4TB. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Igor Mammedov <imammedo@redhat.com>
2019-09-30s390: do not call memory_region_allocate_system_memory() multiple timesIgor Mammedov2-27/+14
s390 was trying to solve limited KVM memslot size issue by abusing memory_region_allocate_system_memory(), which breaks API contract where the function might be called only once. Beside an invalid use of API, the approach also introduced migration issue, since RAM chunks for each KVM_SLOT_MAX_BYTES are transferred in migration stream as separate RAMBlocks. After discussion [1], it was agreed to break migration from older QEMU for guest with RAM >8Tb (as it was relatively new (since 2.12) and considered to be not actually used downstream). Migration should keep working for guests with less than 8TB and for more than 8TB with QEMU 4.2 and newer binary. In case user tries to migrate more than 8TB guest, between incompatible QEMU versions, migration should fail gracefully due to non-exiting RAMBlock ID or RAMBlock size mismatch. Taking in account above and that now KVM code is able to split too big MemorySection into several memslots, partially revert commit (bb223055b s390-ccw-virtio: allow for systems larger that 7.999TB) and use kvm_set_max_memslot_size() to set KVMSlot size to KVM_SLOT_MAX_BYTES. 1) [PATCH RFC v2 4/4] s390: do not call memory_region_allocate_system_memory() multiple times Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20190924144751.24149-5-imammedo@redhat.com> Acked-by: Peter Xu <peterx@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30kvm: split too big memory section on several memslotsIgor Mammedov2-44/+81
Max memslot size supported by kvm on s390 is 8Tb, move logic of splitting RAM in chunks upto 8T to KVM code. This way it will hide KVM specific restrictions in KVM code and won't affect board level design decisions. Which would allow us to avoid misusing memory_region_allocate_system_memory() API and eventually use a single hostmem backend for guest RAM. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20190924144751.24149-4-imammedo@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30kvm: clear dirty bitmaps from all overlapping memslotsPaolo Bonzini1-14/+22
Currently MemoryRegionSection has 1:1 mapping to KVMSlot. However next patch will allow splitting MemoryRegionSection into several KVMSlot-s, make sure that kvm_physical_log_slot_clear() is able to handle such 1:N mapping. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-Id: <20190924144751.24149-3-imammedo@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30kvm: extract kvm_log_clear_one_slotPaolo Bonzini1-46/+57
We may need to clear the dirty bitmap for more than one KVM memslot. First do some code movement with no semantic change. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-Id: <20190924144751.24149-2-imammedo@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> [fixup line break]
2019-09-30configure: Remove s390 (31-bit mode) from the list of supported CPUsThomas Huth1-1/+1
On IBM Z, KVM in the kernel is only implemented for 64-bit mode, and with regards to TCG, we also only support 64-bit host CPUs (see the check at the beginning of tcg/s390/tcg-target.inc.c), so we should remove s390 (without "x", i.e. the old 31-bit mode CPUs) from the list of supported CPUs. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20190928190334.6897-1-thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30s390x: sclp: Report insufficient SCCB lengthClaudio Imbrenda1-0/+12
Return the correct error code when the SCCB buffer is too small to contain all of the output, for the Read SCP Information and Read CPU Information commands. Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Message-Id: <1569591203-15258-5-git-send-email-imbrenda@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30s390x: sclp: fix error handling for oversize control blocksJanosch Frank1-2/+1
Requests over 4k are not a spec exception. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Message-Id: <1569591203-15258-4-git-send-email-imbrenda@linux.ibm.com> Acked-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30s390x: sclp: boundary checkJanosch Frank1-0/+5
All sclp codes need to be checked for page boundary violations. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Message-Id: <1569591203-15258-3-git-send-email-imbrenda@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30s390x: sclp: refactor invalid command checkJanosch Frank2-4/+16
Invalid command checking has to be done before the boundary check, refactoring it now allows to insert the boundary check at the correct place later. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Message-Id: <1569591203-15258-2-git-send-email-imbrenda@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30s390: PCI: fix IOMMU region initMatthew Rosato1-1/+6
The fix in dbe9cf606c shrinks the IOMMU memory region to a size that seems reasonable on the surface, however is actually too small as it is based against a 0-mapped address space. This causes breakage with small guests as they can overrun the IOMMU window. Let's go back to the prior method of initializing iommu for now. Fixes: dbe9cf606c ("s390x/pci: Set the iommu region size mpcifc request") Cc: qemu-stable@nongnu.org Reviewed-by: Pierre Morel <pmorel@linux.ibm.com> Reported-by: Boris Fiuczynski <fiuczy@linux.ibm.com> Tested-by: Boris Fiuczynski <fiuczy@linux.ibm.com> Reported-by: Stefan Zimmerman <stzi@linux.ibm.com> Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Message-Id: <1569507036-15314-1-git-send-email-mjrosato@linux.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30MAINTAINERS: Update S390 PCI MaintainerMatthew Rosato1-1/+1
As discussed previously with Collin, I will take over maintaining s390 pci. Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Message-Id: <1569590461-12562-1-git-send-email-mjrosato@linux.ibm.com> Acked-by: Collin Walling <walling@linux.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2019-09-30Merge remote-tracking branch ↵Peter Maydell9-106/+131
'remotes/pmaydell/tags/pull-target-arm-20190927' into staging target-arm queue: * Fix the CBAR register implementation for Cortex-A53, Cortex-A57, Cortex-A72 * Fix direct booting of Linux kernels on emulated CPUs which have an AArch32 EL3 (incorrect NSACR settings meant they could not access the FPU) * semihosting cleanup: do more work at translate time and less work at runtime # gpg: Signature made Fri 27 Sep 2019 15:32:43 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190927: hw/arm/boot: Use the IEC binary prefix definitions hw/arm/boot.c: Set NSACR.{CP11,CP10} for NS kernel boots tests/tcg: add linux-user semihosting smoke test for ARM target/arm: remove run-time semihosting checks for linux-user target/arm: remove run time semihosting checks target/arm: handle A-profile semihosting at translate time target/arm: handle M-profile semihosting at translate time tests/tcg: clean-up some comments after the de-tangling target/arm: fix CBAR register for AArch64 CPUs Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # tests/tcg/arm/Makefile.target
2019-09-27Merge remote-tracking branch ↵Peter Maydell1-433/+592
'remotes/berrange/tags/qcrypto-next-pull-request' into staging Refactoring of LUKS support to facilitate keyslot updates No current functional change is expected with this series. # gpg: Signature made Fri 27 Sep 2019 10:58:54 BST # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * remotes/berrange/tags/qcrypto-next-pull-request: qcrypto-luks: more rigorous header checking qcrypto-luks: simplify the math used for keyslot locations qcrypto-luks: extract store key function qcrypto-luks: extract check and parse header qcrypto-luks: extract store and load header qcrypto-luks: purge unused error codes from open callback qcrypto-luks: use the parsed encryption settings in QCryptoBlockLUKS qcrypto-luks: pass keyslot index rather that pointer to the keyslot qcrypto-luks: simplify masterkey and masterkey length qcrypto-luks: don't overwrite cipher_mode in header qcrypto-luks: rename some fields in QCryptoBlockLUKSHeader Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27Merge remote-tracking branch ↵Peter Maydell35-236/+3709
'remotes/stsquad/tags/pull-testing-next-260919-1' into staging Testing updates plus alpha FP fixes: - fix alpha handling of FtoI overflow - various docker cleanups - fix docker.py cleanup race - fix podman invocation - tests/tcg: add float and record/replay tests - remove unused docker images - expand documentation for check-tcg # gpg: Signature made Thu 26 Sep 2019 19:33:38 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-next-260919-1: (28 commits) tests/docker: remove debian-powerpc-user-cross docker: move tests from python2 to python3 docker: remove unused debian-sid docker: remove unused debian-ports docker: remove 'deprecated' image definitions docker: remove unused debian8 partial image docker: remove debian8-mxe definitions target/i386: Fix broken build with WHPX enabled docs/devel: add "check-tcg" to testing.rst configure: preserve PKG_CONFIG for subdir builds tests/tcg: add simple record/replay smoke test for aarch64 tests/tcg: add generic version of float_convs tests/tcg: add float_madds test to multiarch tests/tcg: re-enable linux-test for ppc64abi32 tests/tcg: clean-up some comments after the de-tangling podman: fix command invocation tests/docker: reduce scary warnings by cleaning up clean up tests/docker: remove python2.7 from debian9-mxe tests/docker: fix DOCKER_PARTIAL_IMAGES tests/docker: add sanitizers back to clang build ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27hw/arm/boot: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé1-5/+5
IEC binary prefixes ease code review: the unit is explicit. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190923131108.21459-1-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27hw/arm/boot.c: Set NSACR.{CP11,CP10} for NS kernel bootsPeter Maydell1-0/+2
If we're booting a Linux kernel directly into Non-Secure state on a CPU which has Secure state, then make sure we set the NSACR CP11 and CP10 bits, so that Non-Secure is allowed to access the FPU. Otherwise an AArch32 kernel will UNDEF as soon as it tries to use the FPU. It used to not matter that we didn't do this until commit fc1120a7f5f2d4b6, where we implemented actually honouring these NSACR bits. The problem only exists for CPUs where EL3 is AArch32; the equivalent AArch64 trap bits are in CPTR_EL3 and are "0 to not trap, 1 to trap", so the reset value of the register permits NS access, unlike NSACR. Fixes: fc1120a7f5 Fixes: https://bugs.launchpad.net/qemu/+bug/1844597 Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190920174039.3916-1-peter.maydell@linaro.org
2019-09-27tests/tcg: add linux-user semihosting smoke test for ARMAlex Bennée3-0/+55
We already use semihosting for the system stuff so this is a simple smoke test to ensure we are working OK on linux-user. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20190913151845.12582-7-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27target/arm: remove run-time semihosting checks for linux-userAlex Bennée2-6/+0
Now we do all our checking at translate time we can make cpu_loop a little bit simpler. We also introduce a simple linux-user semihosting test case to defend the functionality. The out-of-tree softmmu based semihosting tests are still more comprehensive. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20190913151845.12582-6-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27target/arm: remove run time semihosting checksAlex Bennée1-74/+22
Now we do all our checking and use a common EXCP_SEMIHOST for semihosting operations we can make helper code a lot simpler. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190913151845.12582-5-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27target/arm: handle A-profile semihosting at translate timeAlex Bennée1-4/+15
As for the other semihosting calls we can resolve this at translate time. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190913151845.12582-4-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27target/arm: handle M-profile semihosting at translate timeAlex Bennée2-13/+16
We do this for other semihosting calls so we might as well do it for M-profile as well. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190913151845.12582-3-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27tests/tcg: clean-up some comments after the de-tanglingAlex Bennée3-10/+15
These were missed in the recent de-tangling so have been updated to be more actuate. I've also built up ARM_TESTS in a manner similar to AARCH64_TESTS for better consistency. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190913151845.12582-2-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27target/arm: fix CBAR register for AArch64 CPUsLuc Michel1-3/+16
For AArch64 CPUs with a CBAR register, we have two views for it: - in AArch64 state, the CBAR_EL1 register (S3_1_C15_C3_0), returns the full 64 bits CBAR value - in AArch32 state, the CBAR register (cp15, opc1=1, CRn=15, CRm=3, opc2=0) returns a 32 bits view such that: CBAR = CBAR_EL1[31:18] 0..0 CBAR_EL1[43:32] This commit fixes the current implementation where: - CBAR_EL1 was returning the 32 bits view instead of the full 64 bits value, - CBAR was returning a truncated 32 bits version of the full 64 bits one, instead of the 32 bits view - CBAR was declared as cp15, opc1=4, CRn=15, CRm=0, opc2=0, which is the CBAR register found in the ARMv7 Cortex-Ax CPUs, but not in ARMv8 CPUs. Signed-off-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20190912110103.1417887-1-luc.michel@greensocs.com [PMM: Added a comment about the two different kinds of CBAR] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190925' into stagingPeter Maydell13-425/+286
Fixes for TLB_BSWAP Coversion of NOTDIRTY and ROM handling to cputlb Followup cleanups to cputlb # gpg: Signature made Wed 25 Sep 2019 19:41:17 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20190925: cputlb: Pass retaddr to tb_check_watchpoint cputlb: Pass retaddr to tb_invalidate_phys_page_fast cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access cputlb: Remove cpu->mem_io_vaddr cputlb: Handle TLB_NOTDIRTY in probe_access cputlb: Merge and move memory_notdirty_write_{prepare,complete} cputlb: Partially inline memory_region_section_get_iotlb cputlb: Move NOTDIRTY handling from I/O path to TLB path cputlb: Move ROM handling from I/O path to TLB path exec: Adjust notdirty tracing cputlb: Introduce TLB_BSWAP cputlb: Split out load/store_memop cputlb: Use qemu_build_not_reached in load/store_helpers qemu/compiler.h: Add qemu_build_not_reached cputlb: Disable __always_inline__ without optimization exec: Use TARGET_PAGE_BITS_MIN for TLB flags Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-26tests/docker: remove debian-powerpc-user-crossAlex Bennée2-30/+0
Despite our attempts in 4d26c7fef4 to keep this going it still gets in the way of "make docker-test-build" completing because of course we can't build a modern QEMU with the image. Let's put the thing out of its misery and remove it. People who really care about building on powerpc can still use the binfmt_misc support to manually build an image (or just run the build from pre this commit). Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2019-09-26docker: move tests from python2 to python3John Snow7-7/+7
As part of the push to drop python2 support, replace any explicit python2 dependencies with python3 versions. For centos, python2 still exists as an implicit dependency, but by adding python3 we will be able to build even if the configure script begins to require python 3.5+. Tested with centos7, fedora, ubuntu, ubuntu1804, and debian 9 (amd64). Tested under a custom configure script that requires Python 3.5+. the travis dockerfile is also moved to using python3, which was tested by running `make docker-test-build@travis`, which I hope is sufficient. Signed-off-by: John Snow <jsnow@redhat.com> Message-Id: <20190923181140.7235-7-jsnow@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Cleber Rosa <crosa@redhat.com> Tested-by: Cleber Rosa <crosa@redhat.com>
2019-09-26docker: remove unused debian-sidJohn Snow2-36/+1
debian-sid is listed as a partial image, so we cannot run tests against it. Since it isn't used by any other testable image, remove it for now as it is prone to bitrot. Signed-off-by: John Snow <jsnow@redhat.com> Message-Id: <20190923181140.7235-6-jsnow@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26docker: remove unused debian-portsJohn Snow2-37/+1
debian-ports is listed as a partial image, so we cannot run tests against it. Since it isn't used by any other testable image, remove it for now as it is prone to bitrot. Signed-off-by: John Snow <jsnow@redhat.com> Message-Id: <20190923181140.7235-5-jsnow@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26docker: remove 'deprecated' image definitionsJohn Snow1-4/+3
There isn't a debian.dockerfile anymore, so perform some ghost-busting. Signed-off-by: John Snow <jsnow@redhat.com> Message-Id: <20190923181140.7235-4-jsnow@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26docker: remove unused debian8 partial imageJohn Snow2-35/+1
debian8 partial base is also not consumed by any image, so remove it. For QEMU's development cycle, we only support debian9 (stretch) and debian10 (buster). Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190923181140.7235-3-jsnow@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-09-26docker: remove debian8-mxe definitionsJohn Snow1-1/+1
We don't have a debian8-mxe dockerfile anymore. Fixes: 67bd36beda1ae Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190923181140.7235-2-jsnow@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-09-26target/i386: Fix broken build with WHPX enabledPhilippe Mathieu-Daudé1-0/+1
The WHPX build is broken since commit 12e9493df92 which removed the "hw/boards.h" where MachineState is declared: $ ./configure \ --enable-hax --enable-whpx $ make x86_64-softmmu/all [...] CC x86_64-softmmu/target/i386/whpx-all.o target/i386/whpx-all.c: In function 'whpx_accel_init': target/i386/whpx-all.c:1378:25: error: dereferencing pointer to incomplete type 'MachineState' {aka 'struct MachineState'} whpx->mem_quota = ms->ram_size; ^~ make[1]: *** [rules.mak:69: target/i386/whpx-all.o] Error 1 CC x86_64-softmmu/trace/generated-helpers.o make[1]: Target 'all' not remade because of errors. make: *** [Makefile:471: x86_64-softmmu/all] Error 2 Restore this header, partially reverting commit 12e9493df92. Fixes: 12e9493df92 Reported-by: Ilias Maratos <i.maratos@gmail.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20190920113329.16787-2-philmd@redhat.com>
2019-09-26docs/devel: add "check-tcg" to testing.rstAlex Bennée1-0/+76
It was pointed out we haven't documented the check-tcg part of the build system. Attempt to rectify that now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-09-26configure: preserve PKG_CONFIG for subdir buildsAlex Bennée2-1/+6
The slirp sub-module complains about not being able to find the glib library on cross-compiles because it is using the default pkg-config tool (which isn't installed in our cross-build docker images). Preserve PKG_CONFIG in our host config and pass it down to slirp. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26tests/tcg: add simple record/replay smoke test for aarch64Alex Bennée1-0/+21
This adds two new tests that re-use the memory test to check basic record replay functionality is still working. We have to define our own runners rather than using the default pattern as we want to change the test name but re-use the memory binary. We declare the test binaries as PHONY as they don't really exist. [AJB: A better test would output some sort of timer value or other otherwise variable value so we could compare the record and replay outputs and ensure they match] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Pavel Dovgalyuk <dovgaluk@ispras.ru>
2019-09-26tests/tcg: add generic version of float_convsAlex Bennée4-3/+1604
This is broadly similar to the existing fcvt test for ARM but using the generic float testing framework. We should be able to pare down the ARM fcvt test case to purely half-precision with or without the Alt HP provision. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26tests/tcg: add float_madds test to multiarchAlex Bennée8-1/+1918
This is a generic floating point multiply and accumulate test for single precision floating point values. I've split of the common float functions into a helper library so additional tests can use the same common code. As I don't have references for all architectures I've allowed some flexibility for tests to pass without reference files. They can be added as we get collect them. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26tests/tcg: re-enable linux-test for ppc64abi32Alex Bennée1-8/+3
Now we have fixed the signal delivary bug we can remove this horrible hack from the system. Cc: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>