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2024-05-10meson: pick libfdt from common_ss when building target-specific filesPaolo Bonzini7-12/+18
Avoid having to list dependencies such as libfdt twice, both on common_ss and specific_ss. Instead, just take all the dependencies in common_ss and allow the target-specific libqemu-*.fa library to use them. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10tests/qtest: arm: fix operation in a build without any boards or devicesPaolo Bonzini3-0/+14
ARM/aarch64 are easy to fix because they already have to pass a machine type by hand. Just guard the tests with a check that the machine actually exists. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240509170044.190795-14-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10i386: select correct components for no-board buildPaolo Bonzini4-2/+32
The local APIC is a part of the CPU and has callbacks that are invoked from multiple accelerators. The IOAPIC on the other hand is optional, but ioapic_eoi_broadcast is used by common x86 code to implement the IOAPIC's implicit EOI mode. Add a stub in case the IOAPIC device is not included but the APIC is. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240509170044.190795-13-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10hw/i386: move rtc-reset-reinjection command out of hw/rtcPaolo Bonzini4-11/+50
The rtc-reset-reinjection QMP command is specific to x86, other boards do not have the ACK tracking functionality that is needed for RTC interrupt reinjection. Therefore the QMP command is only included in x86, but qmp_rtc_reset_reinjection() is implemented by hw/rtc/mc146818rtc.c and requires tracking of all created RTC devices. Move the implementation to hw/i386, so that 1) it is available even if no RTC device exist 2) the only RTC that exists is easily found in x86ms->rtc. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240509170044.190795-12-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10hw/i386: split x86.c in multiple partsPaolo Bonzini5-1053/+1113
Keep the basic X86MachineState definition in x86.c. Move out functions that are only needed by other files: x86-common.c for the pc and microvm machines, x86-cpu.c for those used by accelerator code. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240509170044.190795-11-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10i386: pc: remove unnecessary MachineClass overridesPaolo Bonzini3-10/+3
There is no need to override these fields of MachineClass because they are already set to the right value in the superclass. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240509170044.190795-10-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10i386: correctly select code in hw/i386 that depends on other componentsPaolo Bonzini2-1/+3
fw_cfg.c and vapic.c are currently included unconditionally but depend on other components. vapic.c depends on the local APIC, while fw_cfg.c includes a piece of AML builder code that depends on CONFIG_ACPI. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240509170044.190795-9-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10xen: register legacy backends via xen_backend_initPaolo Bonzini6-41/+20
It is okay to register legacy backends in the middle of xen_bus_init(). All that the registration does is record the existence of the backend in xenstore. This makes it possible to remove them from the build without introducing undefined symbols in xen_be_init(). It also removes the need for the backend_register callback, whose only purpose is to avoid registering nonfunctional backends. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240509170044.190795-8-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10xen: initialize legacy backends from xen_bus_init()Paolo Bonzini4-7/+5
Prepare for moving the calls to xen_be_register() under the control of xen_bus_init(), using the normal xen_backend_init() method that is used by the "modern" backends. This requires the xenstore global variable to be initialized, which is done by xen_be_init(). To ensure that everything is ready at the time the xen_backend_init() functions are called, remove the xen_be_init() function from all the boards and place it directly in xen_bus_init(). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240509170044.190795-7-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10tests/qtest: s390x: fix operation in a build without any boards or devicesPaolo Bonzini1-1/+6
Do the bare minimum to ensure that at least a vanilla --without-default-devices build works for all targets except i386, x86_64 and ppc64. In particular this fixes s390x-softmmu; i386 and x86_64 have about a dozen failing tests that do not pass -M and therefore require a default machine type; ppc64 has the same issue, though only with numa-test. If we can for now ignore the cases where boards and devices are picked by hand, drive_del-test however can be fixed easily; almost all tests check for the virtio-blk or virtio-scsi device that they use, and are already skipped. Only one didn't get the memo; plus another one does not need a machine at all and can be run with -M none. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240509170044.190795-6-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10s390x: select correct components for no-board buildPaolo Bonzini2-2/+4
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240509170044.190795-5-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10s390: move css_migration_enabled from machine to css.cPaolo Bonzini4-22/+16
The CSS subsystem uses global variables, just face the truth and use a variable also for whether the CSS vmstate is in use; remove the indirection of fetching it from the machine type, which makes the TCG code depend unnecessarily on the virtio-ccw machine. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20240509170044.190795-4-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10s390_flic: add migration-enabled propertyPaolo Bonzini3-1/+7
Instead of mucking with css_migration_enabled(), add a property specific to the FLIC device, similar to what is done for TYPE_S390_STATTRIB. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240509170044.190795-3-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10s390x: move s390_cpu_addr2state to target/s390x/sigp.cPaolo Bonzini2-16/+17
This function has no dependency on the virtio-ccw machine type, though it assumes that the CPU address corresponds to the core_id and the index. If there is any need of something different or more fancy (unlikely) S390 can include a MachineClass subclass and implement it there. For now, move it to sigp.c for simplicity. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240509170044.190795-2-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10sh4: select correct components for no-board buildPaolo Bonzini3-3/+6
Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10configure: quote -D options that are passed through to mesonPaolo Bonzini1-1/+1
Ensure that they go through unmodified, instead of removing one layer of quoting. -D is a pretty specialized option and most options that can have spaces do not need it (for example, c_args is covered by --extra-cflags). Therefore it's unlikely that this causes actual trouble. However, a somewhat realistic failure case would be with -Dpkg_config_path and a pkg-config directory that contains spaces. Cc: qemu-stable@nongnu.org Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10tests/tcg: cover lzcnt/tzcnt/popcntPaolo Bonzini1-0/+25
Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10target/i386: fix feature dependency for WAITPKGPaolo Bonzini1-2/+2
The VMX feature bit depends on general availability of WAITPKG, not the other way round. Fixes: 33cc88261c3 ("target/i386: add support for VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE", 2023-08-28) Cc: qemu-stable@nongnu.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10target/i386: move prefetch and multi-byte UD/NOP to new decoderPaolo Bonzini4-33/+27
These are trivial to add, and moving them to the new decoder fixes some corner cases: raising #UD instead of an instruction fetch page fault for the undefined opcodes, and incorrectly rejecting 0F 18 prefetches with register operands (which are treated as reserved NOPs). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10target/i386: rdpkru/wrpkru are no-prefix instructionsPaolo Bonzini1-2/+4
Reject 0x66/0xf3/0xf2 in front of them. Cc: qemu-stable@nongnu.org Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10target/i386: fix operand size for DATA16 REX.W POPCNTPaolo Bonzini1-16/+1
According to the manual, 32-bit vs 64-bit is governed by REX.W and REX ignores the 0x66 prefix. This can be confirmed with this program: #include <stdio.h> int main() { int x = 0x12340000; int y; asm("popcntl %1, %0" : "=r" (y) : "r" (x)); printf("%x\n", y); asm("mov $-1, %0; .byte 0x66; popcntl %1, %0" : "+r" (y) : "r" (x)); printf("%x\n", y); asm("mov $-1, %0; .byte 0x66; popcntq %q1, %q0" : "+r" (y) : "r" (x)); printf("%x\n", y); } which prints 5/ffff0000/5 on real hardware and 5/ffff0000/ffff0000 on QEMU. Cc: qemu-stable@nongnu.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10target/i386: remove PCOMMIT from TCG, deprecate propertyPaolo Bonzini4-14/+10
The PCOMMIT instruction was never included in any physical processor. TCG implements it as a no-op instruction, but its utility is debatable to say the least. Drop it from the decoder since it is only available with "-cpu max", which does not guarantee migration compatibility across versions, and deprecate the property just in case someone is using it as "pcommit=off". Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10Merge tag 'pull-request-2024-05-10' of https://gitlab.com/thuth/qemu into ↵Richard Henderson15-36/+99
staging * Attach s390x sclpconsole to a proper parent in the QOM tree * SCLP related clean-ups * Report deprecated-props in cpu-model-expansion reply on s390x * Deprecate "-runas" and introduce "-run-with user=..." instead * Add some more qtest cases on LoongArch # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmY9wHwRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbUF+A/+JsraF7XOWv1eqW5/O+F5Id1a15CI15bQ # +rUxW0H0wYxdg1i7jj4cB1dIBXgp59lTkpKUN7ftmnP54oxYQkdcJVCvclzAcwzh # ZoMiIw3u88JEBZYpF4HcEaKawXxbTMU/ZGOAil1DSkdv+bwhISCS+aIo6ra2Nclg # 2Zwzvb6DsHqcaYIqvrhbxr5VNhZ+o9AU0PEO67AbN6NKXAFCYlRf6Y9OlEveizZi # 4bNnpa/YpA71dL418argAI0Wq78UPENjLeTVGap0DWGbufiiZ4M/Qov6czT0eYuG # Us2CGJcimV9W+mR45g4xGIgaPmp7PFiobrOoTrAhbixxRA9FQWjamTsElcifktqE # XiE8kYnTx052bY24ttgLOKYRV+whkw+luxtIZo5JPwNkM5S6rZiwY8EsAmd6fIxR # aBlWPWQVO5JBc1Ol6MOWqZ/odpr6nQRe4gnL6tcCTFnpZwpyzaQiooNFES0a8KWJ # MIsywMbIheMNI6m85rngdbKZ4lI1HTUnqLpfoDym3nlHtdx00ctq0O8RjJArfzt6 # aRltpbIAvbGgDyRMzJjezCiMbBSwIHyv4eheJVMi/SAuSevGtnfVNZjCw208Qir6 # sWEAWjavom/XnOFOtLwzkBdjBDiWHiPbLLLgRKcwZ7wbBgH4vhITwSz71fyKpo8n # aTjjveXlUr0= # =y1dS # -----END PGP SIGNATURE----- # gpg: Signature made Fri 10 May 2024 08:36:44 AM CEST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] * tag 'pull-request-2024-05-10' of https://gitlab.com/thuth/qemu: tests/qtest: Add some test cases support on LoongArch qemu-options: Deprecate "-runas" and introduce "-run-with user=..." instead target/s390x: flag te and cte as deprecated target/s390x: report deprecated-props in cpu-model-expansion reply s390x/sclp: Simplify get_sclp_device() s390x/event-facility: Simplify sclp_get_event_facility_bus() s390x: Introduce a SCLPDevice pointer under the machine hw/s390x: Attach the sclpconsole to /machine/sclp/s390-sclp-event-facility Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-10tests/qtest: Add some test cases support on LoongArchBibo Mao2-0/+13
Add boot-serial-test and filter test cases support on LoongArch system. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Message-ID: <20240509084745.2514607-1-maobibo@loongson.cn> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-10qemu-options: Deprecate "-runas" and introduce "-run-with user=..." insteadThomas Huth3-4/+32
The old "-runas" option has the disadvantage that it is not visible in the QAPI schema, so it is not available via the normal introspection mechanisms. We've recently introduced the "-run-with" option for exactly this purpose, which is meant to handle the options that affect the runtime behavior. Thus let's introduce a "user=..." parameter here now and deprecate the old "-runas" option. Message-ID: <20240506112058.51446-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-10target/s390x: flag te and cte as deprecatedCollin Walling1-0/+3
Add the CONSTRAINT_TRANSACTIONAL_EXE (cte) and TRANSACTIONAL_EXE (te) to the list of deprecated features. Signed-off-by: Collin Walling <walling@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-ID: <20240429191059.11806-3-walling@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-10target/s390x: report deprecated-props in cpu-model-expansion replyCollin Walling4-1/+29
Retain a list of deprecated features disjoint from any particular CPU model. A query-cpu-model-expansion reply will now provide a list of properties (i.e. features) that are flagged as deprecated. Example: { "return": { "model": { "name": "z14.2-base", "deprecated-props": [ "bpb", "csske" ], "props": { "pfmfi": false, "exrl": true, ...a lot more props... "skey": false, "vxpdeh2": false } } } } It is recommended that s390 guests operate with these features explicitly disabled to ensure compatibility with future hardware. Signed-off-by: Collin Walling <walling@linux.ibm.com> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-ID: <20240429191059.11806-2-walling@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-10s390x/sclp: Simplify get_sclp_device()Cédric Le Goater1-2/+3
get_sclp_device() scans the whole machine to find a TYPE_SCLP object. Now that the SCLPDevice instance is available under the machine state, use it to simplify the lookup. While at it, remove the inline to let the compiler decide on how to optimize. Signed-off-by: Cédric Le Goater <clg@redhat.com> Message-ID: <20240502131533.377719-4-clg@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-10s390x/event-facility: Simplify sclp_get_event_facility_bus()Cédric Le Goater3-17/+10
sclp_get_event_facility_bus() scans the whole machine to find a TYPE_SCLP_EVENTS_BUS object. The SCLPDevice instance is now available under the machine state, use it to simplify the lookup and adjust the creation of the consoles. Signed-off-by: Cédric Le Goater <clg@redhat.com> Message-ID: <20240502131533.377719-3-clg@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-10s390x: Introduce a SCLPDevice pointer under the machineCédric Le Goater4-13/+8
Initialize directly SCLPDevice from the machine init handler and remove s390_sclp_init(). We will use the SCLPDevice pointer later to create the consoles. Signed-off-by: Cédric Le Goater <clg@redhat.com> Message-ID: <20240502131533.377719-2-clg@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-10hw/s390x: Attach the sclpconsole to /machine/sclp/s390-sclp-event-facilityThomas Huth1-1/+3
The sclpconsole currently does not have a proper parent in the QOM tree, so it shows up under /machine/unattached - which is somewhat ugly. We should rather attach it to /machine/sclp/s390-sclp-event-facility where the other devices of type TYPE_SCLP_EVENT already reside. Message-ID: <20240430190843.453903-1-thuth@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-09Merge tag 'pull-loongarch-20240509' of https://gitlab.com/gaosong/qemu into ↵Richard Henderson6-27/+62
staging pull-loongarch-20240509 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZjyDAgAKCRBAov/yOSY+ # 33cfA/4jE0x+eLAT161caSwM3wBOfZRClfUhXdkxLP6GvWbACVQ8l0rEZiw2PuI8 # DFReU2gqs7wAfYKt7Yy62xXlCw1B3aSUzE45gS2TGIP1GqKBwigvpW4i1SgiOoMX # 4TA+GG16KgR9zaxO48bjjyJ1epc7S3SxdAL09p2U08D9EdSwCA== # =RLFu # -----END PGP SIGNATURE----- # gpg: Signature made Thu 09 May 2024 10:02:10 AM CEST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20240509' of https://gitlab.com/gaosong/qemu: target/loongarch: Put cpucfg operation before CSR register target/loongarch: Add TCG macro in structure CPUArchState hw/loongarch: Refine default numa id calculation Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-09Merge tag 'migration-20240508-pull-request' of ↵Richard Henderson34-3036/+210
https://gitlab.com/farosas/qemu into staging Migration pull request - Will's WITH_QEMU_LOCK_GUARD cleanup - Vladimir's new exit-on-error parameter - Fabiano's removals and deprecations series (block migration and non-multifd compression removed) - Peter's documentation fix for HMP migrate command v2: - updated Peter's documentation fix. # -----BEGIN PGP SIGNATURE----- # # iQJEBAABCAAuFiEEqhtIsKIjJqWkw2TPx5jcdBvsMZ0FAmY7934QHGZhcm9zYXNA # c3VzZS5kZQAKCRDHmNx0G+wxnXynEADHjRa7HqwuYPhft3wGgLiFbCyQNFpNrjM9 # prQSiLlYt9gRlE4c9ZavCxR28xtOrK2oFhCnLMXaIEkct6JuylfiwCPwPuxNQP9+ # EZirECf1yKkyt+RV/LfIx3R/prJgoH5XWhpna+WIBFFo2qSorHTAzjb5dKYZDjkB # EjfN8R9goVH6aCPd4SyiCUUNxuR6/0si9AxfhUgUvUXyLZmE1ztZEoWI02FCYzVj # kKDdVK2+Z1Rlv88tyY4/E6z4pwYLWx5EiXSFv0NXIpTdyO3dM+jeAHxcN7KmQ1+5 # GvX0n+mFYOzRIbRfAnhSZbkez/nuPcbJ76phzSYDs8f/7YtOpuOFKFw7yuGrl5N5 # ZqXo5MOOGliF2wozTjacsOrUhB+MbSb0iA71T7aAdBC2s4H9+XIWfoN/OZfsBhAW # r2i1gSytVLQqsip7A0CFF+DqeSse9QHHlH8vfb8NUn1Tp0o2QfsX+/7LHlvl/2eJ # EP/zmjD6c/8vjB3fTKZr52h2lEO/36xmX+OtZpep3EBvvl1BY1LP4nBNOW1vQM/b # fzcq+agaikwS5gI2QSOC9HJ3aX6q416+wZEm3rQ8XRGSPDFfLPKM/GPPfWdj6ngb # +e3EZPrs+3dOeH1kly5xVMGXGUof+VVBmVwdv4C+XNMM8fRZOxoqd0SD8dz/vOC7 # nSGztXUPqw== # =5T+K # -----END PGP SIGNATURE----- # gpg: Signature made Thu 09 May 2024 12:06:54 AM CEST # gpg: using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D # gpg: issuer "farosas@suse.de" # gpg: Good signature from "Fabiano Rosas <farosas@suse.de>" [unknown] # gpg: aka "Fabiano Almeida Rosas <fabiano.rosas@suse.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3 64CF C798 DC74 1BEC 319D * tag 'migration-20240508-pull-request' of https://gitlab.com/farosas/qemu: hmp/migration: Fix "migrate" command's documentation migration: Deprecate fd: for file migration migration: Remove non-multifd compression migration: Remove block migration migration: Remove 'blk/-b' option from migrate commands migration: Remove 'inc' option from migrate command migration: Remove 'skipped' field from MigrationStats qapi: introduce exit-on-error parameter for migrate-incoming migration: process_incoming_migration_co(): rework error reporting migration: process_incoming_migration_co(): fix reporting s->error migration: process_incoming_migration_co(): complete cleanup on failure migration: move trace-point from migrate_fd_error to migrate_set_error migration/ram.c: API Conversion qemu_mutex_lock(), and qemu_mutex_unlock() to WITH_QEMU_LOCK_GUARD macro Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-09target/loongarch: Put cpucfg operation before CSR registerBibo Mao1-8/+8
On Loongarch, cpucfg is register for cpu feature, some other registers depend on cpucfg feature such as perf CSR registers. Here put cpucfg read/write operations before CSR register, so that KVM knows how many perf CSR registers are valid from pre-set cpucfg feature information. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240428031651.1354587-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2024-05-09target/loongarch: Add TCG macro in structure CPUArchStateBibo Mao4-13/+49
In structure CPUArchState some struct elements are only used in TCG mode, and it is not used in KVM mode. Macro CONFIG_TCG is added to make it simpiler in KVM mode, also there is the same modification in c code when these structure elements are used. When VM runs in KVM mode, TLB entries are not used and do not need migrate. It is only useful when it runs in TCG mode. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240506011912.2108842-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2024-05-09hw/loongarch: Refine default numa id calculationBibo Mao1-6/+5
With numa_test test case, there is subcase named test_def_cpu_split(), there are 8 sockets and 2 numa nodes. Here is command line: "-machine smp.cpus=8,smp.sockets=8 -numa node,memdev=ram -numa node" The required result is: node 0 cpus: 0 2 4 6 node 1 cpus: 1 3 5 7 Test case numa_test fails on LoongArch, since the actual result is: node 0 cpus: 0 1 2 3 node 1 cpus: 4 5 6 7 It will be better if all the cpus in one socket share the same numa node. Here socket id is used to calculate numa id in function virt_get_default_cpu_node_id(). Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240319022606.2994565-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2024-05-09gitlab: Update msys2-64bit runner tagsRichard Henderson1-3/+1
Gitlab has deprecated and removed support for windows-1809 and shared-windows. Update to saas-windows-medium-amd64 per https://about.gitlab.com/blog/2024/01/22/windows-2022-support-for-gitlab-saas-runners/ Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240507175356.281618-1-richard.henderson@linaro.org>
2024-05-09Merge tag 'hw-misc-20240508' of https://github.com/philmd/qemu into stagingRichard Henderson44-411/+836
Misc HW patches - Few more g_memdup() replaced by safer g_memdup2() wrapper (Phil) - Endianness access fixed in vfio-user config space (Mattias) - Replace qemu_mutex_lock() -> QEMU_LOCK_GUARD in system/physmem (Phil) - Per-AddressSpace bounce buffering (Mattias) - Allow to compile x86 PC machines without Floppy Controller (Thomas) - Cleanups around i386 "isa-bios" memory regions (Bernhard) - Remove unused usb rndis_config_parameter structure (David) - Migrate missing clock in STM32L4x5 GPIOs (Inès) - Deprecate PPC 'ref405ep' machine and 405 CPUs (Cédric) - Memory leak fixed in Loongarch Virt machine (Song Gao) - hw/loongarch/ code moved around (Paolo & Bibo Mao) - Emulate S3 suspend in loongson3_virt machine (Jiaxun) - Implement IOCSR address space in Loongson IPI (Jiaxun) - Use QEMU header path relative to include/ directory (Phil) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmY7+NgACgkQ4+MsLN6t # wN4QdhAAnPGMoIGubXiZjrEmCuDU117Hm//g3wFdirn6pSr3XFWk+LGHurpgWzwf # 6AG2ERE6ouEqbZmhfnkLA9/3cSuS/6YgCDxfQ/2Z5N7hy5+GaG60paIk2iw4wJc+ # z+3EBBNp1MKP7etP/f7XvBbempOGHSENvH83ZEKTXln6oYe/HQWBoTChV/W6Uczv # Txf45DJ6QPPQl7cBYqtLpg9Nmc4g6d3M5t5YWzkBrecvXiBlKdZnEsI5CBtmXM8D # h7+wIyNMl0Nc3DgQWN1SsARFDUyHG4bE4K6MS2KkGLkfFF84o8rRtEPV0RvsT+g6 # 0VkhZqLf+Gdq2w1IxCt1k5VCx8HK25+zWZypXlXY1o1dbfssqqbvXEh+3sws67eJ # 4Hn+8QIXZBsl/zUxBbw5/CVYTHmy4Aosc1TItvDsCPnlicfV2phKSxADlL/WJCCU # IQBwDMtxNwYM/QMP3bRIN0xNNSpB0+kOzfkRf1hVQmxH+ObqIvvIA+RbI6NhjM3L # qXw5o0+FltLg7kPGk4Fo/rlhfnydRAE/swrwYd3WRp0sKjDe0lV3r7Bu+FZ4imdB # 4u24FJK8ygcQOKiyHEX9cEkKruYAXeFmI3WglimYe5Po2LvIonsRLiqX97CGhgDX # UM9Oo0Sr/0NnV7FnOW75OijNa2PE7pLVgWDjM3Xefmltqui7F/M= # =uOIs # -----END PGP SIGNATURE----- # gpg: Signature made Thu 09 May 2024 12:12:40 AM CEST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'hw-misc-20240508' of https://github.com/philmd/qemu: (28 commits) misc: Use QEMU header path relative to include/ directory hw/intc/loongson_ipi: Implement IOCSR address space for MIPS hw/intc/loongarch_ipi: Rename as loongson_ipi hw/intc/loongarch_ipi: Remove pointless MAX_CPU check hw/mips/loongson3_virt: Emulate suspend function hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE hw/loongarch/virt: Fix memory leak hw/loongarch: move memory map to boot.c hw/ppc: Deprecate 'ref405ep' machine and 405 CPUs hw/gpio: Handle clock migration in STM32L4x5 gpios hw/usb/dev-network: Remove unused struct 'rndis_config_parameter' hw/i386/x86: Extract x86_isa_bios_init() from x86_bios_rom_init() hw/i386/x86: Don't leak "pc.bios" memory region hw/i386/x86: Don't leak "isa-bios" memory regions hw/i386: Have x86_bios_rom_init() take X86MachineState rather than MachineState hw/i386/x86: Eliminate two if statements in x86_bios_rom_init() hw/i386: Add the possibility to use i440fx and isapc without FDC hw/i386/Kconfig: Allow to compile Q35 without FDC_ISA hw/i386/pc: Allow to compile without CONFIG_FDC_ISA ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-09misc: Use QEMU header path relative to include/ directoryPhilippe Mathieu-Daudé5-5/+5
QEMU headers are relative to the include/ directory, not to the project root directory. Remove "include/". See also: https://www.qemu.org/docs/master/devel/style.html#include-directives Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240507142737.95735-1-philmd@linaro.org>
2024-05-09hw/intc/loongson_ipi: Implement IOCSR address space for MIPSJiaxun Yang1-9/+30
Implement IOCSR address space get functions for MIPS/Loongson CPUs. For MIPS/Loongson without IOCSR (i.e. Loongson-3A1000), get_cpu_iocsr_as will return as null, and send_ipi_data will fail with MEMTX_DECODE_ERROR, which matches expected behavior on hardware. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508-loongson3-ipi-v1-3-1a7b67704664@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/intc/loongarch_ipi: Rename as loongson_ipiJiaxun Yang9-15/+366
This device will be shared among LoongArch and MIPS based Loongson machine, rename it as loongson_ipi to reflect this nature. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508-loongson3-ipi-v1-2-1a7b67704664@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/intc/loongarch_ipi: Remove pointless MAX_CPU checkJiaxun Yang2-19/+2
Since cpuid will be checked by ipi_getcpu anyway, there is no point to enforce MAX_CPU here. This also saved us from including loongarch board header. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508-loongson3-ipi-v1-1-1a7b67704664@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/mips/loongson3_virt: Emulate suspend functionJiaxun Yang2-0/+21
Suspend function is emulated as what hardware actually do. Doorbell register fields are updates to include suspend value, suspend vector is encoded in firmware blob and fw_cfg is updated to include S3 bits as what x86 did. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-ID: <20240508-loongson3v-suspend-v1-1-186725524a39@flygoat.com> [PMD: Use g_memdup2(), constify suspend array] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineStateBibo Mao6-224/+226
Rename LoongArchMachineState with LoongArchVirtMachineState, and change variable name LoongArchMachineState *lams with LoongArchVirtMachineState *lvms. Rename function specific for virtmachine loongarch_xxx() with virt_xxx(). However some common functions keep unchanged such as loongarch_acpi_setup()/loongarch_load_kernel(), since there functions can be used for real hw boards. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508031110.2507477-3-maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINEBibo Mao4-17/+16
On LoongArch system, there is only virt machine type now, name LOONGARCH_MACHINE is confused, rename it with LOONGARCH_VIRT_MACHINE. Machine name about Other real hw boards can be added in future. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508031110.2507477-2-maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/loongarch/virt: Fix memory leakSong Gao1-2/+1
The char pointer 'ramName' point to a block of memory, but never free it. Use 'g_autofree' to automatically free it. Resolves: Coverity CID 1544773 Fixes: 0cf1478d6 ("hw/loongarch: Add numa support") Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240507022239.3113987-1-gaosong@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/loongarch: move memory map to boot.cPaolo Bonzini5-14/+14
Ensure that it can be used even if virt.c is not included in the build, as is the case for --without-default-devices. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240507145135.270803-1-pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/ppc: Deprecate 'ref405ep' machine and 405 CPUsCédric Le Goater2-0/+9
The 'ref405ep' machine and PPC 405 CPU have no known users, firmware images are not available, OpenWRT dropped support in 2019, U-Boot in 2017, Linux also is dropping support in 2024. It is time to let go of this ancient hardware and focus on newer CPUs and platforms. Signed-off-by: Cédric Le Goater <clg@redhat.com> Acked-by: Nicholas Piggin <npiggin@gmail.com> Message-ID: <20240507123332.641708-1-clg@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/gpio: Handle clock migration in STM32L4x5 gpiosInès Varhol1-2/+4
STM32L4x5 GPIO wasn't migrating its clock. Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240507185854.34572-3-ines.varhol@telecom-paris.fr> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-09hw/usb/dev-network: Remove unused struct 'rndis_config_parameter'Dr. David Alan Gilbert1-8/+0
As far as I can tell it was never used. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240505171444.333302-5-dave@treblig.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
generated by cgit v1.1 at 2025-01-29 00:09:10 +0000