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2023-05-26tests/qtest/ac97-test: add up-/downsampling testsVolker Rümelin1-1/+39
Test if the audio subsystem can handle extreme up- and down- sampling ratios like 44100/1 and 1/44100. For some time these used to trigger QEMU aborts. The test was taken from https://gitlab.com/qemu-project/qemu/-/issues/71 where it was used to demonstrate a very different issue. Suggested-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20230520113313.5177-1-vr_qemu@t-online.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26tests/qtest/usb-hcd-ehci-test: Check for EHCI and UHCI HCDs before using themThomas Huth1-0/+5
The devices might not be available in the binary (e.g. when compiling with "--without-default-devices"), so we have to check before we can use them. Message-Id: <20230525081016.1870364-5-thuth@redhat.com> Reviewed-by: Ani Sinha <anisinha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26tests/qtest/rtl8139-test: Check whether the rtl8139 device is availableThomas Huth1-0/+4
Though we are already using CONFIG_RTL8139_PCI in the meson.build file for testing whether the rtl8139 device is available or not, this is not enough: The CONFIG switch might have been selected by another target (e.g. the mips fuloong2e machine has the rtl8139 chip soldered on the board), so CONFIG_RTL8139_PCI ends up in config_all_devices and the test then gets executed on x86. We need an additional run-time check to be on the safe side to make this test also work when configure has been run with "--without-default-devices". Message-Id: <20230525081016.1870364-4-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26tests/qtest: Check for virtio-blk before using -cdrom with the arm virt machineThomas Huth2-2/+6
The arm "virt" machine needs "virtio-blk-pci" for devices that get attached via the "-cdrom" option. Since this is an optional device that might not be available in the binary, we should check for the availability of this device first before using it. Message-Id: <20230525081016.1870364-3-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26tests/qtest/usb-hcd-uhci-test: Check whether "usb-storage" is availableThomas Huth1-1/+3
The "usb-storage" device might not have been compiled into the binary (e.g. when compiling with "--without-default-devices"), so we have to check first before using it. Message-Id: <20230525081016.1870364-2-thuth@redhat.com> Reviewed-by: Ani Sinha <anisinha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26hw/mips: Use MachineClass->default_nic in the virt machinePhilippe Mathieu-Daudé1-1/+3
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Inspired-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230524122559.28863-1-philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26hw/arm: Use MachineClass->default_nic in the sbsa-ref machineThomas Huth1-1/+3
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Message-Id: <20230524082037.1620952-1-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26hw/xtensa: Use MachineClass->default_nic in the virt machineThomas Huth1-3/+6
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Message-Id: <20230523110435.1375774-6-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26hw/loongarch64: Use MachineClass->default_nic in the virt machineThomas Huth1-1/+3
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Message-Id: <20230523110435.1375774-5-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Tested-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26hw/arm: Use MachineClass->default_nic in the virt machineThomas Huth1-1/+3
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Message-Id: <20230523110435.1375774-4-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26hw/alpha: Use MachineClass->default_nic in the alpha machineThomas Huth1-1/+3
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Message-Id: <20230523110435.1375774-3-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-26hw/hppa: Use MachineClass->default_nic in the hppa machineThomas Huth1-1/+3
Mark the default NIC via the new MachineClass->default_nic setting so that the machine-defaults code in vl.c can decide whether the default NIC is usable or not (for example when compiling with the "--without-default-devices" configure switch). Message-Id: <20230523110435.1375774-2-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-05-25Merge tag 'pull-tcg-20230525' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson7-149/+818
tcg/mips: - Constant formation improvements - Replace MIPS_BE with HOST_BIG_ENDIAN - General cleanups tcg/riscv: - Improve setcond - Support movcond - Support Zbb, Zba # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRvo9kdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/ECwf/eQSKdXsppLfgH1zj # 1VYOfSHB7kKacm5s9de6n0n0aT5DdBYGT1VkYqczMyanpYrK5jHIyzxYIcxa2KjN # /pMRKALUTq1Aku1wvovpybUT9Qt38+6jHw0U9inj11NJIYX4bheVJon3gztOUBRp # O67Z22RdfBBu+jL6VD00AE8OhCfeU7CZ+Bj9oNRKYCxXyr1ASla9gfTDy8UG+h2k # WqNti04xmgXqOZ+pEQ+ZyOCzhCHNLm8XBCtFjWXBe30ibX1PwWdSXqkuUtddd5nJ # MEbzQV42RCk1CNRrFz0RoAJhpcOEiSeDcI3Vx/PN8xS5mIS2jaWqW+5sMyCcI54h # JcfcUg== # =GI+F # -----END PGP SIGNATURE----- # gpg: Signature made Thu 25 May 2023 11:07:21 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20230525' of https://gitlab.com/rth7680/qemu: (23 commits) tcg/riscv: Support CTZ, CLZ from Zbb tcg/riscv: Implement movcond tcg/riscv: Improve setcond expansion tcg/riscv: Support CPOP from Zbb tcg/riscv: Support REV8 from Zbb tcg/riscv: Support rotates from Zbb tcg/riscv: Use ADD.UW for guest address generation tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb tcg/riscv: Support ANDN, ORN, XNOR from Zbb tcg/riscv: Probe for Zba, Zbb, Zicond extensions disas/riscv: Decode czero.{eqz,nez} tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIAN tcg/mips: Use qemu_build_not_reached for LO/HI_OFF tcg/mips: Try three insns with shift and add in tcg_out_movi tcg/mips: Try tb-relative addresses in tcg_out_movi tcg/mips: Aggressively use the constant pool for n64 calls tcg/mips: Use the constant pool for 64-bit constants tcg/mips: Split out tcg_out_movi_two tcg/mips: Split out tcg_out_movi_one tcg/mips: Create and use TCG_REG_TB ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson12-127/+214
* hot-unplug fixes for ioport * purge qatomic_mb_read/set from monitor * build system fixes * OHCI fix from gitlab * provide EPYC-Rome CPU model not susceptible to XSAVES erratum # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmRvGpEUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOa/Af/WS5/tmIlEYgH7UOPERQXNqf7+Jwj # bA2wgqv3ZoQwcgp5f4EVjfA8ABfpGxLZy6xIdUSbWANb8lDJNuh/nPd/em3rWUAU # LnJGGdo1vF31gfsVQnlzb7hJi3ur+e2f8JqkRVskDCk3a7YY44OCN42JdKWLrN9u # CFf2zYqxMqXHjrYrY0Kx2oTkfGDZrfwUlx0vM4dHb8IEoxaplfDd8lJXQzjO4htr # 3nPBPjQ+h08EeC7mObH4XoJE0omzovR10GkBo8K4q952xGOQ041Y/2YY7JwLfx0D # na7IanVo+ZAmvTJZoJFSBwNnXkTMHvDH5+Hc45NSTsDBtz0YJhRxPw/z/A== # =A5Lp # -----END PGP SIGNATURE----- # gpg: Signature made Thu 25 May 2023 01:21:37 AM PDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: monitor: do not use mb_read/mb_set monitor: extract request dequeuing to a new function monitor: introduce qmp_dispatcher_co_wake monitor: cleanup fetching of QMP requests monitor: cleanup detection of qmp_dispatcher_co shutting down monitor: do not use mb_read/mb_set for suspend_cnt monitor: add more *_locked() functions monitor: allow calling monitor_resume under mon_lock monitor: use QEMU_LOCK_GUARD a bit more softmmu/ioport.c: make MemoryRegionPortioList owner of portio_list MemoryRegions softmmu/ioport.c: QOMify MemoryRegionPortioList softmmu/ioport.c: allocate MemoryRegionPortioList ports on the heap usb/ohci: Set pad to 0 after frame update meson: move -no-pie from linker to compiler meson: fix rule for qemu-ga installer meson.build: Fix glib -Wno-unused-function workaround target/i386: EPYC-Rome model without XSAVES Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Support CTZ, CLZ from ZbbRichard Henderson3-4/+40
Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Implement movcondRichard Henderson3-3/+141
Implement with and without Zicond. Without Zicond, we were letting the middle-end expand to a 5 insn sequence; better to use a branch over a single insn. Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Improve setcond expansionRichard Henderson1-36/+114
Split out a helper function, tcg_out_setcond_int, which does not always produce the complete boolean result, but returns a set of flags to do so. Based on 21af16198425, the same improvement for loongarch64. Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Support CPOP from ZbbRichard Henderson2-2/+11
Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Support REV8 from ZbbRichard Henderson2-5/+34
Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Support rotates from ZbbRichard Henderson2-2/+36
Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Use ADD.UW for guest address generationRichard Henderson1-11/+22
The instruction is a combined zero-extend and add. Use it for exactly that. Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+ZbbRichard Henderson1-8/+24
Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Support ANDN, ORN, XNOR from ZbbRichard Henderson4-6/+49
Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/riscv: Probe for Zba, Zbb, Zicond extensionsRichard Henderson2-0/+102
Define a useful subset of the extensions. Probe for them via compiler pre-processor feature macros and SIGILL. Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25disas/riscv: Decode czero.{eqz,nez}Richard Henderson1-0/+6
Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIANRichard Henderson1-26/+20
Since e03b56863d2b, which replaced HOST_WORDS_BIGENDIAN with HOST_BIG_ENDIAN, there is no need to define a second symbol which is [0,1]. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Use qemu_build_not_reached for LO/HI_OFFRichard Henderson1-5/+3
The new(ish) macro produces a compile-time error instead of a link-time error. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Try three insns with shift and add in tcg_out_moviRichard Henderson1-0/+44
These sequences are inexpensive to test. Maxing out at three insns results in the same space as a load plus the constant pool entry. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Try tb-relative addresses in tcg_out_moviRichard Henderson1-0/+13
These addresses are often loaded by the qemu_ld/st slow path, for loading the retaddr value. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Aggressively use the constant pool for n64 callsRichard Henderson1-3/+13
Repeated calls to a single helper are common -- especially the ones for softmmu memory access. Prefer the constant pool to longer sequences to increase sharing. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Use the constant pool for 64-bit constantsRichard Henderson2-17/+49
During normal processing, the constant pool is accessible via TCG_REG_TB. During the prologue, it is accessible via TCG_REG_T9. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Split out tcg_out_movi_twoRichard Henderson1-11/+24
Emit all 32-bit signed constants, which can be loaded in two insns. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Split out tcg_out_movi_oneRichard Henderson1-6/+20
Emit all constants that can be loaded in exactly one insn. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Create and use TCG_REG_TBRichard Henderson1-10/+59
This vastly reduces the size of code generated for 64-bit addresses. The code for exit_tb, for instance, where we load a (tagged) pointer to the current TB, goes from 0x400aa9725c: li v0,64 0x400aa97260: dsll v0,v0,0x10 0x400aa97264: ori v0,v0,0xaa9 0x400aa97268: dsll v0,v0,0x10 0x400aa9726c: j 0x400aa9703c 0x400aa97270: ori v0,v0,0x7083 to 0x400aa97240: j 0x400aa97040 0x400aa97244: daddiu v0,s6,-189 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Unify TCG_GUEST_BASE_REG testsRichard Henderson1-1/+1
In tcg_out_qemu_ld/st, we already check for guest_base matching int16_t. Mirror that when setting up TCG_GUEST_BASE_REG in the prologue. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Move TCG_GUEST_BASE_REG to S7Richard Henderson1-2/+2
No functional change; just moving the saved reserved regs to the end. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25tcg/mips: Move TCG_AREG0 to S8Richard Henderson2-3/+3
No functional change; just moving the saved reserved regs to the end. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-25monitor: do not use mb_read/mb_setPaolo Bonzini1-9/+18
Instead of relying on magic memory barriers, document the pattern that is being used. It is the one based on Dekker's algorithm, and in this case it is embodied as follows: enqueue request; sleeping = true; smp_mb(); smp_mb(); if (sleeping) kick(); if (!have a request) yield(); Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: extract request dequeuing to a new functionPaolo Bonzini1-15/+22
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: introduce qmp_dispatcher_co_wakePaolo Bonzini3-29/+31
This makes it possible to turn qmp_dispatcher_co_busy into a static variable. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: cleanup fetching of QMP requestsPaolo Bonzini2-27/+22
Use a continue statement so that "after going to sleep" is treated the same way as "after processing a request". Pull the monitor_lock critical section out of monitor_qmp_requests_pop_any_with_lock() and protect qmp_dispatcher_co_shutdown with the monitor_lock. The two changes are complex to separate because monitor_qmp_dispatcher_co() previously had a complicated logic to check for shutdown both before and after going to sleep. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: cleanup detection of qmp_dispatcher_co shutting downPaolo Bonzini2-1/+3
Instead of overloading qmp_dispatcher_co_busy, make the coroutine pointer NULL. This will make things break spectacularly if somebody tries to start a request after monitor_cleanup(). AIO_WAIT_WHILE_UNLOCKED() does not need qatomic_mb_read(), because the macro contains all the necessary memory barriers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: do not use mb_read/mb_set for suspend_cntPaolo Bonzini5-35/+36
Clean up monitor_event to just use monitor_suspend/monitor_resume, using mon->mux_out to protect against incorrect nesting (especially on startup). The only remaining case of reading suspend_cnt is in the can_read callback, which is just advisory and can use qatomic_read. As an extra benefit, mux_out is now simply protected by mon_lock. Also, moving the prompt to the beginning of the main loop removes it from the output in some error cases where QEMU does not actually start successfully. It is not a full fix and it would be nice to also remove the monitor heading, but this is already a small (though unintentional) improvement. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: add more *_locked() functionsPaolo Bonzini2-6/+11
Allow flushing and printing to the monitor while mon->mon_lock is held. This will help cleaning up the locking of mon->mux_out and mon->suspend_cnt. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: allow calling monitor_resume under mon_lockPaolo Bonzini1-6/+6
Move monitor_resume()'s call to readline_show_prompt() outside the potentially locked section. Reuse the existing monitor_accept_input() bottom half for this purpose. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25monitor: use QEMU_LOCK_GUARD a bit morePaolo Bonzini1-4/+2
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25softmmu/ioport.c: make MemoryRegionPortioList owner of portio_list MemoryRegionsMark Cave-Ayland1-1/+21
Currently when portio_list MemoryRegions are freed using portio_list_destroy() the RCU thread segfaults generating a backtrace similar to that below: #0 0x5555599a34b6 in phys_section_destroy ../softmmu/physmem.c:996 #1 0x5555599a37a3 in phys_sections_free ../softmmu/physmem.c:1011 #2 0x5555599b24aa in address_space_dispatch_free ../softmmu/physmem.c:2430 #3 0x55555996a283 in flatview_destroy ../softmmu/memory.c:292 #4 0x55555a2cb9fb in call_rcu_thread ../util/rcu.c:284 #5 0x55555a29b71d in qemu_thread_start ../util/qemu-thread-posix.c:541 #6 0x7ffff4a0cea6 in start_thread nptl/pthread_create.c:477 #7 0x7ffff492ca2e in __clone (/lib/x86_64-linux-gnu/libc.so.6+0xfca2e) The problem here is that portio_list_destroy() unparents the portio_list MemoryRegions causing them to be freed immediately, however the flatview still has a reference to the MemoryRegion and so causes a use-after-free segfault when the RCU thread next updates the flatview. Solve the lifetime issue by making MemoryRegionPortioList the owner of the portio_list MemoryRegions, and then reparenting them to the portio_list owner. This ensures that they can be accessed as QOM children via the portio_list owner, yet the MemoryRegionPortioList owns the refcount. Update portio_list_destroy() to unparent the MemoryRegion from the portio_list owner (while keeping mrpio->mr live until finalization of the MemoryRegionPortioList), so that the portio_list MemoryRegions remain allocated until flatview_destroy() removes the final refcount upon the next flatview update. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230419151652.362717-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25softmmu/ioport.c: QOMify MemoryRegionPortioListMark Cave-Ayland1-5/+31
The aim of QOMification is so that the lifetime of the MemoryRegionPortioList structure can be managed using QOM's in-built refcounting instead of having to handle this manually. Due to the use of an opaque pointer it isn't possible to model the new TYPE_MEMORY_REGION_PORTIO_LIST directly using QOM properties, however since use of the new object is restricted to the portio API we can simply set the opaque pointer (and the heap-allocated port list) internally. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230419151652.362717-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25softmmu/ioport.c: allocate MemoryRegionPortioList ports on the heapMark Cave-Ayland1-3/+4
In order to facilitate a conversion of MemoryRegionPortioList to a QOM object move the allocation of MemoryRegionPortioList ports to the heap instead of using a variable-length member at the end of the MemoryRegionPortioList structure. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230419151652.362717-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-05-25usb/ohci: Set pad to 0 after frame updatePaolo Bonzini1-0/+2
When the OHCI controller's framenumber is incremented, HccaPad1 register should be set to zero (Ref OHCI Spec 4.4) ReactOS uses hccaPad1 to determine if the OHCI hardware is running, consequently it fails this check in current qemu master. Signed-off-by: Ryan Wendland <wendland@live.com.au> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1048 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.1 at 2025-09-24 03:54:14 +0000