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2025-01-16tcg: Pass type and flags to tcg_target_op_defRichard Henderson11-12/+22
Allow the backend to make constraint choices based on more parameters. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Add TCG_OPF_NOT_PRESENT to opcodes without inputs or outputsRichard Henderson2-7/+4
The br, mb, goto_tb and exit_tb opcodes do not have register operands, only constants, flags, or labels. Remove the special case in opcode_args_ct by including TCG_OPF_NOT_PRESENT in the flags for these opcodes. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Validate op supported in opcode_args_ctRichard Henderson1-0/+4
We should have checked that the op is supported before emitting it. The backend cannot be expected to have a constraint set for unsupported ops. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Constify tcg_op_defsRichard Henderson3-3/+3
Now that we're no longer assigning to TCGOpDef.args_ct, we can make the array constant. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Remove args_ct from TCGOpDefRichard Henderson3-43/+38
Introduce a new function, opcode_args_ct, to look up the argument set for an opcode. We lose the ability to assert the correctness of the map from TCGOpcode to constraint sets at startup, but we can still validate at runtime upon lookup. Rename process_op_defs to process_constraint_sets, as it now does nothing to TCGOpDef. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Reorg process_op_defsRichard Henderson2-147/+140
Process each TCGConstraintSetIndex first. Allocate TCGArgConstraint arrays based on those. Only afterward process the TCGOpcodes and share those TCGArgConstraint arrays. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Change have_vec to has_type in tcg_op_supportedRichard Henderson1-23/+43
Test each vector type, not just lumping them all together. Add tests for I32 (always true) and I64 (64-bit hosts). Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Use C_NotImplemented in tcg_target_op_defRichard Henderson11-14/+16
Return C_NotImplemented instead of asserting for opcodes not implemented by the backend. For now, the assertion moves to process_op_defs. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Split out tcg-target-mo.hRichard Henderson22-32/+136
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Only include 'tcg-has.h' when necessaryRichard Henderson9-4/+8
TCG_TARGET_HAS_* definitions don't need to be exposed by "tcg/tcg.h". Only include 'tcg-has.h' when necessary. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-15-philmd@linaro.org>
2025-01-16tcg: Include 'tcg-target-has.h' once in 'tcg-has.h'Richard Henderson11-20/+2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-14-philmd@linaro.org>
2025-01-16tcg/tci: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-74/+84
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-13-philmd@linaro.org>
2025-01-16tcg/sparc64: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-76/+88
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-12-philmd@linaro.org>
2025-01-16tcg/s390x: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-113/+125
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-11-philmd@linaro.org>
2025-01-16tcg/riscv: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-101/+113
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-10-philmd@linaro.org>
2025-01-16tcg/ppc: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-113/+125
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-9-philmd@linaro.org>
2025-01-16tcg/mips: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-111/+123
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-8-philmd@linaro.org>
2025-01-16tcg/loongarch64: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-101/+114
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-7-philmd@linaro.org>
2025-01-16tcg/i386: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-128/+140
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-6-philmd@linaro.org>
2025-01-16tcg/arm: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-73/+86
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-5-philmd@linaro.org>
2025-01-16tcg/aarch64: Extract TCG_TARGET_HAS_foo defs to 'tcg-target-has.h'Richard Henderson2-108/+120
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-4-philmd@linaro.org>
2025-01-16tcg: Extract default TCG_TARGET_HAS_foo definitions to 'tcg-has.h'Richard Henderson2-104/+116
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-3-philmd@linaro.org>
2025-01-16tcg/ppc: Remove TCGPowerISA enumRichard Henderson1-8/+0
Left-over from commit 623d7e3551a ("util: Add cpuinfo-ppc.c"). Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108215156.8731-2-philmd@linaro.org>
2025-01-16tcg: Move fallback tcg_can_emit_vec_op out of lineRichard Henderson2-7/+4
Don't reference TCG_TARGET_MAYBE_vec in a public header. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg/tci: Move TCI specific opcodes to tcg-target-opc.h.incRichard Henderson2-7/+4
Now that tcg-target-opc.h.inc is unconditional, we can move these out of the generic header. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Rename tcg-target.opc.h to tcg-target-opc.h.incRichard Henderson11-3/+4
In addition, add empty files for mips, sparc64 and tci. Make the include unconditional within tcg-opc.h. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Remove TCG_TARGET_NEED_LDST_LABELS and TCG_TARGET_NEED_POOL_LABELSRichard Henderson23-286/+216
Make these features unconditional, as they're used by most tcg backends anyway. Merge tcg-ldst.c.inc and tcg-pool.c.inc into tcg.c and mark some of the functions unused, so that when the features are not used we won't get Werrors. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16target/i386: Use tcg_op_supportedRichard Henderson1-3/+3
Do not reference TCG_TARGET_HAS_* directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16target/i386: Use tcg_op_deposit_validRichard Henderson1-4/+2
Avoid direct usage of TCG_TARGET_deposit_*_valid. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16target/i386: Remove TCG_TARGET_extract_tl_validRichard Henderson1-2/+0
This macro is unused. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Add tcg_op_deposit_validRichard Henderson2-0/+27
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16target/tricore: Use tcg_op_supportedRichard Henderson1-2/+2
Do not reference TCG_TARGET_HAS_* directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16target/arm: Use tcg_op_supportedRichard Henderson3-6/+8
Do not reference TCG_TARGET_HAS_* directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16target/arm: Do not test TCG_TARGET_HAS_bitsel_vecRichard Henderson1-16/+4
Rely on tcg-op-vec.c to expand the opcode if missing. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Add type and flags arguments to tcg_op_supportedRichard Henderson2-5/+13
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Add TCGOP_FLAGSRichard Henderson1-0/+1
To be used by some integer operations instead of, or in addition to, a trailing constant argument. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Copy TCGOP_TYPE in tcg_op_insert_{after,before}Richard Henderson1-0/+4
Simplify use within the optimizers by defaulting the new opcode to the same type as the old opcode. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Move tcg_op_insert_{after,before} decls to tcg-internal.hRichard Henderson2-4/+5
These are not particularly useful outside of optimization passes. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Replace TCGOP_VECL with TCGOP_TYPERichard Henderson8-93/+105
In the replacement, drop the TCGType - TCG_TYPE_V64 adjustment, except for the call to tcg_out_vec_op. Pass type to tcg_gen_op[1-6], so that all integer opcodes gain the type. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16tcg: Move call abi parameters from tcg-target.h to tcg-target.c.incRichard Henderson18-106/+105
These defines are not required outside of tcg/tcg.c, which includes tcg-target.c.inc before use. Reduces the exported symbol set of tcg-target.h. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-01-16disas/riscv: Guard dec->cfg dereference for host disassembleLIU Zhiwei1-11/+12
For riscv host, it will set dec->cfg to zero. Thus we shuld guard the dec->cfg deference for riscv host disassemble. And in general, we should only use dec->cfg for target in three cases: 1) For not incompatible encodings, such as zcmp/zcmt/zfinx. 2) For maybe-ops encodings, they are better to be disassembled to the "real" extensions, such as zicfiss. The guard of dec->zimop and dec->zcmop is for comment and avoid check for every extension that encoded in maybe-ops area. 3) For custom encodings, we have to use dec->cfg to disassemble custom encodings using the same encoding area. Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241206032411.52528-1-zhiwei_liu@linux.alibaba.com>
2025-01-16Merge tag 'pull-xenfv-20250116' of git://git.infradead.org/users/dwmw2/qemu ↵Stefan Hajnoczi11-47/+96
into staging Xen regression fixes and cleanups # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEMUsIrNDeSBEzpfKGm+mA/QrAFUQFAmeIxhcSHGR3bXdAYW1h # em9uLmNvLnVrAAoJEJvpgP0KwBVEbKoP/iqQ+PhbwT9+xz6lxW+g1Dx+YGrT/ugp # d3xHn9AEkR0EHC42J6RB/llyWbKVD/IIhYwUk5GDm+4InGrtuQDhG6UqWxqvIRht # 0JuZvVm7x5akmKv73igxNqZHVg0ZEAS+EllBUaBYWj0pvpMbBK93Sdz9PXKxA7Nm # dPeFrOpL2TAmnDCH1UuBbXypHEjAghmv7WFphMtk6qLX+wYVaK3F2J/ed2TNyT0V # LliOdQH0Pxt445SSVJIZRe9bW3FH7qyvZV1gCnxSnqPUlN7vBhpjzgl4hWEzVYcp # 7X21ZAD9kPc81DJjYucbLjAbrqSmlDrJqL05qtRigfPcnqz2NoKrYxhj8B0F8mgt # 1IbymPyeab5gk5Hi1QgMmG5eobDDaglDSxpq6gRfJBiJW+1adif00z/HVvt5onS0 # uQ6i6w5NzQciBX77muAb2ZDEMysjk+3wSJMMpkfl90D0kjlMqeWWs4FH9ThasjC+ # EhQioUD0euedgnzOSfQjNNtAW4gzv9rcShkcV84bjxP/0Es+Pgx9f6wtCUTzdeqy # Cid8/72lHIgrkZGfpv8BBZkA1XP09vgtUGKyAWm4yHOcB57l8cNiL1nKtqoCLwkQ # 8JWFWzFeEY19KoiRGY5saH6ExeOx8fmc/lYwqImZqFqvuFX4Vf2RJdTIRIYr7g05 # 2QffxFmskg+A # =Wz0V # -----END PGP SIGNATURE----- # gpg: Signature made Thu 16 Jan 2025 03:40:55 EST # gpg: using RSA key 314B08ACD0DE481133A5F2869BE980FD0AC01544 # gpg: issuer "dwmw@amazon.co.uk" # gpg: Good signature from "David Woodhouse <dwmw@amazon.co.uk>" [unknown] # gpg: aka "David Woodhouse <dwmw@amazon.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 314B 08AC D0DE 4811 33A5 F286 9BE9 80FD 0AC0 1544 * tag 'pull-xenfv-20250116' of git://git.infradead.org/users/dwmw2/qemu: system/runstate: Fix regression, clarify BQL status of exit notifiers hw/xen: Fix errp handling in xen_console hw/xen: Use xs_node_read() from xenstore_read_str() instead of open-coding it hw/xen: Use xs_node_read() from xen_netdev_get_name() hw/xen: Use xs_node_read() from xen_console_get_name() hw/xen: Use xs_node_read() from xs_node_vscanf() xen: do not use '%ms' scanf specifier hw/xen: Add xs_node_read() helper function Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-16Merge tag 'pull-loongarch-20250116' of https://gitlab.com/bibo-mao/qemu into ↵Stefan Hajnoczi9-59/+203
staging loongarch queue # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQNhkKjomWfgLCz0aQfewwSUazn0QUCZ4hk/QAKCRAfewwSUazn # 0WagAQDgJaWBLQxZkyQR2FQm3WHg3Uf/qolab9nDGo3b2BpixgD/RdvZf+mZpAwf # 2ipAQ7g5GqGTKtTAdqO/aBAqTCZCqQU= # =7KKt # -----END PGP SIGNATURE----- # gpg: Signature made Wed 15 Jan 2025 20:46:37 EST # gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1 # gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C # Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1 * tag 'pull-loongarch-20250116' of https://gitlab.com/bibo-mao/qemu: hw/intc/loongarch_ipi: Use alternative implemation for cpu_by_arch_id hw/intc/loongson_ipi: Add more input parameter for cpu_by_arch_id hw/intc/loongarch_ipi: Remove property num-cpu hw/intc/loongarch_ipi: Get cpu number from possible_cpu_arch_ids hw/intc/loongson_ipi: Remove property num_cpu from loongson_ipi_common hw/intc/loongson_ipi: Remove num_cpu from loongson_ipi_common hw/intc/loongarch_ipi: Implement realize interface target/loongarch: Add page table walker support for debugger usage Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-16Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Stefan Hajnoczi74-326/+1536
into staging virtio,pc,pci: features, fixes, cleanups The big thing here are: stage-1 translation in vtd internal migration in vhost-user ghes driver preparation for error injection new resource uuid feature in virtio gpu new vmclock device And as usual, fixes and cleanups. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmeIOiIPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpORgIAL0clwZxQL7PIPJ91FwXc1bo6Do/HYquAzvH # eA+ryCG5S5ewh/e2R8SdIUG7nYesEMWJGVL1gb3BFu7wgGh1aLaaTxQ1LIo5HpRF # P0Ak3QO7TKIsSEcZIz9h3eMEpg6X9d8i2h7llp7H3qqXBbduO+cGfeNH/fZD5IEl # 7DFvXuJUgUtZb38I+qtcO+9EQFKGHjgdQAN5P/I4vawWJdxN9sBfT4YVEgpVhiq/ # ALxdSeaEiXA4EXexdHVZhXiQzEBsCQ78RZIIDiRE8I34cVY7rolTodKRfr4bip3P # 6Llu11yvzNi1gppOzkny3QFsRza3hV0RisWYjAMTwLhNCdi/mHQ= # =GjDq # -----END PGP SIGNATURE----- # gpg: Signature made Wed 15 Jan 2025 17:43:46 EST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (49 commits) hw/acpi: Add vmclock device virtio-net: vhost-user: Implement internal migration vhost: Add stubs for the migration state transfer interface hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr` tests: acpi: update expected blobs pci: acpi: Windows 'PCI Label Id' bug workaround tests: acpi: whitelist expected blobs docs: acpi_hest_ghes: fix documentation for CPER size acpi/ghes: Change ghes fill logic to work with only one source acpi/ghes: move offset calculus to a separate function acpi/ghes: better name the offset of the hardware error firmware acpi/ghes: rename etc/hardware_error file macros acpi/ghes: don't crash QEMU if ghes GED is not found acpi/ghes: better name GHES memory error function acpi/ghes: make the GHES record generation more generic acpi/ghes: don't check if physical_address is not zero acpi/ghes: Change the type for source_id acpi/ghes: Remove a duplicated out of bounds check acpi/ghes: Fix acpi_ghes_record_errors() argument acpi/ghes: better handle source_id and notification ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-15hw/acpi: Add vmclock deviceDavid Woodhouse8-1/+412
The vmclock device addresses the problem of live migration with precision clocks. The tolerances of a hardware counter (e.g. TSC) are typically around ±50PPM. A guest will use NTP/PTP/PPS to discipline that counter against an external source of 'real' time, and track the precise frequency of the counter as it changes with environmental conditions. When a guest is live migrated, anything it knows about the frequency of the underlying counter becomes invalid. It may move from a host where the counter running at -50PPM of its nominal frequency, to a host where it runs at +50PPM. There will also be a step change in the value of the counter, as the correctness of its absolute value at migration is limited by the accuracy of the source and destination host's time synchronization. The device exposes a shared memory region to guests, which can be mapped all the way to userspace. In the first phase, this merely advertises a 'disruption_marker', which indicates that the guest should throw away any NTP synchronization it thinks it has, and start again. Because the region can be exposed all the way to userspace, applications can still use time from a fast vDSO 'system call', and check the disruption marker to be sure that their timestamp is indeed truthful. The structure also allows for the precise time, as known by the host, to be exposed directly to guests so that they don't have to wait for NTP to resync from scratch. The values and fields are based on the nascent virtio-rtc specification, and the intent is that a version (hopefully precisely this version) of this structure will be included as an optional part of that spec. In the meantime, a simple ACPI device along the lines of VMGENID is perfectly sufficient and is compatible with what's being shipped in certain commercial hypervisors. Linux guest support was merged into the 6.13-rc1 kernel: https://git.kernel.org/torvalds/c/205032724226 Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org> Message-Id: <07fd5e2f529098ad4d7cab1423fe9f4a03a9cc14.camel@infradead.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15virtio-net: vhost-user: Implement internal migrationLaurent Vivier1-23/+112
Add support of VHOST_USER_PROTOCOL_F_DEVICE_STATE in virtio-net with vhost-user backend. Cc: Hanna Czenczek <hreitz@redhat.com> Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20250115135044.799698-3-lvivier@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15vhost: Add stubs for the migration state transfer interfaceLaurent Vivier1-0/+23
Migration state transfer interface is only used by vhost-user-fs, so the interface needs to be defined only when vhost is built. But I need to use this interface with virtio-net and vhost is not always enabled, and to avoid undefined reference error during build, define stub functions for vhost_supports_device_state(), vhost_save_backend_state() and vhost_load_backend_state(). Cc: Hanna Czenczek <hreitz@redhat.com> Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20250115135044.799698-2-lvivier@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr`Li Zhijian1-1/+1
This assertion always happens when we sanitize the CXL memory device. $ echo 1 > /sys/bus/cxl/devices/mem0/security/sanitize It is incorrect to register an MSIX number beyond the device's capability. Increase the device's MSIX number to cover the mailbox msix number(9). Fixes: 43efb0bfad2b ("hw/cxl/mbox: Wire up interrupts for background completion") Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Message-Id: <20250115075834.167504-1-lizhijian@fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests: acpi: update expected blobsIgor Mammedov41-40/+0
_DSM function 7 AML should have followig change: If ((Arg2 == 0x07)) { - Local0 = Package (0x02) - { - Zero, - "" - } Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One] )) - Local0 [Zero] = Local2 + Local0 = Package (0x02) {} + If (!((Local2 == Zero) || (Local2 == 0xFFFFFFFF))) + { + Local0 [Zero] = Local2 + Local0 [One] = "" + } + Return (Local0) } } Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250115125342.3883374-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15pci: acpi: Windows 'PCI Label Id' bug workaroundIgor Mammedov1-10/+23
Current versions of Windows call _DSM(func=7) regardless of whether it is supported or not. It leads to NICs having bogus 'PCI Label Id = 0', where none should be set at all. Also presence of 'PCI Label Id' triggers another Windows bug on localized versions that leads to hangs. The later bug is fixed in latest updates for 'Windows Server' but not in consumer versions of Windows (and there is no plans to fix it as far as I'm aware). Given it's easy, implement Microsoft suggested workaround (return invalid Package) so that affected Windows versions could boot on QEMU. This would effectvely remove bogus 'PCI Label Id's on NICs, but MS teem confirmed that flipping 'PCI Label Id' should not change 'Network Connection' ennumeration, so it should be safe for QEMU to change _DSM without any compat code. Smoke tested with WinXP and WS2022 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/774 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250115125342.3883374-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.1 at 2025-02-22 21:28:05 +0000