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2016-02-26target-arm: Forbid mode switch to Mon from Secure EL1Peter Maydell1-1/+1
In v8 trying to switch mode to Mon from Secure EL1 is an illegal mode switch. (In v7 this is impossible as all secure modes except User are at EL3.) We can handle this case by making a switch to Mon valid only if the current EL is 3, which then gives the correct answer whether EL3 is AArch32 or AArch64. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-9-git-send-email-peter.maydell@linaro.org
2016-02-26target-arm: Add Hyp mode checks to bad_mode_switch()Peter Maydell1-0/+3
We don't actually support Hyp mode yet, but add the correct checks for it to the bad_mode_switch() function for completeness. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-8-git-send-email-peter.maydell@linaro.org
2016-02-26target-arm: Add comment about not implementing NSACR.RFRPeter Maydell1-0/+3
QEMU doesn't implement the NSACR.RFR bit, which is a permitted IMPDEF in choice in ARMv7 and the only permitted choice in ARMv8. Add a comment to bad_mode_switch() to note that this is why FIQ is always a valid mode regardless of the CPU's Secure state. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-7-git-send-email-peter.maydell@linaro.org
2016-02-26target-arm: In cpsr_write() ignore mode switches from User modePeter Maydell1-0/+1
The only case where we can attempt a cpsr_write() mode switch from User is from the gdbstub; all other cases are handled in the calling code (notably translate.c). Architecturally attempts to alter the mode bits from user mode are simply ignored (and not treated as a bad mode switch, which in v8 sets CPSR.IL). Make mode switches from User ignored in cpsr_write() as well, for consistency. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-6-git-send-email-peter.maydell@linaro.org
2016-02-26linux-user: Use restrictive mask when calling cpsr_write()Peter Maydell2-2/+3
When linux-user code is calling cpsr_write(), use a restrictive mask to ensure we are limiting the set of CPSR bits we update. In particular, don't allow the mode bits to be changed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-5-git-send-email-peter.maydell@linaro.org
2016-02-26target-arm: Raw CPSR writes should skip checks and bank switchingPeter Maydell4-6/+7
Raw CPSR writes should skip the architectural checks for whether we're allowed to set the A or F bits and should also not do the switching of register banks if the mode changes. Handle this inside cpsr_write(), which allows us to drop the "manually set the mode bits to avoid the bank switch" code from all the callsites which are using CPSRWriteRaw. This fixes a bug in 32-bit KVM handling where we had forgotten the "manually set the mode bits" part and could thus potentially trash the register state if the mode from the last exit to userspace differed from the mode on this exit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-4-git-send-email-peter.maydell@linaro.org
2016-02-26target-arm: Add write_type argument to cpsr_write()Peter Maydell10-16/+26
Add an argument to cpsr_write() to indicate what kind of CPSR write is being requested, since the exact behaviour should differ for the different cases. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-3-git-send-email-peter.maydell@linaro.org
2016-02-26target-arm: Give CPSR setting on 32-bit exception return its own helperPeter Maydell3-3/+10
The rules for setting the CPSR on a 32-bit exception return are subtly different from those for setting the CPSR via an instruction like MSR or CPS. (In particular, in Hyp mode changing the mode bits is not valid via MSR or CPS.) Split the exception-return case into its own helper for setting CPSR, so we can eventually handle them differently in the helper function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-2-git-send-email-peter.maydell@linaro.org
2016-02-26Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160226' into stagingPeter Maydell8-14/+525
MIPS patches 2016-02-26 Changes: * support for FPU and MSA in KVM guest * support for R6 Virtual Processors # gpg: Signature made Fri 26 Feb 2016 11:07:37 GMT using RSA key ID 0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" * remotes/lalrae/tags/mips-20160226: target-mips: implement R6 multi-threading mips/kvm: Support MSA in MIPS KVM guests mips/kvm: Support FPU in MIPS KVM guests mips/kvm: Support signed 64-bit KVM registers mips/kvm: Support unsigned KVM registers mips/kvm: Implement Config CP0 registers mips/kvm: Implement PRid CP0 register mips/kvm: Remove a couple of noisy DPRINTFs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-26Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-signed' ↵Peter Maydell4-0/+0
into staging Update OpenBIOS images # gpg: Signature made Fri 26 Feb 2016 10:45:04 GMT using RSA key ID AE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" * remotes/mcayland/tags/qemu-openbios-signed: Update OpenBIOS images Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-26Update OpenBIOS imagesMark Cave-Ayland4-0/+0
Update OpenBIOS images to SVN r1391 built from submodule. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2016-02-26target-mips: implement R6 multi-threadingYongbok Kim7-1/+151
MIPS Release 6 provides multi-threading features which replace pre-R6 MT Module. CP0.Config3.MT is always 0 in R6, instead there is new CP0.Config5.VP (Virtual Processor) bit which indicates presence of multi-threading support which includes CP0.GlobalNumber register and DVP/EVP instructions. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26mips/kvm: Support MSA in MIPS KVM guestsJames Hogan1-20/+109
Support the new KVM_CAP_MIPS_MSA capability, which allows MIPS SIMD Architecture (MSA) to be exposed to the KVM guest. The capability is enabled if the guest core has MSA according to its Config3 register. Various config bits are now writeable so that KVM is aware of the configuration (Config3.MSAP) and so that QEMU can save/restore the guest modifiable bits (Config5.MSAEn). The MSACSR/MSAIR registers and the MSA vector registers are now saved/restored. Since the FP registers are a subset of the vector registers, they are omitted if the guest has MSA. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26mips/kvm: Support FPU in MIPS KVM guestsJames Hogan1-4/+117
Support the new KVM_CAP_MIPS_FPU capability, which allows the host's FPU to be exposed to the KVM guest. The capability is enabled if the guest core has an FPU according to its Config1 register. Various config bits are now writeable so that KVM is aware of the configuration (Config1.FP) and so that QEMU can save/restore the guest modifiable bits (Config5.FRE, Config5.UFR, Config5.UFE). The FCSR/FIR registers and the floating point registers are now saved/restored (depending on the FR mode bit). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26mips/kvm: Support signed 64-bit KVM registersJames Hogan1-9/+31
Rename kvm_mips_{get,put}_one_reg64() to kvm_mips_{get,put}_one_ureg64() since they take an int64_t pointer, and add separate signed 64-bit accessors. These will be used for double precision floating point registers. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26mips/kvm: Support unsigned KVM registersJames Hogan1-0/+22
Add KVM register access functions for the uint32_t type. This is required for FP and MSA control registers, which are represented as unsigned 32-bit integers. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26mips/kvm: Implement Config CP0 registersJames Hogan1-0/+106
Implement saving and restoring to KVM state of the Config CP0 registers (namely Config, Config1, Config2, Config3, Config4, and Config5). These control the features available to a guest, and a few of the fields will soon be writeable by a guest so QEMU needs to know about them so as not to clobber them on migration/savevm. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26mips/kvm: Implement PRid CP0 registerJames Hogan1-0/+11
Implement saving and restoring to KVM state of the Processor ID (PRid) CP0 register. This allows QEMU to control the PRid exposed to the guest instead of using the default set by KVM. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-26mips/kvm: Remove a couple of noisy DPRINTFsJames Hogan1-2/+0
The DPRINTFs in cpu_mips_io_interrupts_pending() and kvm_arch_pre_run() are particularly noisy during normal execution, and also not particularly helpful. Remove them so that more important debug messages can be more easily seen. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-02-25Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2016-02-25-tag' ↵Peter Maydell12-61/+170
into staging qemu-ga patch queue for 2.6 * fix w32 build breakage when VSS enabled * fix up wchar handling in guest-set-user-password * fix re-install handling for w32 MSI installer * add w32 support for guest-get-vcpus * add support for enums in guest-file-seek SEEK params instead of relying on platform-specific integer values # gpg: Signature made Thu 25 Feb 2016 16:59:13 GMT using RSA key ID F108B584 # gpg: Good signature from "Michael Roth <flukshun@gmail.com>" # gpg: aka "Michael Roth <mdroth@utexas.edu>" # gpg: aka "Michael Roth <mdroth@linux.vnet.ibm.com>" * remotes/mdroth/tags/qga-pull-2016-02-25-tag: qga: fix w32 breakage due to missing osdep.h includes qga: check utf8-to-utf16 conversion qga: fix off-by-one length check qga: use wide-chars constants for wchar_t comparisons qga: use size_t for wcslen() return value qga: use more idiomatic qemu-style eol operators qga: implement the guest-get-vcpus for windows qemu-ga: Fixed minor version switch issue qga: Support enum names in guest-file-seek Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-25qga: fix w32 breakage due to missing osdep.h includesMichael Roth5-9/+8
requester.h relied on qemu/compiler.h definitions to handle GCC_FMT_ATTR() stub, but this include was removed as part of scripted clean-ups via 30456d5: all: Clean up includes under the assumption that all C files would have included it via qemu/osdep.h at that point. requester.cpp was likely missed due to C++ files requiring manual/special handling as well as VSS build options needing to be enabled to trigger build failures. Fix this by including qemu/osdep.h. That in turn pulls in a macro from qapi/error.h that conflicts with a struct field name in requester.h, so fix that as well by renaming the field. While we're at it, fix up provider.cpp/install.cpp to include osdep.h as well. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2016-02-25build: [bsd-user] Rename "syscall.h" to "target_syscall.h" in target directoriesLluís Vilanova5-1/+20
This fixes double-definitions in bsd-user builds when using the UST tracing backend (which indirectly includes the system's "syscall.h"). Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-25qga: check utf8-to-utf16 conversionMarc-André Lureau1-3/+16
UTF8 to UTF16 conversion can fail for genuine reasons, let's check errors. Reported-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25qga: fix off-by-one length checkMarc-André Lureau1-1/+1
Laszlo Ersek said: "The length check is off by one (in the safe direction); it should be (nchars >= 2). The processing should be active for the wide string L"\r\n" -- resulting in the empty wide string --, I believe." Reported-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25qga: use wide-chars constants for wchar_t comparisonsMarc-André Lureau1-2/+4
Reported-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25qga: use size_t for wcslen() return valueMarc-André Lureau1-1/+2
Reported-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25qga: use more idiomatic qemu-style eol operatorsMarc-André Lureau1-3/+3
Reported-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25qga: implement the guest-get-vcpus for windowsGal Hammer1-2/+66
Signed-off-by: Gal Hammer <ghammer@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> * report rather than assert when VCPU count == 0 * fix up subject: s/set-vcpus/get-vcpus/ Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25qemu-ga: Fixed minor version switch issueLeonid Bloch1-1/+1
With automatically generated GUID, on minor version changes, an error occurred, stating that there is a problem with the installer. Now, a notification is shown, warning the user that another version of this product is already installed, and that configuration or removal of the existing version is possible through Add/Remove Programs on the Control Panel (expected behavior). Signed-off-by: Leonid Bloch <leonid@daynix.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25qga: Support enum names in guest-file-seekEric Blake6-40/+70
Magic constants are a pain to use, especially when we run the risk that our choice of '1' for QGA_SEEK_CUR might differ from the host or guest's choice of SEEK_CUR. Better is to use an enum value, via a qapi alternate type for back-compatibility. With this, {"command":"guest-file-seek", "arguments":{"handle":1, "offset":0, "whence":"cur"}} becomes a synonym for the older {"command":"guest-file-seek", "arguments":{"handle":1, "offset":0, "whence":1}} Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-02-25Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell31-165/+564
* Asynchronous dump-guest-memory from Peter * improved logging with -D -daemonize from Dimitris * more address_space_* optimization from Gonglei * TCG xsave/xrstor thinko fix * chardev bugfix and documentation patch # gpg: Signature made Thu 25 Feb 2016 15:12:27 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: target-i386: fix confusion in xcr0 bit position vs. mask chardev: Properly initialize ChardevCommon components memory: Remove unreachable return statement memory: optimize qemu_get_ram_ptr and qemu_ram_ptr_length exec: store RAMBlock pointer into memory region log: Redirect stderr to logfile if deamonized dump-guest-memory: add qmp event DUMP_COMPLETED Dump: add hmp command "info dump" Dump: add qmp command "query-dump" DumpState: adding total_size and written_size fields dump-guest-memory: add "detach" support dump-guest-memory: disable dump when in INMIGRATE state dump-guest-memory: introduce dump_process() helper function. dump-guest-memory: add dump_in_progress() helper function dump-guest-memory: using static DumpState, add DumpStatus dump-guest-memory: add "detach" flag for QMP/HMP interfaces. dump-guest-memory: cleanup: removing dump_{error|cleanup}(). scripts/kvm/kvm_stat: Fix missing right parantheses and ".format(...)" qemu-options.hx: Improve documentation of chardev multiplexing mode Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-25target-i386: fix confusion in xcr0 bit position vs. maskPaolo Bonzini4-42/+59
The xsave and xrstor helpers are accessing the x86_ext_save_areas array using a bit mask instead of a bit position. Provide two sets of XSTATE_* definitions and use XSTATE_*_BIT when a bit position is requested. Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-25chardev: Properly initialize ChardevCommon componentsEric Blake4-14/+30
Commit d0d7708b forgot to parse logging for spice chardevs and virtual consoles. This requires making qemu_chr_parse_common() non-static. While at it, use a temporary variable to make the code shorter, as well as reduce the churn when a later patch alters the layout of simple unions. Signed-off-by: Eric Blake <eblake@redhat.com> CC: Daniel P. Berrange <berrange@redhat.com> Message-Id: <1455927587-28033-2-git-send-email-eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-25memory: Remove unreachable return statementGonglei1-2/+0
Signed-off-by: Gonglei <arei.gonglei@huawei.com> Message-Id: <1455935721-8804-4-git-send-email-arei.gonglei@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-25memory: optimize qemu_get_ram_ptr and qemu_ram_ptr_lengthGonglei3-21/+31
these two functions consume too much cpu overhead to find the RAMBlock by ram address. After this patch, we can pass the RAMBlock pointer to them so that they don't need to find the RAMBlock anymore most of the time. We can get better performance in address translation processing. Signed-off-by: Gonglei <arei.gonglei@huawei.com> Message-Id: <1455935721-8804-3-git-send-email-arei.gonglei@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-25exec: store RAMBlock pointer into memory regionGonglei3-0/+5
Each RAM memory region has a unique corresponding RAMBlock. In the current realization, the memory region only stored the ram_addr which means the offset of RAM address space, We need to qurey the global ram.list to find the ram block by ram_addr if we want to get the ram block, which is very expensive. Now, we store the RAMBlock pointer into memory region structure. So, if we know the mr, we can easily get the RAMBlock. Signed-off-by: Gonglei <arei.gonglei@huawei.com> Message-Id: <1456130097-4208-2-git-send-email-arei.gonglei@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-25Merge remote-tracking branch ↵Peter Maydell5-37/+615
'remotes/bkoppelmann/tags/pull-tricore-20160225' into staging TriCore bugfixes and synchronous trap implementation # gpg: Signature made Thu 25 Feb 2016 11:57:41 GMT using RSA key ID 6B69CA14 # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" * remotes/bkoppelmann/tags/pull-tricore-20160225: target-tricore: add opd trap generation target-tricore: add illegal opcode trap generation target-tricore: add context managment trap generation target-tricore: Add trap handling & SOVF/OVF traps target-tricore: Fix wrong precedences on psw_write target-tricore: fix save_context_upper using env->PSW Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-25Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell38-1327/+314
vhost, virtio, pci, pc Fixes all over the place. virtio dataplane migration support. Old q35 machine types removed. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Thu 25 Feb 2016 11:16:46 GMT using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: (21 commits) q35: No need to check gigabyte_align q35: Remove unused q35-acpi-dsdt.aml file ich9: Remove enable_tco arguments from init functions machine: Remove no_tco field q35: Remove old machine versions tests/vhost-user-bridge: fix build on 32 bit systems vring: remove virtio-scsi: do not use vring in dataplane virtio-blk: do not use vring in dataplane virtio-blk: fix "disabled data plane" mode virtio: export vring_notify as virtio_should_notify virtio: add AioContext-specific function for host notifiers vring: make vring_enable_notification return void block-migration: acquire AioContext as necessary pci core: function pci_bus_init() cleanup pci core: function pci_host_bus_register() cleanup balloon: Use only 'pc-dimm' type dimm for ballooning virtio-balloon: rewrite get_current_ram_size() move get_current_ram_size to virtio-balloon.c vhost-user: don't merge regions with different fds ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-25target-tricore: add opd trap generationBastian Koppelmann1-8/+277
If an instruction uses a 64 bit register which consists of an even-odd pair of 32 bit registers and if the register specifier in the instruction is odd an opd trap is raised. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <1455889426-1923-5-git-send-email-kbastian@mail.uni-paderborn.de>
2016-02-25target-tricore: add illegal opcode trap generationBastian Koppelmann1-19/+156
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <1455889426-1923-4-git-send-email-kbastian@mail.uni-paderborn.de>
2016-02-25target-tricore: add context managment trap generationBastian Koppelmann1-3/+30
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <1455889426-1923-3-git-send-email-kbastian@mail.uni-paderborn.de>
2016-02-25target-tricore: Add trap handling & SOVF/OVF trapsBastian Koppelmann4-2/+147
Add the infrastructure needed to generate and handle traps and implement the generation of SOVF and OVF traps. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <1455889426-1923-2-git-send-email-kbastian@mail.uni-paderborn.de>
2016-02-25target-tricore: Fix wrong precedences on psw_writeBastian Koppelmann1-4/+4
Wrong braces on the restore of the cached TCGv SV and V bit could lead to a wrong PSW. While at this it removes unnecessary braces for the restore of the cached TCGv AV and SAV bits. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2016-02-25target-tricore: fix save_context_upper using env->PSWBastian Koppelmann1-1/+1
If the cached bits for C, V, SV, AV, or SAV were set, they would not be saved during the context save since env->PSW was stored instead of properly reading them using psw_read(). Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2016-02-25Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160225' ↵Peter Maydell36-93/+296
into staging Second pull req with getrandom fix # gpg: Signature made Thu 25 Feb 2016 10:57:42 GMT using RSA key ID DE3C9BC0 # gpg: Good signature from "Riku Voipio <riku.voipio@iki.fi>" # gpg: aka "Riku Voipio <riku.voipio@linaro.org>" * remotes/riku/tags/pull-linux-user-20160225: linux-user: add getrandom() syscall linux-user: correct timerfd_create syscall numbers linux-user: remove unavailable syscalls from aarch64 linux-user: sync syscall numbers with kernel linux-user: Don't assert if guest tries shmdt(0) linux-user: set ppc64/ppc64le default CPU to POWER8 build: [linux-user] Rename "syscall.h" to "target_syscall.h" in target directories linux-user: fix realloc size of target_fd_trans. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-25q35: No need to check gigabyte_alignEduardo Habkost1-3/+1
gigabyte_align is always true on q35, so we don't need the !gigabyte_align compat code anymore. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2016-02-25q35: Remove unused q35-acpi-dsdt.aml fileEduardo Habkost3-5/+1
The file was used only by older machine-types, and it is not needed anymore. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2016-02-25ich9: Remove enable_tco arguments from init functionsEduardo Habkost5-10/+7
The enable_tco arguments are always true, so they are not needed anymore. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2016-02-25machine: Remove no_tco fieldEduardo Habkost2-3/+1
The field is always set to zero, so it is not necessary anymore. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2016-02-25q35: Remove old machine versionsEduardo Habkost1-165/+0
Migration with q35 was not possible before commit 04329029a8c539eb5f75dcb6d8b016f0c53a031a, because q35 unconditionally creates an ich9-ahci device, that was marked as unmigratable. So all q35 machine classes before pc-q35-2.4 were not migratable, so there's no point in keeping compatibility code for them. Remove all old pc-q35 machine classes and keep only pc-q35-2.4 and newer. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
generated by cgit v1.1 at 2024-09-30 02:09:26 +0000