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2012-10-12linux-user: ppc: mark as long long alignedAlexander Graf1-1/+6
The SysV PPC32 ABI dictates that long long (64bit) parameters are pass in odd/even register pairs. Because unlike ARM and MIPS we start at an odd register number, we can reuse the same aligning code that ARM and MIPS use. Clarified inline comment that it is SysV ABI that requires long long aligned parameters - Riku Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12tcg: Remove TCG_TARGET_HAS_GUEST_BASE definePeter Maydell11-26/+0
GUEST_BASE support is now supported by all TCG backends, and is now mandatory. Drop the now-pointless TCG_TARGET_HAS_GUEST_BASE define (set by every backend) and the error if it is unset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12configure: Remove unnecessary host_guest_base codePeter Maydell1-29/+2
All TCG hosts now support guest-base functionality, so we can remove the setting of host_guest_base to 'yes' in every arm of the case "$cpu" statement, and simply set guest_base to default to 'yes'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12linux-user: If loading fails, print error as string, not numberPeter Maydell2-5/+5
If the attempt to load the guest executable fails, print the error message as a string, not a number. This requires us to fix a couple of places in loader_exec() where we were returning -1 instead of a valid negative errno. The change allows us to drop the "Unknown binary format" message because the strerror-enhanced message is now a more self-explanatory "Error while loading $guest-binary: Exec format error". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12linux-user: Fix siginfo handlingRichard Henderson3-20/+44
Compare signal numbers in the proper domain. Convert all of the fields for SIGIO and SIGCHLD. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12alpha-linux-user: Fix sigaltstack structure definitionRichard Henderson1-3/+4
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12linux-user: Implement gethostnameRichard Henderson1-0/+13
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12linux-user: Perform more checks on iovec listsRichard Henderson1-60/+102
Validate count between 0 and IOV_MAX. Limit total length of operation in the same way the kernel does. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12linux-user: fix multi-threaded /proc/self/mapsAlexander Graf1-2/+2
When reading our faked /proc/self/maps from a secondary thread, we get an invalid stack entry. This is because ts->stack_base is not initialized in non-primary threads. However, ts->info is, and the stack layout information we're looking for is there too. So let's use that one instead! Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-12linux-user: fix statfsAlexander Graf1-0/+4
The statfs syscall should always memset(0) its full struct extent before writing to it. Newer versions of the syscall use one of the reserved fields for flags, which would otherwise get stale values from uncleaned memory. This fixes libarchive for me, which got confused about the return value of pathconf("/", _PC_REC_XFER_ALIGN) otherwise, as it some times gave old pointers as return value. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-10ssi: Add slave autoconnect helperPeter Crosthwaite4-3/+44
Added helper function to automatically connect SPI slaves based on the QOM child nodes of a device. A SSI master device can call this routine to automatically hook-up all child nodes to its SPI bus. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10MAINTAINERS: Added maintainerships for SSIPeter A. G. Crosthwaite1-0/+8
Added maintainership for SSI, M25P80 and the Xilinx SPI controllers. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10xilinx_zynq: Added SPI controllers + flashesPeter A. G. Crosthwaite1-0/+34
Added the two SPI controllers to the zynq machine model. Attached two SPI flash devices to each controller. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10xilinx_spips: Xilinx Zynq SPI cntrlr device modelPeter A. G. Crosthwaite2-0/+353
Added device model for the Xilinx Zynq SPI controller (SPIPS). Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10petalogix-ml605: added SPI controller with n25q128Peter A. G. Crosthwaite1-0/+27
Added SPI controller to the reference design, with two n25q128 spi-flashes connected. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10xilinx_spi: Initial impl. of Xilinx SPI controllerPeter A. G. Crosthwaite2-0/+384
Device model for xilinx XPS SPI controller (v2.0) Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10m25p80: Initial implementation of SPI flash devicePeter A. G. Crosthwaite5-0/+604
Added device model for m25p80 style SPI flash family. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10hw: Added generic FIFO API.Peter A. G. Crosthwaite3-0/+178
Added a FIFO API that can be used to create and operate byte FIFOs. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10stellaris: Removed SSI muxPeter A. G. Crosthwaite3-78/+18
Removed the explicit SSI mux and wired the CS line directly up to the SSI devices. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10qdev: allow multiple qdev_init_gpio_in() callsPeter A. G. Crosthwaite3-11/+33
Allow multiple qdev_init_gpio_in() calls for the one device. The first call will define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs to be handled with different handlers. Needed when two levels of the QOM class heirachy both define GPIO functionality, as a single GPIO handler with an index selecter is not possible. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10ssi: Added create_slave_no_init()Peter A. G. Crosthwaite2-2/+8
Slave creation function that can be used to create an SSI slave without qdev_init() being called. This give machine models a chance to set properties. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10ssi: Implemented CS behaviourPeter A. G. Crosthwaite9-16/+118
Added default CS behaviour for SSI slaves. SSI devices can set a property to enable CS behaviour which will create a GPIO on the device which is the CS. Tristating of the bus on SSI transfers is implemented. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-10ssi: Support for multiple attached devicesPeter A. G. Crosthwaite1-15/+9
Removed assertion that only one device is attached to the SSI bus. When multiple devices are attached, all slaves have their transfer function called for transfers. Each device is responsible for knowing whether or not its CS is active, and if not returning 0. The returned data is the logical or of all responses from the (mulitple) devices. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-07Merge branch 'master' of git.qemu.org:/pub/git/qemuBlue Swirl1-1/+1
* 'master' of git.qemu.org:/pub/git/qemu: qemu-barrier: Fix compilation on i386 hosts
2012-10-07qemu-barrier: Fix compilation on i386 hostsAurelien Jarno1-1/+1
Commit 1d31fca470648ec66afd8743491bfb5846306341 tried to fix bug introduced by 610b823ef66b993660f1ab1447a769f190e4f3b3 by including qemu-common.h, which breaks the build further. Include compiler.h instead, as suggested by Blue Swirl. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-07target-sparc: Optimize conditionals using SUBCCRichard Henderson1-61/+131
Aka "normal" comparisons. We now have the infrastructure to pass back non-boolean results from gen_compare. This will automatically get used by both branches and conditional moves. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Fall through from not-taken trapRichard Henderson1-5/+7
Now that we've cleaned up global temporary allocation, we can continue translating the fallthru path of a conditional trap. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Cleanup "global" temporary allocationRichard Henderson1-19/+19
There are 6 temporaries that disas_sparc_insn relies on having been allocated. Now that they are no longer referenced across branches, they need not be allocated as local temps. Move the allocation/free of these temporaries to make it clear that they are local to the translation of a single insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use movcond for FMOV*RRichard Henderson1-30/+16
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use movcond in mulsccRichard Henderson1-6/+5
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Move taddcctv and tsubcctv out of lineRichard Henderson3-102/+66
The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Note that gen_op_t{add,sub}_cc were identical to gen_op_{add,sub}_cc. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy TccRichard Henderson1-38/+53
Share more code between unconditional and conditional paths. Move the computation of the trap number into the conditional BB; avoid using temporaries that have gone out of scope (cpu_tmp32) or rely on local temps (cpu_dst). Fully fold the exception number when the trap number is %g0+imm. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Move sdivx and udivx out of lineRichard Henderson5-52/+37
The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use movcond in gen_generic_branchRichard Henderson1-11/+7
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare and movcond in MOVRRichard Henderson1-17/+14
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare and movcond in MOVCCRichard Henderson1-24/+20
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCCRichard Henderson1-117/+86
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare in TccRichard Henderson1-9/+11
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Introduce DisasCompare and functions to generate itRichard Henderson1-9/+83
For the moment gen_cond et al retain their existing interface, using setcond to turn a (potential) comparison back into a boolean. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy gen_generic_branch interfaceRichard Henderson1-8/+7
The arguments passed are always the same. Pass down just DisasContext instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy save_npc interfaceRichard Henderson1-4/+4
Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy gen_mov_pc_npc interfaceRichard Henderson1-6/+6
Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy save_state interfaceRichard Henderson1-49/+49
Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy gen_trap_ifnofpu interfaceRichard Henderson1-18/+28
We always pass cpu_cond to the cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy flush_cond interfaceRichard Henderson1-5/+5
We always pass cpu_cond to the cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy do_branch interfacesRichard Henderson1-20/+18
We always pass cpu_cond to the r_cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Make CPU_LOG_INT useful by defaultRichard Henderson2-11/+4
No need for ifdefs when the log mask does just as well. No need to print pc/npc when we're dumping the whole cpu state. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy cpu_dump_stateRichard Henderson1-4/+3
We don't really need to be told that %g are general register, etc. Issue a trailing newline to separate blocks. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07tcg: Remove redundant pointer from TCGContextStefan Weil2-3/+1
The pointer entry 'temps' always refers to the array entry 'static_temps'. Removing the pointer and renaming 'static_temps' to 'temps' reduces the size of TCGContext (4 or 8 byte) and allows better code generation. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-06Merge branch 'target-arm.for-upstream' of ↵Aurelien Jarno14-238/+183
git://git.linaro.org/people/pmaydell/qemu-arm * 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: target-arm: Drop unused DECODE_CPREG_CRN macro target-arm: use deposit instead of hardcoded version target-arm: mark a few integer helpers const and pure target-arm: convert sar, shl and shr helpers to TCG target-arm: convert add_cc and sub_cc helpers to TCG target-arm: use globals for CC flags target-arm: Reinstate display of VFP registers in cpu_dump_state cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
generated by cgit v1.1 at 2025-02-03 14:38:03 +0000