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2012-10-29PPC: e500: Map PIO space into core memory regionAlexander Graf2-4/+8
On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is accessible via MMIO. Do this mapping explicitly by mapping the PIO space of our PCI bus into a memory region that lives in memory space. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29xen_platform: convert PIO to new memory api read/writeAlexander Graf1-10/+38
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29vmport: convert PIO to new memory api read/writeAlexander Graf1-9/+12
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29serial: convert PIO to new memory api read/writeAlexander Graf1-13/+17
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29rtl8139: convert PIO to new memory api read/writeAlexander Graf1-42/+36
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pckbd: convert PIO to new memory api read/writeAlexander Graf1-21/+27
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pc port92: convert PIO to new memory api read/writeAlexander Graf1-8/+11
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29mc146818rtc: convert PIO to new memory api read/writeAlexander Graf1-8/+11
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29m48t59: convert PIO to new memory api read/writeAlexander Graf1-10/+14
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29i8254: convert PIO to new memory api read/writeAlexander Graf1-9/+11
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29es1370: convert PIO to new memory api read/writeAlexander Graf1-10/+36
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29virtio-pci: convert PIO to new memory api read/writeAlexander Graf1-77/+49
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29ac97: convert PIO to new memory api read/writeAlexander Graf1-20/+89
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pseries: Implement qemu initiated shutdowns using EPOW eventsDavid Gibson4-2/+342
At present, using 'system_powerdown' from the monitor or otherwise instructing qemu to (cleanly) shut down a pseries guest will not work, because we did not have a method of signalling the shutdown request to the guest. PAPR does include a usable mechanism for this, though it is rather more involved than the equivalent on x86. This involves sending an EPOW (Environmental and POwer Warning) event through the PAPR event and error logging mechanism, which also has a number of other functions. This patch implements just enough of the event/error logging functionality to be able to send a shutdown event to the guest. At least with modern guest kernels and a userspace that is up and running, this means that system_powerdown from the qemu monitor should now work correctly on pseries guests. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29target-ppc: Rework storage of VPA registration stateDavid Gibson3-19/+21
With PAPR guests, hypercalls allow registration of the Virtual Processor Area (VPA), SLB shadow and dispatch trace log (DTL), each of which allow for certain communication between the guest and hypervisor. Currently, we store the addresses of the three areas and the size of the dtl in CPUPPCState. The SLB shadow and DTL are variable sized, with the size being retrieved from within the registered memory area at the hypercall time. This size can later be overwritten with other information, however, so we need to save the size as of registration time. We already do this for the DTL, but not for the SLB shadow, so this patch fixes that. In addition, we change the storage of the VPA information to use fixed size integer types which will make life easier for syncing this data with KVM, which we will need in future. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29pseries: Don't allow duplicate registration of hcalls or RTAS callsDavid Gibson2-2/+10
Currently the pseries machine code allows a callback to be registered for a hypercall number twice, as long as it's the same callback the second time. We don't test for duplicate registrations of RTAS callbacks at all so it will effectively be last registratiojn wins. This was originally done because it was awkward to ensure that the registration happened exactly once, but the code has since been restructured so that's no longer the case. Duplicate registration of a hypercall or RTAS call could well suggest a duplicate initialization which could cause other problems, so this patch makes duplicate registrations a bug, to prevent the old behaviour from hiding other bugs. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29Add USB option in machine optionszhlcindy@gmail.com12-28/+48
When -usb option is used, global varible usb_enabled is set. And all the plaform will create one USB controller according to this variable. In fact, global varibles make code hard to read. So this patch is to remove global variable usb_enabled and add USB option in machine options. All the plaforms will get USB option value from machine options. USB option of machine options will be set either by: * -usb * -machine type=pseries,usb=on Both these ways can work now. They both set USB option in machine options. In the future, the first way will be removed. Signed-off-by: Li Zhang <zhlcindy@linux.vnet.ibm.com> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29e500: Fix serial initializationBharat Bhushan1-1/+1
it was wrongly using serial_hds[0] instead of serial_hds[1] Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29PPC: 440: Emulate DCBR0Alexander Graf1-1/+1
The DCBR0 register on 440 is used to implement system reset. The same register is used on 405 as well, so just reuse the code. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29PPC: Bamboo: Fix memory size DT propertyAlexander Graf1-1/+1
Device tree properties need to be specified in big endian. Fix the bamboo memory size property accordingly. Signed-off-by: Alexander Graf <agraf@suse.de> CC: qemu-stable@nongnu.org
2012-10-29Drop unnecessary check of TARGET_PHYS_ADDR_SPACE_BITSPeter Maydell1-2/+0
For all our PPC targets the physical address space is at least 36 bits, so drop an unnecessary preprocessor conditional check on TARGET_PHYS_ADDR_SPACE_BITS (erroneously introduced as part of the change from target_phys_addr_t to hwaddr). This brings this bit of code into line with the way we handle the other cases which were originally checking TARGET_PHYS_ADDR_BITS in order to avoid compiler complaints about overflowing a 32 bit type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29xilinx_zynq: added QSPI controllerPeter Crosthwaite1-12/+28
Added the QSPI controller to the Zynq. 4 SPI devices are attached to allow modelling of the different geometries. E.G. Dual parallel and dual stacked mode can both be tested with this one arrangement. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2012-10-29xilinx_spips: Generalised to model QSPIPeter Crosthwaite1-34/+255
Extended the xilinx spips controller to model QSPI as well. Paremeterised the operational difference with the normal spi controller (num_ss_bits, width of the tx/rx fifo heads etc.). Multiple bus functionality is modelled (needed for QSPI dual parallel mode. LQSPI is modelled. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2012-10-29m25p80: Support for Quad SPIPeter Crosthwaite1-4/+57
Added the Quad mode read and write commands. Data remains serialized on a single wire, i.e. the quad mode instructions just behave the same as single mode, with the expection of modelling the varying number of dummy/mode bytes between the address bytes and the first data word. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2012-10-28target-i386: cpu: recover items 28-31 of ext2_feature_nameEduardo Habkost1-0/+1
I removed a line by mistake on commit 3b671a40cab2404bc63e57db8cd3afa4ec70bfab, containing the flags lm/i64, 3dnow, and 3dnowext. This patch restores the removed line. Reviewed-by: Don Slutz <Don@cloudswitch.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28qemu-timer: Check for usable fields for SIGEV_THREAD_IDRichard Henderson2-2/+24
Older glibc (RHEL 5.x, Debian 5.x) does not have the _sigev_un._tid member in its structure definition, while the accompanying kernel headers do define SIGEV_THREAD_ID. We need configure to check for both before using it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg-i386: Use %gs prefixes for x86_64 GUEST_BASERichard Henderson1-56/+97
When we allocate a reserved_va for the guest, the kernel will likely choose an address well above 4G. At which point we must use a pair of movabsq+addq to form the host address. If we have OS support, set up a segment register to point to guest_base instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-mips: Use TCG registers for the FPU.Richard Henderson1-42/+54
With normal FP, this doesn't have much affect on the generated code, because most of the FP operations are not CONST/PURE, and so we spill registers in about the same frequency as the explicit load/stores. But with Loongson multimedia instructions, which are all integral and whose helpers are in fact CONST+PURE, this greatly improves the code. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: remove compatiblity call flagsAurelien Jarno1-4/+0
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-xtensa: rename helper flagsAurelien Jarno1-8/+8
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-sparc: rename helper flagsAurelien Jarno1-25/+25
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-sh4: rename helper flagsAurelien Jarno1-3/+3
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-s390x: rename helper flagsAurelien Jarno1-38/+38
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Cc: Alexander Graf <agraf@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-ppc: rename helper flagsAurelien Jarno1-19/+19
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Cc: Alexander Graf <agraf@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-mips: rename helper flagsAurelien Jarno1-53/+53
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-microblaze: rename helper flagsAurelien Jarno1-3/+3
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-i386: rename helper flagsAurelien Jarno1-2/+2
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-cris: rename helper flagsAurelien Jarno1-9/+9
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-arm: rename helper flagsAurelien Jarno1-8/+8
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Cc: Paul Brook <paul@codesourcery.com> Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28target-alpha: rename helper flagsAurelien Jarno1-88/+88
Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: rework TCG helper flagsAurelien Jarno5-30/+60
The current helper flags, TCG_CALL_CONST and TCG_CALL_PURE might be confusing and doesn't provide enough granularity for some helpers (FP helpers for example). This patch changes them into the following helpers flags: - TCG_CALL_NO_READ_GLOBALS means that the helper does not read globals, either directly or via an exception. They will not be saved to their canonical location before calling the helper. - TCG_CALL_NO_WRITE_GLOBALS means that the helper does not modify any globals. They will only be saved to their canonical locations before calling helpers, but they won't be reloaded afterwise. - TCG_CALL_NO_SIDE_EFFECTS means that the call to the function is removed if the return value is not used. It provides convenience flags, to avoid helper definitions longer than 80 characters. It also provides compatibility flags, and updates the documentation. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: synchronize globals for ops with side effectsAurelien Jarno2-11/+26
Operations with side effects (in practice qemu_ld/st ops), only need to synchronize globals to make sure the CPU state is consistent in case of exception. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: forbid ld/st function to modify globalsAurelien Jarno2-7/+10
Mapping a memory address using a global and accessing it through ld/st operations is currently broken. As it doesn't make any sense to do that performance wise, let's forbid that. Update the TCG documentation, and remove partial support for that. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: fix some op flagsAurelien Jarno1-8/+7
Some branch related ops are marked with TCG_OPF_SIDE_EFFECTS, some other not. In practice they don't need to, as they are all marked with TCG_OPF_BB_END, which is handled specifically in all the code. The call op is marked as TCG_OPF_SIDE_EFFECTS, which might be not true as there is are specific flags (TCG_CALL_CONST and TCG_CALL_PURE) for specifying that. On the other hand it always clobber arguments, so mark it as such even if the call op is handled in a different code path. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: don't explicitly save globals and tempsAurelien Jarno1-0/+12
The liveness analysis ensures that globals and temps are at the correct state at a basic block end or with an op with side effects. Avoid looping on all temps, this can be time consuming on targets with a lot of globals. Keep an assert in debug mode. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: start with local temps in TEMP_VAL_MEM stateAurelien Jarno1-1/+5
Start with local temps in TEMP_VAL_MEM state, to make possible a later check that all the temps are correctly saved back to memory. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: always mark dead input arguments as deadAurelien Jarno1-7/+7
Always mark dead input arguments as dead, even if the op is at the basic block end. This will allow to check that all temps are correctly saved. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: rewrite tcg_reg_alloc_mov()Aurelien Jarno1-45/+61
Now that the liveness analysis provides more information, rewrite tcg_reg_alloc_mov(). This changes the behaviour about propagating constants and memory accesses. We now take the assumption that once a value is loaded into a register (from memory or from a constant), it's better to keep it there than to reload it later. This assumption is now always almost correct given that we are now sure the corresponding temp is going to be used later (otherwise it would have been synchronized and marked as dead already). The assumption is wrong if one of the op after clobbers some registers including the one of the holding the temp (this can be avoided by allocating clobbered registers last, which is what most TCG target do), or in case of lack of available register. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: improve tcg_reg_alloc_movi()Aurelien Jarno1-0/+3
Now that the liveness analysis might mark some output temps as dead, call temp_dead() if needed. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28tcg: rework liveness analysisAurelien Jarno1-27/+37
Rework the liveness analysis by tracking temps that need to go back to memory in addition to dead temps tracking. This allows to mark output arguments as "need sync", and to synchronize them back to memory as soon as they are not written anymore. This way even arguments mapping to globals can be marked as "dead", avoiding moves to a new register when input and outputs are aliased. In addition it means that registers are freed as soon as temps are not used anymore, instead of waiting for a basic block end or an op with side effects. This reduces register spilling especially on CPUs with few registers, and spread the mov over all the TB, increasing the performances on in-order CPUs. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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