| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-02-11 | m68k: import bootinfo headers from linux | Laurent Vivier | 5 | -68/+295 |
| 2021-02-11 | m68k: add MSP detection support for stack pointer swap helpers | Lucien Murray-Pitts | 3 | -2/+11 |
| 2021-02-11 | m68k: MOVEC insn. should generate exception if wrong CR is accessed | Lucien Murray-Pitts | 4 | -46/+146 |
| 2021-02-11 | m68k: add missing BUSCR/PCR CR defines, and BUSCR/PCR/CAAR CR to m68k_move_to... | Lucien Murray-Pitts | 2 | -0/+14 |
| 2021-02-11 | m68k: improve comments on m68k_move_to/from helpers | Lucien Murray-Pitts | 1 | -9/+30 |
| 2021-02-11 | m68k: cascade m68k_features by m680xx_cpu_initfn() to improve readability | Lucien Murray-Pitts | 2 | -34/+39 |
| 2021-02-11 | m68k: improve cpu instantiation comments | Lucien Murray-Pitts | 2 | -20/+73 |
| 2021-02-05 | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210205' into... | Peter Maydell | 108 | -1064/+1564 |
| 2021-02-05 | accel: introduce AccelCPUClass extending CPUClass | Claudio Fontana | 4 | -0/+87 |
| 2021-02-05 | accel: replace struct CpusAccel with AccelOpsClass | Claudio Fontana | 44 | -163/+361 |
| 2021-02-05 | accel: extend AccelState and AccelClass to user-mode | Claudio Fontana | 24 | -53/+125 |
| 2021-02-05 | cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass | Claudio Fontana | 36 | -306/+582 |
| 2021-02-05 | cpu: move debug_check_watchpoint to tcg_ops | Claudio Fontana | 5 | -17/+12 |
| 2021-02-05 | cpu: move adjust_watchpoint_address to tcg_ops | Claudio Fontana | 4 | -9/+10 |
| 2021-02-05 | physmem: make watchpoint checking code TCG-only | Claudio Fontana | 1 | -69/+72 |
| 2021-02-05 | cpu: move do_unaligned_access to tcg_ops | Claudio Fontana | 14 | -19/+23 |
| 2021-02-05 | cpu: move cc->transaction_failed to tcg_ops | Claudio Fontana | 12 | -29/+34 |
| 2021-02-05 | cpu: move cc->do_interrupt to tcg_ops | Claudio Fontana | 27 | -42/+41 |
| 2021-02-05 | target/arm: do not use cc->do_interrupt for KVM directly | Claudio Fontana | 2 | -4/+6 |
| 2021-02-05 | cpu: Move debug_excp_handler to tcg_ops | Eduardo Habkost | 7 | -9/+9 |
| 2021-02-05 | cpu: Move tlb_fill to tcg_ops | Eduardo Habkost | 26 | -38/+42 |
| 2021-02-05 | cpu: Move cpu_exec_* to tcg_ops | Eduardo Habkost | 25 | -42/+54 |
| 2021-02-05 | cpu: Move synchronize_from_tb() to tcg_ops | Eduardo Habkost | 13 | -22/+30 |
| 2021-02-05 | accel/tcg: split TCG-only code from cpu_exec_realizefn | Claudio Fontana | 5 | -40/+77 |
| 2021-02-05 | target/riscv: remove CONFIG_TCG, as it is always TCG | Claudio Fontana | 1 | -2/+1 |
| 2021-02-05 | cpu: Introduce TCGCpuOperations struct | Eduardo Habkost | 25 | -30/+48 |
| 2021-02-05 | tcg/tci: Remove TCG_CONST | Richard Henderson | 4 | -194/+89 |
| 2021-02-05 | tcg/tci: Fix TCG_REG_R4 misusage | Richard Henderson | 2 | -10/+5 |
| 2021-02-05 | tcg/tci: Restrict TCG_TARGET_NB_REGS to 16 | Richard Henderson | 2 | -53/+5 |
| 2021-02-05 | tcg/tci: Remove TODO as unused | Richard Henderson | 1 | -8/+0 |
| 2021-02-05 | tcg/tci: Implement 64-bit division | Richard Henderson | 3 | -11/+25 |
| 2021-02-05 | tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_* | Richard Henderson | 2 | -20/+0 |
| 2021-02-05 | tcg/tci: Use g_assert_not_reached | Richard Henderson | 1 | -8/+7 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_{st_i32,st32_i64} | Richard Henderson | 1 | -6/+1 |
| 2021-02-05 | tcg/tci: Move stack bounds check to compile-time | Richard Henderson | 2 | -2/+13 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_st16_{i32,i64} | Richard Henderson | 1 | -7/+1 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_st8_{i32,i64} | Richard Henderson | 1 | -7/+1 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64} | Richard Henderson | 1 | -6/+1 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_ld16s_{i32,i64} | Richard Henderson | 1 | -4/+1 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_ld16u_{i32,i64} | Richard Henderson | 1 | -8/+5 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_ld8s_{i32,i64} | Richard Henderson | 1 | -8/+5 |
| 2021-02-05 | tcg/tci: Merge INDEX_op_ld8u_{i32,i64} | Richard Henderson | 1 | -7/+13 |
| 2021-02-05 | tcg/tci: Inline tci_write_reg64 into 64-bit callers | Richard Henderson | 1 | -33/+27 |
| 2021-02-05 | tcg/tci: Inline tci_write_reg32 into all callers | Richard Henderson | 1 | -36/+30 |
| 2021-02-05 | tcg/tci: Inline tci_write_reg16 into the only caller | Richard Henderson | 1 | -9/+1 |
| 2021-02-05 | tcg/tci: Inline tci_write_reg8 into its callers | Richard Henderson | 1 | -7/+2 |
| 2021-02-05 | tcg/tci: Inline tci_write_reg32s into the only caller | Richard Henderson | 1 | -9/+1 |
| 2021-02-05 | tcg/tci: Implement INDEX_op_ld8s_i64 | Stefan Weil | 1 | -1/+4 |
| 2021-02-05 | tcg/tci: Implement INDEX_op_ld16s_i32 | Stefan Weil | 1 | -1/+4 |
| 2021-02-05 | tcg/tci: Make tci_tb_ptr thread-local | Richard Henderson | 3 | -9/+4 |
