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2024-02-23ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs.Harsh Prateek Bora2-3/+17
spapr_irq_init currently uses existing macro SPAPR_XIRQ_BASE to refer to the range of CPU IPIs during initialization of nr-irqs property. It is more appropriate to have its own define which can be further reused as appropriate for correct interpretation. Suggested-by: Cedric Le Goater <clg@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Kowshik Jois <kowsjois@linux.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23hw/ppc/spapr: Rename 'softmmu' -> 'vhyp_mmu'Philippe Mathieu-Daudé2-1/+1
To reduce the use of the term 'softmmu', rename spapr_softmmu.c to spapr_vhyp_mmu.c. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> [np: change name] Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23hw/ppc/spapr_hcall: Rename {softmmu -> vhyp_mmu}_resize_hpt_prPhilippe Mathieu-Daudé3-7/+10
Since 'softmmu' is quite a loaded term in QEMU, rename the vhyp MMU facilities to use the vhyp_mmu_ prefix rather than softmmu_. vhyp_mmu_ is chosen because the code that manipulates the hash table via guest software hypercalls is QEMU's implementation of the PAPR hypervisor interface, called vhyp. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> [npiggin: Pick a different name, explain it in changelog.] Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23hw/ppc/spapr_hcall: Allow elision of softmmu_resize_hpt_prepPhilippe Mathieu-Daudé2-19/+8
Check tcg_enabled() before calling softmmu_resize_hpt_prepare() and softmmu_resize_hpt_commit() to allow the compiler to elide their calls. The stubs are then unnecessary, remove them. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23hw/ppc/spapr: Add missing licensePhilippe Mathieu-Daudé1-0/+9
Commit 9fdf0c2995 ("Start implementing pSeries logical partition machine") added hw/ppc/spapr_hcall.c, then commit 962104f044 ("hw/ppc: moved hcalls that depend on softmmu") extracted the system code to hw/ppc/spapr_softmmu.c. Take the license and copyrights from the original spapr_hcall.c at commit 9fdf0c2995. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> [npiggin: Update file description.] Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23target/ppc: Rename registers to match ISANicholas Piggin2-11/+11
Several registers have names that don't match the ISA (or convention with other QEMU PPC registers), making them unintuitive to use with GDB. Fortunately most of these registers are obscure and/or have not been correctly implemented in the gdb server (e.g., DEC, TB, CFAR), so risk of breaking users should be low. QEMU should follow the ISA for register name convention (where there is no established GDB name). Acked-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23ppc/pnv: Update skiboot to v7.1Nicholas Piggin2-0/+0
This includes a number of improvements and fixes. Importantly there is a change for QEMU platforms to permit the ChipTOD to be initialised if it is present in the device tree. This will facilitate ChipTOD enablement in pnv. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23tests/avocado: Use default CPU for pseries machineNicholas Piggin1-1/+0
Use the default CPU with the pseries machine unless there is a specific requirement. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23tests/avocado: ppc add hypervisor testsNicholas Piggin2-0/+203
The powernv and pseries machines both provide hypervisor facilities that are supported by KVM. This is a large and complicated set of features that don't get much system-level testing in ppc tests. Add a new test case for these which runs QEMU KVM inside the target. This downloads an Alpine VM image, boots it and downloads and installs the qemu package, then boots a virtual machine under it, re-using the original Alpine VM image. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23tests/avocado: Add pseries KVM boot_linux testNicholas Piggin1-0/+9
ppc has no avocado tests for the KVM backend. Add a KVM boot_linux.py test for pseries. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23tests/avocado: Add ppc pseries and powernv hash MMU testsNicholas Piggin2-7/+36
POWER CPUs support hash and radix MMU modes. Linux supports running in either mode, but defaults to radix. To keep up testing of QEMU's hash MMU implementation, add some Linux hash boot tests. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23tests/avocado: ppc add powernv10 boot_linux_console testNicholas Piggin1-0/+8
Add test for POWER10. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23tests/avocado: improve flaky ppc/pnv boot_linux_console.py testNicholas Piggin1-1/+2
The expected MTD partition detection output does not always appear on the console, despite the test reaching the boot loader and the string appearing in dmesg. Possibly due to an init script that quietens the console output. Using an earlier log message improves reliability. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23tests/avocado: mark boot_linux.py long runtime instead of flakyNicholas Piggin2-6/+13
The ppc64 and s390x tests were first marked skipIf GITLAB_CI by commit c0c8687ef0f ("tests/avocado: disable BootLinuxPPC64 test in CI"), and commit 0f26d94ec9e ("tests/acceptance: skip s390x_ccw_vrtio_tcg on GitLab") due to being very heavy-weight for gitlab CI. Commit 9b45cc99318 ("docs/devel: rationalise unstable gitlab tests under FLAKY_TESTS") changed this to being flaky but it isn't really, it just had a long runtime. So take the SPEED=slow variable from qtests and introduce it to avocado, and make these tests require it. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23target/ppc: Fix crash on machine check caused by ifetchNicholas Piggin1-11/+25
is_prefix_insn_excp() loads the first word of the instruction address which caused an exception, to determine whether or not it was prefixed so the prefix bit can be set in [H]SRR1. This works if the instruction image can be loaded, but if the exception was caused by an ifetch, this load could fail and cause a recursive exception and crash. Machine checks caused by ifetch are not excluded from the prefix check and can crash (see issue 2108 for an example). Fix this by excluding machine checks caused by ifetch from the prefix check. Cc: qemu-stable@nongnu.org Acked-by: Cédric Le Goater <clg@kaod.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2108 Fixes: 55a7fa34f89 ("target/ppc: Machine check on invalid real address access on POWER9/10") Fixes: 5a5d3b23cb2 ("target/ppc: Add SRR1 prefix indication to interrupt handlers") Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-23target/ppc: Fix lxv/stxv MSR facility checkNicholas Piggin1-1/+1
The move to decodetree flipped the inequality test for the VEC / VSX MSR facility check. This caused application crashes under Linux, where these facility unavailable interrupts are used for lazy-switching of VEC/VSX register sets. Getting the incorrect interrupt would result in wrong registers being loaded, potentially overwriting live values and/or exposing stale ones. Cc: qemu-stable@nongnu.org Reported-by: Joel Stanley <joel@jms.id.au> Fixes: 70426b5bb738 ("target/ppc: moved stxvx and lxvx from legacy to decodtree") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1769 Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Tested-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-02-22Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into stagingPeter Maydell58-534/+607
Misc HW patch queue - Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while debugging SMBus targets (Joe) - Simplify x86 PC code (Bernhard) - Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter) - Fix wiring of ICH9 LPC interrupts (Bernhard) - Split core IDE as device / bus / dma (Thomas) - Prefer QDev API over QOM for devices (Phil) - Fix invalid use of DO_UPCAST() in Leon3 (Thomas) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXXQ1IACgkQ4+MsLN6t # wN4e2xAAig55EJh/JwpdGx55rFUab3Ay22jgXrExmBir8hzhyzssY+RUj2ALRa5e # T26kxCEqiuT549FtWm/ci6kVax0QD6bqz/6/j451XB9469Z/3BDOV5rhsqF6zlr5 # BMbyC8PKnMUluG8v1ZuRjC3m2lK3ZvkVnZtj7SZUR50ssEnR32fVIziN14/OYkts # 2B24sLrnLBfvyatMRsuFqGWrcbtMdnwNpjenGfDPOTF33W1sxTQ8GSvx1RV32l69 # Yr/iCVoCl+rGxbLLP1TwqtOwzk32p8RsbIt6rWMqVMv/p5F6ezFeiOk7VHnnEJRH # e7TPxt4XeLGPARMQLT3gQh0MGIIodanSHePRBkczuNmKYTJrz+5jMu2Qg4MmMUE/ # TV0fKgdjh/edhAOHzJgZqLmNV71icl8WBjfsw2qT4ZwgJzWq7YM2/XZKkeWhk2nQ # whLxfgiU4PNJ6vHhebJNjOovCYQTK2FbXR+PvVn5FEbH4CuFr8mqkYc+vNYM9dLA # b7uMk1H8kcb5+kqfPPU2lVd1wO7uqhxYOYU2O9nYq8aw7ioLoLeEdj2IicLtrA/H # GMtyA5cYeabeRzSXF30tM2AR1uQ/e4Z7oNxW6z3GVK1NrQtKilqPgMKut8uWYvva # crJLpRQhGiY3sDrIkkCcAHzv256dZaJNLR1KPViaHOyVPZV+x2s= # =+h2O # -----END PGP SIGNATURE----- # gpg: Signature made Thu 22 Feb 2024 12:51:30 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240222' of https://github.com/philmd/qemu: (32 commits) hw/sparc/leon3: Fix wrong usage of DO_UPCAST macro hw/ide: Stop exposing internal.h to non-IDE files hw/ide: Remove the include/hw/ide.h legacy file hw/ide: Move IDE bus related definitions to a new header ide-bus.h hw/ide: Move IDE device related definitions to ide-dev.h hw/ide: Move IDE DMA related definitions to a separate header ide-dma.h hw/ide: Split qdev.c into ide-bus.c and ide-dev.c hw/ide: Add the possibility to disable the CompactFlash device in the build hw/acpi/ich9_tco: Include missing 'migration/vmstate.h' header hw/acpi/cpu: Use CPUState typedef hw/acpi: Include missing 'qapi/qapi-types-acpi.h' generated header hw/isa/meson.build: Sort alphabetically hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI function hw/i386/pc_sysfw: Use qdev_is_realized() instead of QOM API hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove it hw/i386/pc: Confine system flash handling to pc_sysfw hw/i386/pc: Defer smbios_set_defaults() to machine_done hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn() hw/i386/x86: Turn apic_xrupt_override into class attribute hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # include/hw/i386/pc.h
2024-02-22gitlab: force allow use of pip in Cirrus jobsDaniel P. Berrangé1-1/+1
Python is transitioning to a world where you're not allowed to use 'pip install' outside of a virutal env by default. The rationale is to stop use of pip clashing with distro provided python packages, which creates a major headache on distro upgrades. All our CI environments, however, are 100% disposable so the upgrade headaches don't exist. Thus we can undo the python defaults to allow pip to work. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Message-id: 20240222114038.2348718-1-berrange@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-02-22Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingPeter Maydell46-88/+88
trivial patches for 2024-02-22 # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmXXLtwPHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5ZKH0H/0qdQXdoc/ZTdAtUPFJGhEc6KMeOO1w9928w # OSOB7w4dJiKt6I53WtmY9f2+7/CMJHyscV3xlClRaaZeJVFzgwOo8Wjqkmwa8uOw # Nl5GcL2egBPuY7Ucc1eNIj/I4RbS1pX5vURkUfTG3AH1SEbFAv9Gk6qBtrmer2YA # hg2DdCskvPd8EOovx3sWQRH+Ra4w3hxaAELS9sa9ZKLBAaYvucYan9IjLaJqSY84 # b441QXu3ht/DpLw6d/HDWUqwYUOJD0HUhPSvba1xCsrzQVXFE7VhR5O/cDrqs2qm # 2fcMW6j62raPdK1u77WaRdslPy34YUmjk7lwZ8wiS7fmDx0Aqcg= # =0va1 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 22 Feb 2024 11:24:12 GMT # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (34 commits) system/vl: Update description for input grab key docs/system: Update description for input grab key hw/hppa/Kconfig: Fix building with "configure --without-default-devices" target/sparc: correct typos s390x: correct typos m68k: correct typos hexagon: correct typos ci/gitlab-pipeline-status: correct typos qemu-options.hx: correct typos qapi/ui: correct typos pc-bios/README: correct typos hw/riscv/virt.h: correct typos hw/net/npcm_gmac.h: correct typos hw/cxl/cxl_device.h: correct typos hw/arm/omap.h: correct typos include/exec/memory.h: correct typos sh4: correct typos ppc: correct typos loongson3: correct typos accel/tcg: correct typos ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-02-22.gitlab-ci.d/windows.yml: Drop msys2-32bit jobPeter Maydell1-9/+0
MSYS2 is dropping support for 32-bit Windows. This shows up for us as various packages we were using in our CI job no longer being available to install, which causes the job to fail. In commit 8e31b744fdf we dropped the dependency on libusb and spice, but the dtc package has also now been removed. For us as QEMU upstream, "32 bit x86 hosts for system emulation" have already been deprecated as of QEMU 8.0, so we are ready to drop them anyway. Drop the msys2-32bit CI job, as the first step in doing this. This is cc'd to stable, because this job will also be broken for CI on the stable branches. We can't drop 32-bit support entirely there, but we will still be covering at least compilation for 32-bit Windows via the cross-win32-system job. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20240220165602.135695-1-peter.maydell@linaro.org
2024-02-22hw/sparc/leon3: Fix wrong usage of DO_UPCAST macroThomas Huth1-1/+1
leon3.c currently fails to compile with some compilers when the -Wvla option has been enabled: ../hw/sparc/leon3.c: In function ‘leon3_cpu_reset’: ../hw/sparc/leon3.c:153:5: error: ISO C90 forbids variable length array ‘offset_must_be_zero’ [-Werror=vla] 153 | ResetData *s = (ResetData *)DO_UPCAST(ResetData, info[id], info); | ^~~~~~~~~ cc1: all warnings being treated as errors Looking at this code, the DO_UPCAST macro is indeed used in a wrong way here: DO_UPCAST is supposed to check that the second parameter is the first entry of the struct that the first parameter indicates, but since we use and index into the info[] array, this of course cannot work. The intention here was likely rather to use the container_of() macro instead, so switch the code accordingly. Fixes: d65aba8286 ("hw/sparc/leon3: implement multiprocessor") Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240221180751.190489-1-thuth@redhat.com> Tested-by: Clément Chigot <chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/ide: Stop exposing internal.h to non-IDE filesThomas Huth7-2/+7
include/hw/ide/internal.h is currently included by include/hw/ide/pci.h and thus exposed to a lot of files that are not part of the IDE subsystem. Stop including internal.h there and use the appropriate new headers ide-bus.h and ide-dma.h instead. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20240220085505.30255-8-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/ide: Remove the include/hw/ide.h legacy fileThomas Huth4-12/+3
There was only one prototype left in this legacy file. Move it to ide-dev.h to finally get rid of it. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20240220085505.30255-7-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/ide: Move IDE bus related definitions to a new header ide-bus.hThomas Huth2-39/+43
Let's consolidate the public IDE bus related functions in a separate header. Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240220085505.30255-6-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/ide: Move IDE device related definitions to ide-dev.hThomas Huth3-143/+144
Untangle internal.h by moving public IDE device related definitions to ide-dev.h. Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240220085505.30255-5-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/ide: Move IDE DMA related definitions to a separate header ide-dma.hThomas Huth2-28/+38
These definitions are required outside of the hw/ide/ code, too, so lets's move them from internal.h to a new header called ide-dma.h. Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240220085505.30255-4-thuth@redhat.com> [PMD: Use IDEDMAOps typedef in struct IDEDMA] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/ide: Split qdev.c into ide-bus.c and ide-dev.cThomas Huth5-99/+134
qdev.c is a mixture between IDE bus specific functions and IDE device functions. Let's split it up to make it more obvious which part is related to bus handling and which part is related to device handling. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20240220085505.30255-3-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/ide: Add the possibility to disable the CompactFlash device in the buildThomas Huth5-49/+106
For distros like downstream RHEL, it would be helpful to allow to disable the CompactFlash device. For making this possible, we need a separate Kconfig switch for this device, and the code should reside in a separate file. Let's also introduce a new header ide-dev.h which can be used to collect definitions related to IDE devices. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20240220085505.30255-2-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/acpi/ich9_tco: Include missing 'migration/vmstate.h' headerPhilippe Mathieu-Daudé1-0/+1
We need the VMStateDescription structure definition from "migration/vmstate.h" in order to declare vmstate_tco_io_sts. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20240219141412.71418-4-philmd@linaro.org>
2024-02-22hw/acpi/cpu: Use CPUState typedefPhilippe Mathieu-Daudé1-1/+1
QEMU coding style recommend using structure typedefs: https://www.qemu.org/docs/master/devel/style.html#typedefs Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20240126220407.95022-2-philmd@linaro.org>
2024-02-22hw/acpi: Include missing 'qapi/qapi-types-acpi.h' generated headerPhilippe Mathieu-Daudé2-0/+2
ACPIOSTInfo is a QAPI generated structure: $ git grep -w ACPIOSTInfo qapi/acpi.json:81:# @ACPIOSTInfo: qapi/acpi.json:99:{ 'struct': 'ACPIOSTInfo', qapi/acpi.json:109:# Return a list of ACPIOSTInfo for devices that support status Include the "qapi/qapi-types-acpi.h" header to avoid the following errors when including "hw/acpi/cpu.h" or "hw/acpi/memory_hotplug.h" elsewhere: include/hw/acpi/cpu.h:67:52: error: unknown type name 'ACPIOSTInfoList' void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list); ^ include/hw/acpi/memory_hotplug.h:51:55: error: unknown type name 'ACPIOSTInfoList' void acpi_memory_ospm_status(MemHotplugState *mem_st, ACPIOSTInfoList ***list); ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20240219141412.71418-2-philmd@linaro.org>
2024-02-22hw/isa/meson.build: Sort alphabeticallyBernhard Beschow1-1/+1
Fixes: fbd758008f0f "hw/isa: extract FDC37M81X to a separate file" Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240218131701.91132-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI functionBernhard Beschow1-1/+1
The interrupt handlers need to be populated before the device is realized since internal devices such as the RTC are wired during realize(). If the interrupt handlers aren't populated, devices such as the RTC will be wired with a NULL interrupt handler, i.e. MC146818RtcState::irq is NULL. Fixes: fc11ca08bc29 "hw/i386/q35: Realize LPC PCI function before accessing it" Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20240217104644.19755-1-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc_sysfw: Use qdev_is_realized() instead of QOM APIPhilippe Mathieu-Daudé1-4/+2
Prefer QDev API for QDev objects, avoid the underlying QOM layer. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20240216110313.17039-3-philmd@linaro.org>
2024-02-22hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove itBernhard Beschow1-13/+2
pc_system_flash_create() checked for pcmc->pci_enabled which is redundant since its caller already checked it. The method can be turned into just two lines, so inline and remove it. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240208220349.4948-8-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc: Confine system flash handling to pc_sysfwBernhard Beschow4-6/+4
Rather than distributing PC system flash handling across three files, let's confine it to one. Now, pc_system_firmware_init() creates, configures and cleans up the system flash which makes the code easier to understand. It also avoids the extra call to pc_system_flash_cleanup_unused() in the Xen case. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240208220349.4948-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc: Defer smbios_set_defaults() to machine_doneBernhard Beschow6-23/+14
Handling most of smbios data generation in the machine_done notifier is similar to how the ARM virt machine handles it which also calls smbios_set_defaults() there. The result is that all pc machines are freed from explicitly worrying about smbios setup. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240208220349.4948-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn()Bernhard Beschow4-12/+3
Resolves redundant code in the piix and q35 machines. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240208220349.4948-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/x86: Turn apic_xrupt_override into class attributeBernhard Beschow3-5/+6
The attribute isn't user-changeable and only true for pc-based machines. Turn it into a class attribute which allows for inlining pc_guest_info_init() into pc_machine_initfn(). Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240208220349.4948-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done()Peter Maydell1-23/+16
In the i386 PC machine, we want to run the pc_cmos_init_late() function only once the IDE and floppy drive devices have been set up. We currently do this using qemu_register_reset(), and then have the function call qemu_unregister_reset() on itself, so it runs exactly once. This was an expedient way to do it back in 2010 when we first added this (in commit c0897e0cb94e8), but now we have a more obvious point to do "machine initialization that has to happen after generic device init": the machine-init-done hook. Do the pc_cmos_init_late() work from our existing PC machine init done hook function, so we can drop the use of qemu_register_reset() and qemu_unregister_reset(). Because the pointers to the devices we need (the IDE buses and the RTC) are now all in the machine state, we don't need the pc_cmos_init_late_arg struct and can just pass the PCMachineState pointer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240220160622.114437-3-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc: Store pointers to IDE buses in PCMachineStatePeter Maydell4-18/+12
Add the two IDE bus BusState pointers to the set we keep in PCMachineState. This allows us to avoid passing them to pc_cmos_init(), and also will allow a refactoring of how we call pc_cmos_init_late(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> [PMD: Do not zero-init pcms->idebus[] again] Message-ID: <20240220160622.114437-2-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i386/pc_piix: Share pc_cmos_init() invocation between pc and isapc machinesBernhard Beschow1-5/+3
Both invocations are the same and either one is always executed. Avoid this redundancy. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240208220349.4948-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/i2c/smbus_slave: Add object path on error printsJoe Komlodi1-2/+6
The current logging doesn't tell us which specific smbus device is an error state. Signed-off-by: Joe Komlodi <komlodi@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240202204847.2062798-3-komlodi@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22hw/tricore/testboard: Use qdev_new() instead of QOM basic APIPhilippe Mathieu-Daudé2-6/+1
Prefer QDev API for QDev objects, avoid the underlying QOM layer. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20240216110313.17039-5-philmd@linaro.org>
2024-02-22hw/ppc/pnv_bmc: Use qdev_new() instead of QOM APIPhilippe Mathieu-Daudé1-5/+5
Prefer QDev API for QDev objects, avoid the underlying QOM layer. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20240216110313.17039-6-philmd@linaro.org>
2024-02-22hw/ppc/spapr_cpu: Use qdev_is_realized() instead of QOM APIPhilippe Mathieu-Daudé1-2/+1
Prefer QDev API for QDev objects, avoid the underlying QOM layer. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20240216110313.17039-4-philmd@linaro.org>
2024-02-22hw/ppc/ppc440_pcix: Move ppc440_pcix.c to hw/pci-host/Philippe Mathieu-Daudé8-10/+16
ppc440_pcix.c is moved from the target specific ppc_ss[] meson source set to pci_ss[] which is common to all targets: the object is built once. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240215105017.57748-5-philmd@linaro.org>
2024-02-22hw/ppc/ppc4xx_pci: Move ppc4xx_pci.c to hw/pci-host/Philippe Mathieu-Daudé9-7/+12
ppc4xx_pci.c is moved from the target specific ppc_ss[] meson source set to pci_ss[] which is common to all targets: the object is built once. Declare PPC4XX_PCI selector in pci-host/Kconfig. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240215105017.57748-4-philmd@linaro.org>
2024-02-22hw/ppc/ppc4xx_pci: Extract PCI host definitions to hw/pci-host/ppc4xx.hPhilippe Mathieu-Daudé8-7/+23
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240215105017.57748-3-philmd@linaro.org>
2024-02-22hw/ppc/ppc4xx_pci: Remove unused "hw/ppc/ppc.h" headerPhilippe Mathieu-Daudé2-2/+0
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240215105017.57748-2-philmd@linaro.org>
generated by cgit v1.1 at 2025-02-14 04:09:17 +0000