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2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini319-759/+787
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04ioport: Move portio types to ioport.hJan Kiszka2-19/+11
This decouples memory.h from ioport.h, concentrating all portio related types in a single header. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04vmport: Disentangle read handler type from portioJan Kiszka2-4/+6
In case the latter may vanish one day, make sure the vmport read handler type will remain unaffected. This is also conceptually cleaner. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04ioport: Remove unused old dispatching servicesJan Kiszka4-283/+0
Remove unused ioport_register and isa_unassign_ioport along with everything that only those services used. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04ioport: Switch dispatching to memory core layerJan Kiszka6-159/+102
The current ioport dispatcher is a complex beast, mostly due to the need to deal with old portio interface users. But we can overcome it without converting all portio users by embedding the required base address of a MemoryRegionPortio access into that data structure. That removes the need to have the additional MemoryRegionIORange structure in the loop on every access. To handle old portio memory ops, we simply install dispatching handlers for portio memory regions when registering them with the memory core. This removes the need for the old_portio field. We can drop the additional aliasing of ioport regions and also the special address space listener. cpu_in and cpu_out now simply call address_space_read/write. And we can concentrate portio handling in a single source file. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04xen: Mark fixed platform I/O as unalignedJan Kiszka1-0/+4
Before switching to the memory core dispatcher, we need to make sure that this pv-device will continue to receive unaligned portio accesses. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04vmware-vga: Accept unaligned I/O accessesJan Kiszka1-0/+4
Before switching to the memory core dispatcher, we need to make sure that this pv-device will continue to receive unaligned portio accesses. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04isa: implement isa_is_ioport_assigned via memory_region_findJan Kiszka4-16/+10
Open-code isa_is_ioport_assigned via a memory region lookup. As all IO ports are now directly or indirectly registered via the memory API, this becomes possible and will finally allow us to drop the ioport tables. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04Privatize register_ioport_read/writeJan Kiszka2-8/+4
No more users outside of ioport.c. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04vt82c686: replace register_ioport*Jan Kiszka1-14/+26
Convert over to memory regions to obsolete register_ioport*. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04prep: replace register_ioport*Jan Kiszka1-8/+15
Convert over to memory regions to obsolete register_ioport*. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04i82374: replace register_ioport*Jan Kiszka1-5/+13
Convert over to memory regions to obsolete register_ioport*. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04wdt_ib700: replace register_ioport*Jan Kiszka1-2/+10
Convert over to memory regions to obsolete register_ioport*. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04applesmc: replace register_ioport*Jan Kiszka1-12/+38
Convert over to memory regions to obsolete register_ioport*. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04adlib: replace register_ioport*Jan Kiszka1-8/+12
Convert over to memory regions to obsolete register_ioport*. CC: malc <av1474@comtv.ru> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04dma: keep a device alive while it has SGListsPaolo Bonzini7-12/+25
Reviewed-by: Anthony Liguori <aliguori@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04scsi: keep device alive while it has requestsPaolo Bonzini1-2/+10
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-02int128: optimize and add test casesPaolo Bonzini3-9/+234
For add, the carry only requires checking one of the arguments. For sub and neg, we can similarly optimize computation of the carry. For ge, we can just do lexicographic order. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-01Merge remote-tracking branch 'agraf/ppc-for-upstream' into stagingAnthony Liguori38-205/+792
# By Alexander Graf (12) and others # Via Alexander Graf * agraf/ppc-for-upstream: (32 commits) PPC: Ignore writes to L2CR mac-io: Add escc-legacy memory alias region PPC: Newworld: Add second uninorth control register set PPC: Newworld: Add uninorth token register PPC: Add clock-frequency export for Mac machines PPC: Introduce an alias cache for faster lookups PPC: Fix GDB read on code area for PPC6xx PPC: Add dump_mmu() for 6xx target-ppc: Introduce unrealizefn for PowerPCCPU booke_ppc: limit booke timer to max when timeout overflow Graphics: Switch to 800x600x32 as default mode pseries: Update MAINTAINERS information target-ppc kvm: save cr register pseries: Fix compiler warning (conversion of pointer to integral value) spapr-rtas: add CPU argument to RTAS calls target-ppc: Change default machine for 64-bit ppc: do not register IABR SPR twice for 603e target-ppc: Drop redundant flags assignments from CPU families mpc8544_guts: Turn qdev initfn into instance_init mpc8544_guts: QOM'ify ... Message-id: 1372556709-23868-1-git-send-email-agraf@suse.de Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-01Merge remote-tracking branch 'cohuck/virtio-ccw-upstr' into stagingAnthony Liguori3-10/+12
# By Cornelia Huck # Via Cornelia Huck * cohuck/virtio-ccw-upstr: virtio-ccw: fix build breakage on windows Message-id: 1372669523-4039-1-git-send-email-cornelia.huck@de.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-01Merge remote-tracking branch 'luiz/queue/qmp' into stagingAnthony Liguori1-39/+55
# By Kevin Wolf # Via Luiz Capitulino * luiz/queue/qmp: hmp: Make "info block" output more readable Message-id: 1372452199-23237-1-git-send-email-lcapitulino@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-01virtio-ccw: fix build breakage on windowsCornelia Huck3-10/+12
event_notifier_get_fd() is not available on windows hosts. Fix this by moving the calls to event_notifier_get_fd() to the kvm code. Reported-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2013-07-01PPC: Ignore writes to L2CRAlexander Graf1-11/+11
The L2CR register contains a number of bits that either impose configuration which we can't deal with or mean "something is in progress until the bit is 0 again". Since we don't model the former and we do want to accomodate guests using the latter semantics, let's just ignore writes to L2CR. That way guests always read back 0 and are usually happy with that. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01mac-io: Add escc-legacy memory alias regionAlexander Graf1-0/+47
Mac OS X's debugging serial driver accesses the ESCC through a different register layout, called "escc-legacy". This layout differs from the normal escc register layout purely by the location of the respective registers. This patch adds a memory alias region that takes normal escc registers and maps them into the escc-legacy register space. With this patch applied, a Mac OS X guest successfully emits debug output on the serial port when run with debug parameters set, for example by running: $ qemu-system-ppc -prom-env -'boot-args=-v debug=0x8 io=0xff serial=0x3' \ -cdrom 10.4.iso -boot d Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Newworld: Add second uninorth control register setAlexander Graf1-0/+4
Mac OS X requires a second uninorth register set to be mapped a few bytes above the first one. Let's just expose it to make it happy. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Newworld: Add uninorth token registerAlexander Graf1-2/+11
Mac OS X expects the uninorth control register set to contain one register that always reads back what it writes in. Expose that. This is just a temporary hack. Eventually, we want to expose the uninorth (/uni-n in device tree) as a separate QOM device. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Add clock-frequency export for Mac machinesAlexander Graf3-0/+5
Support in fwcfg has been around for exposure of the clock-frequency CPU property. OpenBIOS reads it, we just never exposed it. Since Mac OS X is very picky about its clock frequency values, let's just take a known good value and always expose that. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Introduce an alias cache for faster lookupsAlexander Graf3-7/+30
When running QEMU with "-cpu ?" we walk through every alias for every target CPU we know about. This takes several seconds on my very fast host system. Let's introduce a class object cache in the alias table. Using that we don't have to go through the tedious work of finding our target class. Instead, we can just go directly from the alias name to the target class pointer. This patch brings -cpu "?" to reasonable times again. Before: real 0m4.716s After: real 0m0.025s Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Fix GDB read on code area for PPC6xxFabien Chouteau1-1/+9
On PPC 6xx, data and code have separated TLBs. Until now QEMU was only looking at data TLBs, which is not good when GDB wants to read code. This patch adds a second call to get_physical_address() with an ACCESS_CODE type of access when the first call with ACCESS_INT fails. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Add dump_mmu() for 6xxFabien Chouteau1-0/+92
"(qemu) info tlb" is a very useful tool for debugging, so I implemented the missing 6xx version. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> [agraf: fix printfs on hwaddr to PRI] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01target-ppc: Introduce unrealizefn for PowerPCCPUAndreas Färber2-2/+18
Use it to clean up the opcode table, resolving a former TODO from Jocelyn. Also switch from malloc() to g_malloc(). Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01booke_ppc: limit booke timer to max when timeout overflowBharat Bhushan1-4/+20
Limit watchdog and fit timer to maximum timeout value which qemu timer can support (INT64_MAX). This maximum timeout will be hundreds of years, so limiting to max timeout is pretty safe. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01Graphics: Switch to 800x600x32 as default modeAlexander Graf1-1/+1
We have stayed at 800x600x15 as default graphics mode for the last 9 years. If there ever was a reason to be there, surely nobody remembers it. However, recently non-Linux PPC guests started to show bad effects on 15 bit color mode. They do work just fine with 32 bits however. So let's switch to 32 bit color as the default graphic mode. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01pseries: Update MAINTAINERS informationDavid Gibson1-1/+4
I'm no longer at IBM, and therefore no long actively working on the pseries (aka sPAPR) qemu machine type. This patch removes my information in the MAINTAINERS file. While we're at it, I've added some extra file patterns for pseries specific files that weren't included in the existing pattern. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [agraf: Remove new maintainer addition] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01target-ppc kvm: save cr registerAlexey Kardashevskiy1-0/+5
This adds a missing code to save CR (condition register) via kvm_arch_put_registers(). kvm_arch_get_registers() already has it. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01pseries: Fix compiler warning (conversion of pointer to integral value)Stefan Weil1-1/+1
This kind of type cast must use uintptr_t or target_ulong to be portable for hosts with sizeof(void *) != sizeof(long). Here the value is assigned to a variable of type target_ulong. Signed-off-by: Stefan Weil <sw@weilnetz.de> [agraf: fix compilation on 32bit hosts] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01spapr-rtas: add CPU argument to RTAS callsAnthony Liguori8-28/+37
RTAS is a hypervisor provided binary blob that a guest loads and calls into to execute certain functions. It's similar to the vsyscall page in Linux or the short lived VMCI paravirt interface from VMware. The QEMU implementation of the RTAS blob is simply a passthrough that proxies all RTAS calls to the hypervisor via an hypercall. While we pass a CPU argument for hypercall handling in QEMU, we don't pass it for RTAS calls. Since some RTAs calls require making hypercalls (normally RTAS is implemented as guest code) we have nasty hacks to allow that. Add a CPU argument to RTAS call handling so we can more easily invoke hypercalls just as guest code would. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01target-ppc: Change default machine for 64-bitDavid Gibson2-3/+1
Currently, for qemu-system-ppc64, the default machine type is 'mac99'. The mac99 machine is not being actively maintained, and represents a bizarre hybrid of components that never actually existed as a real system. This patch changes the default machine to 'pseries', which is actively maintained and works well with most modern ppc64 Linux distributions as a guest. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [agraf: adjust commit message] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01ppc: do not register IABR SPR twice for 603eHervé Poussineau1-5/+0
IABR SPR is already registered in gen_spr_603(), called from init_proc_603E(). Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01target-ppc: Drop redundant flags assignments from CPU familiesAndreas Färber1-45/+0
Previous code has #define POWERPC_INSNS2_<family> PPC_NONE in some places for macrofied assignment to insns_flags2 field. PPC_NONE is defined as zero though and QOM classes are zero-initialized, so drop any pcc->insns_flags2 = PPC_NONE; assignments. PPC_NONE itself is still in use in translate.c. Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01mpc8544_guts: Turn qdev initfn into instance_initAndreas Färber1-13/+5
SysBus can deal with NULL SysBusDeviceClass::init since 4ce5dae. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01mpc8544_guts: QOM'ifyAndreas Färber1-5/+9
Introduce type constant, cast macro and rename parent field. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01mpc8544_guts: Fix MemoryRegion nameAndreas Färber1-1/+1
6544 -> 8544 Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01intc/openpic_kvm: Fix QOM and build issuesAndreas Färber3-22/+35
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01intc/openpic: Convert to QOM realizeAndreas Färber1-15/+19
Split qdev initfn into instance_init and realize functions. Change one occurrence of "klass" while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01intc/openpic: QOM'ifyAndreas Färber4-8/+15
Introduce type constant and cast macro. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01kvm/openpic: in-kernel mpic supportScott Wood8-6/+337
Enables support for the in-kernel MPIC that thas been merged into the KVM next branch. This includes irqfd/KVM_IRQ_LINE support from Alex Graf (along with some other improvements). Note from Alex regarding kvm_irqchip_create(): On x86, one would call kvm_irqchip_create() to initialize an in-kernel interrupt controller. That function then goes ahead and initializes global capability variables as well as the default irq routing table. On ppc, we can't call kvm_irqchip_create() because we can have different types of interrupt controllers. So we want to do all the things that function would do for us in the in-kernel device init handler. Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: squash in kvm_irqchip_commit_routes patch, fix non-kvm build, fix ppcemb] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Add non-kvm stub fileAlexander Graf2-0/+13
There are cases where a kvm provided function is called from generic hw code that doesn't know whether kvm is available or not. Provide a stub file which can provide simple replacement functions for those cases. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-01KVM: PIC: Only commit irq routing when necessaryAlexander Graf3-3/+5
The current logic updates KVM's view of our interrupt map every time we change it. While this is nice and bullet proof, it slows things down badly for me. QEMU spends about 3 seconds on every start telling KVM what news it has on its routing maps. Instead, let's just synchronize the whole irq routing map as a whole when we're done constructing it. For things that change during runtime, we can still update the routing table on demand. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: e500: factor out mpic init codeScott Wood1-22/+34
KVM in-kernel MPIC support is going to expand this even more, so let's keep it contained. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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