aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2022-06-28semihosting: Split out semihost_sys_renameRichard Henderson3-20/+62
Split out the non-ARM specific portions of SYS_RENAME to a reusable function. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_removeRichard Henderson3-12/+44
Split out the non-ARM specific portions of SYS_REMOVE to a reusable function. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_flenRichard Henderson3-61/+66
The ARM-specific SYS_FLEN isn't really something that can be reused by other semihosting apis, but there are parts that can reused for the implementation of semihost_sys_fstat. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_isattyRichard Henderson3-26/+53
Split out the non-ARM specific portions of SYS_ISTTY to a reusable function. This handles all GuestFD. Add a common_semi_istty_cb helper to translate the Posix error return, 0+ENOTTY, to the Arm semihosting not-a-file success result. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_lseekRichard Henderson4-38/+102
Split out the non-ARM specific portions of SYS_SEEK to a reusable function. This handles all GuestFD. Isolate the curious ARM-specific return value processing to a new callback, common_semi_seek_cb. Expand the internal type of the offset to int64_t, and provide the whence argument, which will be required by m68k and nios2 semihosting. Note that gdb_do_syscall %x reads target_ulong, not int. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Bound length for semihost_sys_{read,write}Richard Henderson1-0/+16
Fixes a minor bug in which a 64-bit guest on a 32-bit host could truncate the length. This would only ever cause a problem if there were no bits set in the low 32, so that it truncates to 0. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_writeRichard Henderson3-51/+61
Split out the non-ARM specific portions of SYS_WRITE to a reusable function. This handles all GuestFD. This removes the last use of common_semi_syscall_len. Note that gdb_do_syscall %x reads target_ulong, not int. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_readRichard Henderson3-65/+113
Split out the non-ARM specific portions of SYS_READ to a reusable function. This handles all GuestFD. Isolate the curious ARM-specific return value processing to a new callback, common_semi_rw_cb. Note that gdb_do_syscall %x reads target_ulong, not int. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_closeRichard Henderson4-41/+57
Split out the non-ARM specific portions of SYS_CLOSE to a reusable function. This handles all GuestFD. Note that gdb_do_syscall %x reads target_ulong, not int. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out semihost_sys_openRichard Henderson5-45/+193
Split out the non-ARM specific portions of SYS_OPEN to a reusable function. This handles gdb and host file i/o. Add helpers to validate the length of the filename string. Prepare for usage by other semihosting by allowing the filename length parameter to be 0, and calling strlen. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Move GET_ARG/SET_ARG earlier in the fileRichard Henderson1-24/+24
Moving this to be useful for another function besides do_common_semihosting. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Use env more often in do_common_semihostingRichard Henderson1-4/+3
We've already loaded cs->env_ptr into a local variable; use it. Since env is unconditionally used, we don't need a dummy use. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out common-semi-target.hRichard Henderson3-93/+113
Move the ARM and RISCV specific helpers into their own header file. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out common_semi_has_synccacheRichard Henderson1-7/+13
We already have some larger ifdef blocks for ARM and RISCV; split out a boolean test for SYS_SYNCCACHE. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split common_semi_flen_buf per targetRichard Henderson1-23/+21
We already have some larger ifdef blocks for ARM and RISCV; split out common_semi_stack_bottom per target. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split is_64bit_semihosting per targetRichard Henderson1-11/+8
We already have some larger ifdef blocks for ARM and RISCV; split the function into multiple implementations per arch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Use struct gdb_stat in common_semi_flen_cbRichard Henderson1-8/+6
Load the entire 64-bit size value. While we're at it, use offsetof instead of an integer constant. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28gdbstub: Convert GDB error numbers to host error numbersRichard Henderson1-0/+31
Provide the callback with consistent state -- always use host error numbers. The individual callback can then decide if the errno requires conversion for the guest. Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28include/exec: Define errno values in gdbstub.hRichard Henderson1-0/+22
Define constants for the errno values defined by the gdb remote fileio protocol. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28include/exec: Move gdb_stat and gdb_timeval to gdbstub.hRichard Henderson3-54/+33
We have two copies of these structures, and require them in semihosting/ going forward. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28include/exec: Move gdb open flags to gdbstub.hRichard Henderson4-23/+9
There were 3 copies of these flags. Place them in the file with gdb_do_syscall, with which they belong. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Remove GDB_O_BINARYRichard Henderson1-7/+6
The value is zero, and gdb always opens files in binary mode. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Move common-semi.h to include/semihosting/Richard Henderson1-0/+0
This header is not private to the top-level semihosting directory, so place it in the public include directory. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Return void from do_common_semihostingRichard Henderson8-294/+263
Perform the cleanup in the FIXME comment in common_semi_gdb_syscall. Do not modify guest registers until the syscall is complete, which in the gdbstub case is asynchronous. In the synchronous non-gdbstub case, use common_semi_set_ret to set the result. Merge set_swi_errno into common_semi_cb. Rely on the latter for combined return value / errno setting. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Clean up common_semi_open_cbRichard Henderson1-4/+2
Use common_semi_cb to return results instead of calling set_swi_errno and common_semi_set_ret directly. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Clean up common_semi_flen_cbRichard Henderson1-9/+11
Do not read from the gdb struct stat buffer if the callback is reporting an error. Use common_semi_cb to finish returning results. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Adjust error checking in common_semi_cbRichard Henderson1-1/+1
The err parameter is non-zero if and only if an error occured. Use this instead of ret == -1 for determining if we need to update the saved errno. This fixes the errno setting of SYS_ISTTY, which returns 0 on error, not -1. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Inline set_swi_errno into common_semi_cbRichard Henderson1-9/+10
Do not store 'err' into errno only to read it back immediately. Use 'ret' for the return value, not 'reg0'. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Split out guestfd.cRichard Henderson10-142/+233
In arm-compat-semi.c, we have more advanced treatment of guest file descriptors than we do in other implementations. Split out GuestFD and related functions to a new file so that they can be shared. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Simplify softmmu_lock_user_stringRichard Henderson1-12/+3
We are not currently bounding the search to the 1024 bytes that we allocated, possibly overrunning the buffer. Use softmmu_strlen_user to find the length and allocate the correct size from the beginning. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Add target_strlen for softmmu-uaccess.hRichard Henderson2-0/+52
Mirror the interface of the user-only function of the same name. Use probe_access_flags for the common case of ram, and cpu_memory_rw_debug for the uncommon case of mmio. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v3: Use probe_access_flags (pmm)
2022-06-28accel/stubs: Add tcg stub for probe_access_flagsRichard Henderson1-0/+7
Reviewed-by: Luc Michel <lmichel@kalray.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Move softmmu-uaccess.h functions out of lineRichard Henderson3-37/+57
Rather that static (and not even inline) functions within a header, move the functions to semihosting/uaccess.c. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Improve condition for config.c and console.cRichard Henderson1-1/+1
While CONFIG_SEMIHOSTING is currently only set for softmmu, this will not continue to be true. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Return failure from softmmu-uaccess.h functionsRichard Henderson1-52/+39
We were reporting unconditional success for these functions; pass on any failure from cpu_memory_rw_debug. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28semihosting: Move exec/softmmu-semi.h to semihosting/softmmu-uaccess.hRichard Henderson5-7/+7
We have a subdirectory for semihosting; move this file out of exec. Rename to emphasize the contents are a replacement for the functions in linux-user/bsd-user uaccess.c. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-27Merge tag 'pull-target-arm-20220627' of ↵Richard Henderson24-146/+782
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * sphinx: change default language to 'en' * Diagnose attempts to emulate EL3 in hvf as well as kvm * More SME groundwork patches * virt: Fix calculation of physical address space size for v7VE CPUs (eg cortex-a15) # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmK5hKEZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lggEACtE2balVHrVCeSQkRW+FnS # avm5i54MIGf3cgNhTKwD9ED3hl03Xm49yQkaq0gB6Qa4wQPEcYQLSyzP+UYIILO5 # 3xoWEw0nbtKWBuCzdiolynL1VFht6GV+Ga8lShoBiQsI/eARC6ZELvBv7gbApf4p # DpDq1ty7fXMmMCNM5vgX9fu/LXahSONDXbYMpHpohnaLXCEF9MwqpO5TJf65Bgze # z2+NO4R5u26mCcad7ltoiz3OKkq4Bq+b+QXrm6LmvSCIkvk6MUZuU1NwHSiqUoV/ # nOwhJriOVl8JG0sX0xzNZADYBt0YlcVuDZzyxP8eOiQ54CVK7rJOJSi+aiGkg2Mn # YC4CkFZY9iM5YTA6y6T5mye7kLb/pJ746rLM1ia6Ng3rUwoE9bdvruqTMfPPJuoo # XxMBQrjRjY6BzESG0NbjLgg80dPtqeOipjglYI7GCvh0i2yQVmKLQon5TK9DsScC # 7Gu6IPVWZAb3axGEuqjJ4E+7PyyEW7zYgWNOpZoQW958WHDK0KSPrOwqxAC+QdEi # vagKJGCQPuZiOARpXm6F/nscEDcy7P33z120O9/R6HuticGaM/oBaWy89CR4hbHB # NWx5+0h5M/je8hJFJJVfHldR3nIpvnUtb4KEVoiNuxkrGZoejgTlBdKNL4Nph0U0 # E+CQyMuBBQ88LEbyCjJS5w== # =GILG # -----END PGP SIGNATURE----- # gpg: Signature made Mon 27 Jun 2022 03:51:21 PM +0530 # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] * tag 'pull-target-arm-20220627' of https://git.linaro.org/people/pmaydell/qemu-arm: (25 commits) target/arm: Check V7VE as well as LPAE in arm_pamax target/arm: Extend arm_pamax to more than aarch64 target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h target/arm: Add SVL to TB flags target/arm: Introduce sve_vqm1_for_el_sm target/arm: Add cpu properties for SME target/arm: Unexport aarch64_add_*_properties target/arm: Move arm_cpu_*_finalize to internals.h target/arm: Generalize cpu_arm_{get, set}_default_vec_len target/arm: Generalize cpu_arm_{get,set}_vq target/arm: Create ARMVQMap target/arm: Move error for sve%d property to arm_cpu_sve_finalize target/arm: Implement SMSTART, SMSTOP target/arm: Add the SME ZA storage to CPUARMState target/arm: Add PSTATE.{SM,ZA} to TB flags target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2 target/arm: Add SMCR_ELx target/arm: Add SVCR target/arm: Add ARM_CP_SME target/arm: Add syn_smetrap ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-27target/arm: Check V7VE as well as LPAE in arm_pamaxRichard Henderson1-1/+7
In machvirt_init we create a cpu but do not fully initialize it. Thus the propagation of V7VE to LPAE has not been done, and we compute the wrong value for some v7 cpus, e.g. cortex-a15. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1078 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reported-by: He Zhe <zhe.he@windriver.com> Message-id: 20220619001541.131672-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Extend arm_pamax to more than aarch64Richard Henderson2-17/+17
Move the code from hw/arm/virt.c that is supposed to handle v7 into the one function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reported-by: He Zhe <zhe.he@windriver.com> Message-id: 20220619001541.131672-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.hRichard Henderson2-36/+38
We will need these functions in translate-sme.c. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Add SVL to TB flagsRichard Henderson4-1/+21
We need SVL separate from VL for RDSVL et al, as well as ZA storage loads and stores, which do not require PSTATE.SM. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-20-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Introduce sve_vqm1_for_el_smRichard Henderson2-9/+32
When Streaming SVE mode is enabled, the size is taken from SMCR_ELx instead of ZCR_ELx. The format is shared, but the set of vector lengths is not. Further, Streaming SVE does not require any particular length to be supported. Adjust sve_vqm1_for_el to pass the current value of PSTATE.SM to the new function. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-19-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Add cpu properties for SMERichard Henderson5-7/+180
Mirror the properties for SVE. The main difference is that any arbitrary set of powers of 2 may be supported, and not the stricter constraints that apply to SVE. Include a property to control FEAT_SME_FA64, as failing to restrict the runtime to the proper subset of insns could be a major point for bugs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220620175235.60881-18-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Unexport aarch64_add_*_propertiesRichard Henderson2-5/+2
These functions are not used outside cpu64.c, so make them static. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-17-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Move arm_cpu_*_finalize to internals.hRichard Henderson3-6/+5
Drop the aa32-only inline fallbacks, and just use a couple of ifdefs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-16-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Generalize cpu_arm_{get, set}_default_vec_lenRichard Henderson1-13/+14
Rename from cpu_arm_{get,set}_sve_default_vec_len, and take the pointer to default_vq from opaque. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-15-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Generalize cpu_arm_{get,set}_vqRichard Henderson1-14/+15
Rename from cpu_arm_{get,set}_sve_vq, and take the ARMVQMap as the opaque parameter. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-14-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Create ARMVQMapRichard Henderson4-28/+27
Pull the three sve_vq_* values into a structure. This will be reused for SME. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Move error for sve%d property to arm_cpu_sve_finalizeRichard Henderson1-8/+7
Keep all of the error messages together. This does mean that when setting many sve length properties we'll only generate one error, but we only really need one. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-27target/arm: Implement SMSTART, SMSTOPRichard Henderson7-3/+112
These two instructions are aliases of MSR (immediate). Use the two helpers to properly implement svcr_write. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-01-11 19:04:22 +0000