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2021-12-22failover: Silence warning messages during qtestLaurent Vivier2-2/+9
virtio-net-failover test tries several device combinations that produces some expected warnings. These warning can be confusing, so we disable them during the qtest sequence. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20211220145314.390697-1-lvivier@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> [thuth: Fix memory leak by using error_free()] Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-12-21Merge tag 'pull-loong-20211221-2' of https://gitlab.com/rth7680/qemu into ↵Richard Henderson11-1/+3085
staging Initial commit of tcg/loongarch64 # gpg: Signature made Tue 21 Dec 2021 01:19:00 PM PST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-loong-20211221-2' of https://gitlab.com/rth7680/qemu: (30 commits) configure, meson.build: Mark support for loongarch64 hosts linux-user: Implement CPU-specific signal handler for loongarch64 hosts common-user: Add safe syscall handling for loongarch64 hosts tcg/loongarch64: Register the JIT tcg/loongarch64: Implement tcg_target_init tcg/loongarch64: Implement exit_tb/goto_tb tcg/loongarch64: Implement tcg_target_qemu_prologue tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops tcg/loongarch64: Implement simple load/store ops tcg/loongarch64: Implement tcg_out_call tcg/loongarch64: Implement setcond ops tcg/loongarch64: Implement br/brcond ops tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops tcg/loongarch64: Implement add/sub ops tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops tcg/loongarch64: Implement clz/ctz ops tcg/loongarch64: Implement bswap{16,32,64} ops tcg/loongarch64: Implement deposit/extract ops tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops tcg/loongarch64: Implement sign-/zero-extension ops ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21configure, meson.build: Mark support for loongarch64 hostsWANG Xuerui2-1/+6
Example output of `uname -a` on an initial Gentoo LA64 port, running the upstream submission version of Linux (with some very minor patches not influencing output here): > Linux <hostname> 5.14.0-10342-g37a00851b145 #5 SMP PREEMPT Tue Aug 10 12:56:24 PM CST 2021 loongarch64 GNU/Linux And the same on the vendor-supplied Loongnix 20 system, with an early in-house port of Linux, and using the old-world ABI: > Linux <hostname> 4.19.167-rc5.lnd.1-loongson-3 #1 SMP Sat Apr 17 07:32:32 UTC 2021 loongarch64 loongarch64 loongarch64 GNU/Linux So a name of "loongarch64" matches both, fortunately. Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-31-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21linux-user: Implement CPU-specific signal handler for loongarch64 hostsWANG Xuerui1-0/+87
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-30-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21common-user: Add safe syscall handling for loongarch64 hostsWANG Xuerui1-0/+90
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-29-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Register the JITWANG Xuerui1-0/+44
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-28-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_target_initWANG Xuerui1-0/+27
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-27-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement exit_tb/goto_tbWANG Xuerui1-0/+19
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-26-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_target_qemu_prologueWANG Xuerui1-0/+68
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-25-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st opsWANG Xuerui2-0/+355
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-24-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement simple load/store opsWANG Xuerui2-0/+132
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-23-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_out_callWANG Xuerui1-0/+34
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-22-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement setcond opsWANG Xuerui2-0/+70
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-21-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement br/brcond opsWANG Xuerui2-0/+54
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-20-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu opsWANG Xuerui3-8/+74
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-19-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement add/sub opsWANG Xuerui2-0/+40
The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-18-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement shl/shr/sar/rotl/rotr opsWANG Xuerui3-2/+94
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-17-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement clz/ctz opsWANG Xuerui3-4/+47
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-16-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement bswap{16,32,64} opsWANG Xuerui2-5/+37
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-15-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement deposit/extract opsWANG Xuerui3-4/+26
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-14-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc opsWANG Xuerui3-8/+98
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-13-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement sign-/zero-extension opsWANG Xuerui3-12/+95
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-12-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement goto_ptrWANG Xuerui2-0/+32
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-11-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_out_mov and tcg_out_moviWANG Xuerui1-0/+137
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-10-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement the memory barrier opWANG Xuerui1-0/+32
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-9-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement necessary relocation operationsWANG Xuerui1-0/+66
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-8-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Define the operand constraintsWANG Xuerui2-0/+80
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-7-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add register names, allocation order and input/output setsWANG Xuerui1-0/+118
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-6-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add generated instruction opcodes and encoding helpersWANG Xuerui1-0/+979
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-5-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add the tcg-target.h fileWANG Xuerui1-0/+180
Support for all optional TCG ops are initially marked disabled; the bits are to be set in individual commits later. Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-4-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainerWANG Xuerui1-0/+5
I ported the initial code, so I should maintain it of course. Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-3-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21elf: Add machine type value for LoongArchWANG Xuerui1-0/+2
This is already officially allocated as recorded in GNU binutils repo [1], and the description is updated in [2]. Add to enable further work. [1]: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=4cf2ad720078a9f490dd5b5bc8893a926479196e [2]: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=01a8c731aacbdbed0eb5682d13cc074dc7e25fb3 Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-2-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21Merge tag 'dbus-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Richard Henderson79-401/+6249
into staging Add D-Bus display backend # gpg: Signature made Mon 20 Dec 2021 10:57:18 PM PST # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [unknown] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'dbus-pull-request' of https://gitlab.com/marcandre.lureau/qemu: (36 commits) MAINTAINERS: update D-Bus section ui/dbus: register D-Bus VC handler ui/dbus: add chardev backend & interface option: add g_auto for QemuOpts chardev: make socket derivable chardev: teach socket to accept no addresses ui/dbus: add clipboard interface audio: add "dbus" audio backend tests: start dbus-display-test tests/qtests: add qtest_qmp_add_client() ui/dbus: add p2p=on/off option ui: add a D-Bus display backend build-sys: set glib dependency version docs: add dbus-display documentation docs: move D-Bus VMState documentation to source XML backends: move dbus-vmstate1.xml to backends/ docs/sphinx: add sphinx modules to include D-Bus documentation scripts: teach modinfo to skip non-C sources console: save current scanout details ui: move qemu_spice_fill_device_address to ui/util.c ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21MAINTAINERS: update D-Bus sectionMarc-André Lureau1-3/+7
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21ui/dbus: register D-Bus VC handlerMarc-André Lureau1-0/+53
Export the default consoles over the D-Bus chardev. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21ui/dbus: add chardev backend & interfaceMarc-André Lureau8-0/+476
Add a new chardev backend which allows D-Bus client to handle the chardev stream & events. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21option: add g_auto for QemuOptsMarc-André Lureau1-0/+2
Used in the next commit. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21chardev: make socket derivableMarc-André Lureau2-57/+85
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-12-21chardev: teach socket to accept no addressesMarc-André Lureau1-5/+9
The following patches are going to use CharSocket as a base class for sockets that are created with a given fd (without a given address). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21ui/dbus: add clipboard interfaceMarc-André Lureau6-0/+579
Expose the clipboard API over D-Bus. See the interface documentation for further details. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21audio: add "dbus" audio backendMarc-André Lureau12-2/+931
Add a new -audio backend that accepts D-Bus clients/listeners to handle playback & recording, to be exported via the -display dbus. Example usage: -audiodev dbus,in.mixing-engine=off,out.mixing-engine=off,id=dbus -display dbus,audiodev=dbus Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21tests: start dbus-display-testMarc-André Lureau2-0/+265
Cover basic display interface usage. More cases to be added to cover disconnections, multiple connections, corner cases. At this point, they would be better written in Rust or Python though. The proxy also covers reading the properties, since they are automatically loaded at creation. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21tests/qtests: add qtest_qmp_add_client()Marc-André Lureau2-0/+29
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21ui/dbus: add p2p=on/off optionMarc-André Lureau13-12/+203
Add an option to use direct connections instead of via the bus. Clients are accepted with QMP add_client. This allows to provide the D-Bus display without a bus. It also simplifies the testing setup (some CI have issues to setup a D-Bus bus in a container). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21ui: add a D-Bus display backendMarc-André Lureau14-2/+1862
The "dbus" display backend exports the QEMU consoles and other UI-related interfaces over D-Bus. By default, the connection is established on the session bus, but you can specify a different bus with the "addr" option. The backend takes the "org.qemu" service name, while still allowing further instances to queue on the same name (so you can lookup all the available instances too). It accepts any number of clients at this point, although this is expected to evolve with options to restrict clients, or only accept p2p via fd passing. The interface is intentionally very close to the internal QEMU API, and can be introspected or interacted with busctl/dfeet etc: $ ./qemu-system-x86_64 -name MyVM -display dbus $ busctl --user introspect org.qemu /org/qemu/Display1/Console_0 org.qemu.Display1.Console interface - - - .RegisterListener method h - - .SetUIInfo method qqiiuu - - .DeviceAddress property s "pci/0000/01.0" emits-change .Head property u 0 emits-change .Height property u 480 emits-change .Label property s "VGA" emits-change .Type property s "Graphic" emits-change .Width property u 640 emits-change [...] See the interfaces XML source file and Sphinx docs for the generated API documentations. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21build-sys: set glib dependency versionMarc-André Lureau2-2/+5
Further meson configuration tests are to be added based on the glib version. Also correct the version reporting in the config log. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-12-21docs: add dbus-display documentationMarc-André Lureau4-0/+34
Wire up the dbus-display documentation. The interface and feature is implemented next. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21docs: move D-Bus VMState documentation to source XMLMarc-André Lureau2-45/+49
Use the source XML document as single reference, importing its documentation via the dbus-doc directive. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21backends: move dbus-vmstate1.xml to backends/Marc-André Lureau2-1/+1
Although not used by the backend itself, use a common location for documentation and sharing purposes. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-21docs/sphinx: add sphinx modules to include D-Bus documentationMarc-André Lureau5-0/+978
Add a new dbus-doc directive to import D-Bus interfaces documentation from the introspection XML. The comments annotations follow the gtkdoc/kerneldoc style, and should be formatted with reST. Note: I realize after the fact that I was implementing those modules with sphinx 4, and that we have much lower requirements. Instead of lowering the features and code (removing type annotations etc), let's have a warning in the documentation when the D-Bus modules can't be used, and point to the source XML file in that case. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
generated by cgit v1.1 at 2025-01-27 02:06:06 +0000