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2014-11-10target-xtensa: add missing window check for entryMax Filippov2-0/+12
Entry opcode needs to check if moving to new register frame would cause register window overflow. Entry used in function prologue never overflows because preceding windowed call* opcode writes return address to the target register window frame, causing overflow exceptions at the point of call. But when a sequence of entry opcodes is used for register window spilling there may not be a call or other opcode that would cause window check between entries and they would not raise overflow exception themselves resulting in data corruption. Cc: qemu-stable@nongnu.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-11-10Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141107' into stagingPeter Maydell6-14/+30
* remotes/lalrae/tags/mips-20141107: target-mips: fix multiple TCG registers covering same data mips: Ensure PC update with MTC0 single-stepping target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits mips: Add macros for CP0.Config3 and CP0.Config4 bits mips: Respect CP0.Status.CU1 for microMIPS FP branches mips: Remove CONFIG_VT82C686 from non-Fulong configs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-10Merge remote-tracking branch 'remotes/amit/tags/vser-2.2.0-queue-2' into stagingPeter Maydell1-1/+1
Fixes a crash when a virtio-serial port is added without a name to it. # gpg: Signature made Fri 07 Nov 2014 04:58:05 GMT using RSA key ID 854083B6 # gpg: Good signature from "Amit Shah <amit@amitshah.net>" # gpg: aka "Amit Shah <amit@kernel.org>" # gpg: aka "Amit Shah <amitshah@gmx.net>" * remotes/amit/tags/vser-2.2.0-queue-2: virtio-serial: avoid crash when port has no name Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-07target-mips: fix multiple TCG registers covering same dataYongbok Kim1-5/+3
Avoid to allocate different TCG registers for the FPU registers that are mapped on the MSA vectore registers. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07mips: Ensure PC update with MTC0 single-steppingMaciej W. Rozycki1-1/+1
Correct the way PC is updated when single-stepping instructions, by keeping the old PC only for the BS_EXCP (exception condition) state. Some MTC0 (and possibly other) instructions switch to the BS_STOP state to terminate the current translation block, so that the state transition of the simulated CPU resulting from the CP0 operation takes effect with the following instruction. This happens with `mtc0 <reg>,c0_config' for example, typically used to set KSEG0 cacheability. While single-stepping this has a side-effect of not advancing the PC past the instruction just executed; subsequent single-step traps will stop at the same instruction repeatedly. Example: (gdb) stepi 0x80004d24 in _start () 5: x/i $pc => 0x80004d24 <_start+364>: mfc0 t1,c0_config (gdb) 0x80004d28 in _start () 5: x/i $pc => 0x80004d28 <_start+368>: li at,-8 (gdb) 0x80004d2c in _start () 5: x/i $pc => 0x80004d2c <_start+372>: and t1,t1,at (gdb) 0x80004d30 in _start () 5: x/i $pc => 0x80004d30 <_start+376>: ori t1,t1,0x3 (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) -- oops! Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07target-mips: fix for missing delay slot in BC1EQZ and BC1NEZLeon Alrae1-0/+1
New R6 COP1 conditional branches currently don't have delay slot. Fixing this by setting MIPS_HFLAG_BDS32 flag which is required for branches having 4-byte delay slot. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
2014-11-07mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bitsMaciej W. Rozycki1-3/+5
Set the CP0.Config3.DSP2P bit for the 74kf processor and both that bit and the CP0.Config3.DSP bit for the artificial mips32r5-generic and mips64dspr2 processors. They have the DSPr2 ASE enabled in `insn_flags' and CPUs that implement that ASE need to have both CP0.Config3.DSP and CP0.Config3.DSP2P set or software won't detect its presence. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> [leon.alrae@imgtec.com: remove DSP flags from mips32r5-generic] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07mips: Add macros for CP0.Config3 and CP0.Config4 bitsMaciej W. Rozycki1-0/+13
Define macros for CP0.Config3 and CP0.Config4 bits. These used to be exhaustive as at MIPS32r3, but more bits may have been added since. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07mips: Respect CP0.Status.CU1 for microMIPS FP branchesMaciej W. Rozycki1-2/+7
Make microMIPS FP branches respect CP0.Status.CU1 and trap with a Coprocessor Unusable exception if COP1 has been disabled; also trap if no FPU is present at all. Standard MIPS FP instruction encodings have a more regular structure and branches are covered with a single umbrella along other instructions. This is not the case with the microMIPS encoding, this case has to be taken care of explicitly here. Code to do so has been copied from the standard MIPS code handler for OPC_CP1, in `decode_opc'. Problems arising from this bug will generally only show up on user context switches in operating systems making use of lazy FP context switches, such as Linux. It will also more readily trigger if software FPU emulation is used, either implicitly on a non-float CPU, or forced on a hard-float CPU such as with the "nofpu" Linux kernel command line argument. The problem may have been easily missed because we have no hard-float microMIPS CPU configuration present; in fact we have no microMIPS CPU configuration of any kind present. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07mips: Remove CONFIG_VT82C686 from non-Fulong configsMaciej W. Rozycki3-3/+0
Fix the regression introduced with commit 47934d0aadc075b05ce2d9e8a44fa6a46edd1afa [hw: move ISA bridges and devices to hw/isa/, configure with default-configs/], by removing CONFIG_VT82C686 from configurations that previously did not enable it. That southbridge is only available on Fulong platforms (CONFIG_FULONG) that are exclusively little-endian, 64-bit MIPS. Previously vt82c686.o was pulled explicitly with obj-$(CONFIG_FULONG). Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07virtio-serial: avoid crash when port has no nameMarc-André Lureau1-1/+1
It seems "name" is not mandatory, and the following command line (based on one generated by current libvirt) will crash qemu at start: qemu-system-x86_64 \ -device virtio-serial-pci \ -device virtserialport,name=foo \ -device virtconsole Program received signal SIGSEGV, Segmentation fault. __strcmp_ssse3 () at ../sysdeps/x86_64/strcmp.S:210 210 movlpd (%rsi), %xmm2 Missing separate debuginfos, use: debuginfo-install python-libs-2.7.5-13.fc20.x86_64 (gdb) bt #0 __strcmp_ssse3 () at ../sysdeps/x86_64/strcmp.S:210 #1 0x000055555566bdc6 in find_port_by_name (name=0x0) at /home/elmarco/src/qemu/hw/char/virtio-serial-bus.c:67 Signed-off-by: Marc-André Lureau <marcandre.lureau@gmail.com> Reviewed-by: Amos Kong <akong@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com>
2014-11-05Update version for v2.2.0-rc0 releasev2.2.0-rc0Peter Maydell1-1/+1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-05Merge remote-tracking branch 'remotes/agraf/tags/signed-s390-for-upstream' ↵Peter Maydell3-5/+15
into staging Patch queue for s390 - 2014-11-05 Two simple bug fixes to enable slightly newer guest kernels and preliminary -M s390-ccw support for TCG (virtio doesn't work yet!) # gpg: Signature made Wed 05 Nov 2014 11:01:55 GMT using RSA key ID 03FEDC60 # gpg: Good signature from "Alexander Graf <agraf@suse.de>" # gpg: aka "Alexander Graf <alex@csgraf.de>" * remotes/agraf/tags/signed-s390-for-upstream: s390x: Implement SAM{24,31,64} s390x: Fix sclp console input Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-05vhost-user-test: Fix 'make check' broken on glib < 2.26Gonglei1-1/+22
After commit 89b516d8, some logics is turbid and breaks 'make check' as below errors: tests/vhost-user-test.c: In function '_cond_wait_until': tests/vhost-user-test.c:154: error: 'G_TIME_SPAN_SECOND' undeclared (first use in this function) tests/vhost-user-test.c:154: error: (Each undeclared identifier is reported only once tests/vhost-user-test.c:154: error: for each function it appears in.) tests/vhost-user-test.c: In function 'read_guest_mem': tests/vhost-user-test.c:192: warning: implicit declaration of function 'g_get_monotonic_time' tests/vhost-user-test.c:192: warning: nested extern declaration of 'g_get_monotonic_time' tests/vhost-user-test.c:192: error: 'G_TIME_SPAN_SECOND' undeclared (first use in this function) make: *** [tests/vhost-user-test.o] Error 1 First, vhost-usr-test.c rely on glib-compat.h because of using G_TIME_SPAN_SECOND [glib < 2.26] and g_get_monotonic_time(), but vhost-usr-test.c defined QEMU_GLIB_COMPAT_H, which make glib-compat.h will not be included. Second, if we remove QEMU_GLIB_COMPAT_H definability in vhost-usr-test.c, then we will get below warnings: tests/vhost-user-test.c: In function 'read_guest_mem': tests/vhost-user-test.c:190: warning: passing argument 1 of 'g_mutex_lock' from incompatible pointer type tests/vhost-user-test.c:234: warning: passing argument 1 of 'g_mutex_unlock' from incompatible pointer type That's because glib-compat.h redefine the g_mutex_lock/unlock function. Those functions' arguments is CompatGMutex/CompatGCond, but vhost-user-test.c is using GMutex/GCond, which cause the type is not consistent. We can rerealize those functions of vhost-user-test.c, which need a lots of patches. Let's simply address it, and leave this file alone. Signed-off-by: Gonglei <arei.gonglei@huawei.com> Message-id: 1415149259-6188-1-git-send-email-arei.gonglei@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-05s390x: Implement SAM{24,31,64}Alexander Graf2-3/+15
The SAM instructions simply change 2 bits in PSW.MASK to advertise the current memory mode. While we can't fully guarantee that 31 bit mode (or even remotely 24 bit mode) actually work correctly, we don't check whether lpswe modifies these bits, so we shouldn't keep the guest from executing SAM instructions either. This patch implements all SAM instrutions with their actual PSW changing semantics, making more recent Linux kernels boot properly which do issue a SAM31 call during early boot. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-11-05s390x: Fix sclp console inputAlexander Graf1-2/+0
When injecting an sclp console interrupt into the guest, we increase the PC by 4 for some reason. I have no idea why I put that code there, but it's clearly wrong. Remove the increment. This patch fixes sclp serial input for the ccw machine. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2014-11-04Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' ↵Peter Maydell30-233/+1216
into staging Patch queue for ppc - 2014-11-04 Fun things for 2.2: - e500 virt machine: power off support (needs 3.19 guests) - e500 virt machine: -device eTSEC support - new framework to allow dynamic spawning of sysbus devices - spapr: enable migration of nvram - new 440x5wDFPU cpu type - Altivec and other random fixes # gpg: Signature made Tue 04 Nov 2014 22:26:39 GMT using RSA key ID 03FEDC60 # gpg: Good signature from "Alexander Graf <agraf@suse.de>" # gpg: aka "Alexander Graf <alex@csgraf.de>" * remotes/agraf/tags/signed-ppc-for-upstream: (34 commits) spapr: Allow dynamic creation of PHB target-ppc: Fix Altivec Round Opcodes target-ppc: Fix vcmpbfp. Unordered Case target-ppc: Fix Altivec Shifts target-ppc: simplify AES emulation e500: Add support for eTSEC in device tree PPC: e500: Support dynamically spawned sysbus devices sysbus: Add new platform bus helper device sysbus: Expose MMIO enumeration helper sysbus: Expose IRQ enumeration helpers sysbus: Make devices spawnable via -device sysbus: Add dynamic sysbus device search hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*) ppc: do not look at the MMU index to detect PR/HV mode target-ppc: kvm: Fix memory overflow issue about strncat() spapr_nvram: Enable migration PPC: E500: Hook up power off GPIO to GPIO controller PPC: E500: Instantiate MPC8XXX gpio controller on virt machine PPC: Add MPC8XXX gpio controller target-ppc: Fix an invalid free in opcode table handling code. ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-04spapr: Allow dynamic creation of PHBAlexander Graf1-0/+21
Now that we finally check for presence of dangling sysbus devices, make check started complaining that the sPAPR PHB is one such device. However, it really isn't. The spapr PHB is not really a traditional sysbus device, but much more a special spapr pv device which is already able to get created dynamically. Move spapr to its own dynamic sysbus check handling and allow PHB devices to get allocated dynamically. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: Fix Altivec Round OpcodesTom Musta1-6/+6
Correct the opcodes for the vrfim, vrfin and vrfiz instructions. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: Fix vcmpbfp. Unordered CaseTom Musta1-1/+1
Fix the implementation of Vector Compare Bounds Single Precision. Specifically, fix the case where the operands are unordered -- since the result is non-zero, the CR[6] field should be set to zero. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: Fix Altivec ShiftsTom Musta1-11/+2
Fix the implementation of the Altivec shift left and shift right instructions (vsl, vsr) which erroneously inverts shift direction on big endian hosts. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: simplify AES emulationAurelien Jarno1-2/+2
This patch simplifies the AES code, by directly accessing the newly added S-Box, InvS-Box tables instead of recreating them by using the AES_Te and AES_Td tables. Cc: Alexander Graf <agraf@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04e500: Add support for eTSEC in device treeAlexander Graf1-0/+43
This patch adds support to expose eTSEC devices in the dynamically created guest facing device tree. This allows us to expose eTSEC devices into guests without changes in the machine file. Because we can now tell the guest about eTSEC devices this patch allows the user to specify eTSEC devices via -device at all. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04PPC: e500: Support dynamically spawned sysbus devicesAlexander Graf3-0/+111
For e500 our approach to supporting dynamically spawned sysbus devices is to create a simple bus from the guest's point of view within which we map those devices dynamically. We allocate memory regions always within the "platform" hole in address space and map IRQs to predetermined IRQ lines that are reserved for platform device usage. This maps really nicely into device tree logic, so we can just tell the guest about our virtual simple bus in device tree as well. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04sysbus: Add new platform bus helper deviceAlexander Graf3-0/+311
We need to support spawning of sysbus devices dynamically via the command line. The easiest way to represent these dynamically spawned devices in the guest's memory and IRQ layout is by preallocating some space for dynamic sysbus devices. This is what the "platform bus" device does. It is a sysbus device that exports a configurably sized MMIO region and a configurable number of IRQ lines. When this device encounters sysbus devices that have been dynamically created and not manually wired up, it dynamically connects them to its own pool of resources. The machine model can then loop through all of these devices and create a guest configuration (device tree) to make them visible to the guest. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04sysbus: Expose MMIO enumeration helperAlexander Graf2-0/+7
Sysbus devices have a range of MMIO regions they expose. The exact number of regions is device specific and internal information to the device model. Expose whether a region exists via a public interface. That way our platform bus enumeration code can dynamically determine how many regions exist. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04sysbus: Expose IRQ enumeration helpersAlexander Graf4-0/+36
Sysbus devices can get their IRQ lines connected to other devices. It is possible to figure out which IRQ line a connection is on and whether a sysbus device even provides an IRQ connector at a specific offset. This patch exposes helpers to make this information publicly accessible. We will need it for the platform bus dynamic sysbus enumeration. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04sysbus: Make devices spawnable via -deviceAlexander Graf4-9/+41
Now that we can properly map sysbus devices that haven't been connected to something forcefully by C code, we can allow the -device command line option to spawn them. For machines that don't implement dynamic sysbus assignment in their board files we add a new bool "has_dynamic_sysbus" to the machine class. When that property is false (default), we bail out when we see dynamically spawned sysbus devices, like we did before. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04sysbus: Add dynamic sysbus device searchAlexander Graf2-0/+50
Sysbus devices can be spawned by C code or dynamically via the command line. In the latter case, we need to be able to find the dynamically created devices to do things with them. This patch adds a search helper that makes it easy to look for dynamically spawned sysbus devices. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)Peter Maydell1-11/+17
The g_hash_table_iter_* functions for iterating through a hash table are not present in glib 2.12, which is our current minimum requirement. Rewrite the code to use g_hash_table_foreach() instead. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04ppc: do not look at the MMU index to detect PR/HV modePaolo Bonzini1-88/+77
The MMU index is an internal detail that should not be needed by the translator (except to generate loads and stores). Look at the MSR directly. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: kvm: Fix memory overflow issue about strncat()Chen Gang1-4/+4
strncat() will append additional '\0' to destination buffer, so need additional 1 byte for it, or may cause memory overflow, just like other area within QEMU have done. And can use g_strdup_printf() instead of strncat(), which may be more easier understanding. Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04spapr_nvram: Enable migrationAlexey Kardashevskiy1-17/+64
The only case when sPAPR NVRAM migrates now is if is backed by a file and copy-storage migration is performed. In other cases NVRAM does not migrate regardless whether it is backed by a file or not. This enables shadow copy of NVRAM in RAM which is read from a file (if used) and used for reads. Writes to NVRAM are mirrored to the file. This defines a VMSTATE descriptor for NVRAM device so the memory copy of NVRAM can migrate and be flushed to a backing file on the destination if one is specified. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04PPC: E500: Hook up power off GPIO to GPIO controllerAlexander Graf1-0/+24
Now that we have a working GPIO controller on the virt machine, we can use one pin to notify QEMU that the guests wants to power off the system. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04PPC: E500: Instantiate MPC8XXX gpio controller on virt machineAlexander Graf3-0/+34
With the e500 virt machine, we don't have to adhere to the exact hardware layout of an mpc8544ds board. So there we can just add a qoriq compatible GPIO controller into the system that we can add a power off hook to. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04PPC: Add MPC8XXX gpio controllerAlexander Graf2-0/+218
On e500 systems most SoCs implement a common GPIO controller that Linux calls the "mpc8xxx" gpio controller. This patch adds an emulation model for this device. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: Fix an invalid free in opcode table handling code.Bharata B Rao1-3/+16
Opcode table has direct, indirect and double indirect handlers, but ppc_cpu_unrealizefn() frees direct handlers which are never allocated and never frees double indirect handlers. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: Use macros in opcodes table handling codeBharata B Rao2-11/+16
Define and use macros instead of direct numbers wherever possible in ppc opcodes table handling code. This doesn't change any code functionality. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04hw/pci/ppc4xx_pci.c: Remove unused pci4xx_cfgaddr_read/write/opsPeter Maydell1-24/+0
The MemoryRegionOps struct pci4xx_cfgaddr_ops and the read and write functions it references are all unused; remove them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc : Add new processor type 440x5wDFPUPierre Mallard2-0/+41
This patch add a new processor type 440x5wDFPU for Virtex 5 PPC440 with an external APU FPU in double precision mode Signed-off-by: Pierre Mallard <mallard.pierre@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64Pierre Mallard5-22/+16
This patch remove limitation for fc[tf]id[*] on 32 bits targets and add a new insn flag for signed integer 64 conversion PPC2_FP_CVT_S64 Signed-off-by: Pierre Mallard <mallard.pierre@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04PPC: openpic_kvm: Only map first occurence in address spaceAlexander Graf1-0/+19
The in-kernel OpenPIC emulation only supports a single map. However, we map the OpenPIC at 2 locations: The CPU visible one and the PCI visible one. For KVM acceleration, we only care about the first one. To make sure that we only map that first mapping and not the PCI map that happens dynamically later during bootup, ignore maps that happen when we are already considering ourselves mapped. Credits due are to Bogdan and Mihai for debugging this. Reported-by: Bogdan Purcareata <bogdan.purcareata@freescale.com> Reported-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04spapr: Cleanup machine naming conventions, and prepare for 2.2 releaseDavid Gibson1-4/+18
As of qemu-2.1, spapr/pseries, has a set of versioned machine classes to represent the machine type as it appeared to the guest in different qemu versions. This allows for safe migration of guests between current and future qemu versions. However, these are organized a bit differently from those for PC: on PC, the default plain "pc" machine type is just an alias for the most recent versioned machine type. In sPAPR, it names the base machine class from which the versioned types are derived. The PC approach is preferable; it makes it clearer which explicit version is the current one. Additionally updating the "current" machine as the base class makes it even more likely than otherwise to incorrectly alter the versioned machines' behaviour when updating the current machine. Therefore this patch changes sPAPR to the PC approach - the base class becomes abstract, and plain "pseries" becomes an alias for the most recent versioned machine class. Since qemu-2.1 is now released, we also create a new pseries-2.2 machine type, to incorporate changes during this development cycle (for now it is identical to pseries-2.1). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: virtex-ml507 machine type should depend on CONFIG_XILINXDavid Gibson1-1/+1
The virtex-ml507 is a Xilinx CPU based system, and requires several sub devices which are only included with CONFIG_XILINX. Therefore, it should only be compiled if CONFIG_XILINX is set. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: Implement IVOR[59] By Default for Book ETom Musta1-1/+1
Adjust the IVOR mask for generic Book E implementation to support bit 59. This is consistent with the Power ISA. Signed-off-by: Tom Musta <tommusta@gmail.com> Reported-by: Pierre Mallard <mallard.pierre@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04target-ppc: Fix kvmppc_set_compat to use negotiated cpu-versionAlexey Kardashevskiy1-1/+1
By mistake, QEMU uses the maximum compatibility level from the command line instead of the value negotiated in client-architecture-support call. This replaces @max_compat with @cpu_version. This only affects guests which do not support the host CPU. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04ppc: compute mask from BI using right shiftPaolo Bonzini1-3/+3
This will match the code we use in fpu_helper.c when we flip CRF_* bit-endianness. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Tom Musta <tommusta@gmail.com> Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04ppc: rename gen_set_cr6_from_fpscrPaolo Bonzini1-7/+7
It sets CR1, not CR6 (and the spec agrees). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Tom Musta <tommusta@gmail.com> Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04ppc: fix result of DLMZB when no zero bytes are foundPaolo Bonzini1-0/+1
It must return 8 and place 8 in XER, but the current code uses i directly which is 9 at this point of the code. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-04ppc: use CRF_* in int_helper.cPaolo Bonzini1-6/+6
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Tom Musta <tommusta@gmail.com> Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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