aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2020-06-26softfloat: merge floatx80_mod and floatx80_remJoseph Myers4-95/+40
2020-06-26target/i386: reimplement f2xm1 using floatx80 operationsJoseph Myers2-3/+1522
2020-06-26xen: Actually fix build without passthroughAnthony PERARD1-1/+1
2020-06-26Makefile: Install qemu-[qmp/ga]-ref.* into the directory "interop"Liao Pingfang2-6/+8
2020-06-26hw/scsi/megasas: Fix possible out-of-bounds array access in tracepointsThomas Huth1-13/+23
2020-06-26docs/nvdimm: add description of alignment requirement of device daxJingqi Liu2-1/+11
2020-06-26target/arm: Enable MTERichard Henderson1-0/+5
2020-06-26target/arm: Add allocation tag storage for system modeRichard Henderson1-0/+131
2020-06-26target/arm: Create tagged ram when MTE is enabledRichard Henderson3-6/+107
2020-06-26target/arm: Cache the Tagged bit for a page in MemTxAttrsRichard Henderson2-3/+50
2020-06-26target/arm: Always pass cacheattr to get_phys_addrRichard Henderson4-36/+42
2020-06-26target/arm: Set PSTATE.TCO on exception entryRichard Henderson1-0/+3
2020-06-26target/arm: Implement data cache set allocation tagsRichard Henderson3-1/+58
2020-06-26target/arm: Complete TBI clearing for user-only for SVERichard Henderson3-2/+25
2020-06-26target/arm: Add mte helpers for sve scatter/gather memory opsRichard Henderson3-253/+877
2020-06-26target/arm: Handle TBI for sve scalar + int memory opsRichard Henderson3-3/+6
2020-06-26target/arm: Add mte helpers for sve scalar + int ff/nf loadsRichard Henderson3-100/+357
2020-06-26target/arm: Add mte helpers for sve scalar + int storesRichard Henderson3-78/+226
2020-06-26target/arm: Add mte helpers for sve scalar + int loadsRichard Henderson5-98/+385
2020-06-26target/arm: Add arm_tlb_bti_gpRichard Henderson3-2/+15
2020-06-26target/arm: Tidy trans_LD1R_zpriRichard Henderson1-5/+7
2020-06-26target/arm: Use mte_check1 for sve LD1RRichard Henderson1-2/+4
2020-06-26target/arm: Use mte_checkN for sve unpredicated storesRichard Henderson1-28/+33
2020-06-26target/arm: Use mte_checkN for sve unpredicated loadsRichard Henderson1-28/+33
2020-06-26target/arm: Add helper_mte_check_zvaRichard Henderson3-1/+122
2020-06-26target/arm: Implement helper_mte_checkNRichard Henderson2-1/+166
2020-06-26target/arm: Implement helper_mte_check1Richard Henderson2-1/+179
2020-06-26target/arm: Add gen_mte_checkNRichard Henderson4-16/+66
2020-06-26target/arm: Add gen_mte_check1Richard Henderson5-24/+95
2020-06-26target/arm: Move regime_tcr to internals.hRichard Henderson2-9/+9
2020-06-26target/arm: Move regime_el to internals.hRichard Henderson2-36/+36
2020-06-26target/arm: Implement the access tag cache flushesRichard Henderson1-0/+65
2020-06-26target/arm: Implement the LDGM, STGM, STZGM instructionsRichard Henderson4-8/+153
2020-06-26target/arm: Simplify DC_ZVARichard Henderson1-70/+26
2020-06-26target/arm: Restrict the values of DCZID.BS under TCGRichard Henderson1-0/+24
2020-06-26target/arm: Implement the STGP instructionRichard Henderson1-3/+26
2020-06-26target/arm: Implement LDG, STG, ST2G instructionsRichard Henderson5-5/+386
2020-06-26target/arm: Define arm_cpu_do_unaligned_access for user-onlyRichard Henderson2-3/+3
2020-06-26target/arm: Implement the SUBP instructionRichard Henderson1-2/+22
2020-06-26target/arm: Implement the GMI instructionRichard Henderson1-0/+15
2020-06-26target/arm: Implement the ADDG, SUBG instructionsRichard Henderson4-0/+71
2020-06-26target/arm: Revise decoding for disas_add_sub_immRichard Henderson1-15/+8
2020-06-26target/arm: Implement the IRG instructionRichard Henderson5-0/+98
2020-06-26target/arm: Add MTE bits to tb_flagsRichard Henderson5-4/+75
2020-06-26target/arm: Add MTE system registersRichard Henderson4-0/+128
2020-06-26target/arm: Add DISAS_UPDATE_NOCHAINRichard Henderson3-0/+9
2020-06-26target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXITRichard Henderson4-18/+20
2020-06-26target/arm: Add support for MTE to HCR_EL2 and SCR_EL3Richard Henderson1-3/+11
2020-06-26target/arm: Add support for MTE to SCTLR_ELxRichard Henderson1-6/+17
2020-06-26target/arm: Improve masking of SCR RES0 bitsRichard Henderson1-7/+8