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2024-05-15target/hppa: Drop tlb_entry return from hppa_get_physical_addressRichard Henderson4-20/+7
The return-by-reference is never used. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Implement PSW_XRichard Henderson1-17/+25
Use PAGE_WRITE_INV to temporarily enable write permission on for a given page, driven by PSW_X being set. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Implement PSW_BRichard Henderson1-19/+6
PSW_B causes B,GATE to trap as an illegal instruction, removing our previous sequential execution test that was merely an approximation. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Manage PSW_X and PSW_B in translatorRichard Henderson2-3/+57
PSW_X is cleared after every instruction, and only set by RFI. PSW_B is cleared after every non-branch, or branch not taken, and only set by taken branches. We can clear both bits with a single store, at most once per TB. Taken branches set PSW_B, at most once per TB. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Split PSW X and B into their own fieldRichard Henderson2-4/+5
Generally, both of these bits are cleared at the end of each instruction. By separating these, we will be able to clear both with a single insn, instead of 2 or 3. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Improve hppa_cpu_dump_stateRichard Henderson1-6/+54
Print both raw IAQ_Front and IAQ_Back as well as the GVAs. Print control registers in system mode. Print floating point registers if CPU_DUMP_FPU. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Do not mask in copy_iaoq_entryRichard Henderson1-6/+1
As with loads and stores, code offsets are kept intact until the full gva is formed. In qemu, this is in cpu_get_tb_cpu_state. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Store full iaoq_f and page offset of iaoq_b in TBRichard Henderson3-55/+48
In preparation for CF_PCREL. store the iaoq_f in 3 parts: high bits in cs_base, middle bits in pc, and low bits in priv. For iaoq_b, set a bit for either of space or page differing, else the page offset. Install iaq entries before goto_tb. The change to not record the full direct branch difference in TB means that we have to store at least iaoq_b before goto_tb. But since a later change to enable CF_PCREL will require both iaoq_f and iaoq_b to be updated before goto_tb, go ahead and update both fields now. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15linux-user/hppa: Force all code addresses to PRIV_USERRichard Henderson8-17/+31
The kernel does this along the return path to user mode. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use delay_excp for conditional trap on overflowRichard Henderson4-17/+14
Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use delay_excp for conditional trapsRichard Henderson4-19/+32
Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Introduce DisasDelayExceptionRichard Henderson1-5/+55
Allow an exception to be emitted at the end of the TranslationBlock, leaving only the conditional branch inline. Use it for simple exception instructions like break, which happen to be nullified. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Remove cond_freeRichard Henderson1-75/+27
Now that we do not need to free tcg temporaries, the only thing cond_free does is reset the condition to never. Instead, simply write a new condition over the old, which may be simply cond_make_f() for the never condition. The do_*_cond functions do the right thing with c or cf == 0, so there's no need for a special case anymore. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use TCG_COND_TST* in trans_ftestRichard Henderson1-16/+6
Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use registerfields.h for FPSRRichard Henderson3-23/+46
Define all of the context dependent field definitions. Use FIELD_EX32 and FIELD_DP32 with named fields instead of extract32 and deposit32 with raw constants. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use TCG_COND_TST* in trans_bb_immRichard Henderson1-9/+3
Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use TCG_COND_TST* in do_unit_addsubRichard Henderson1-2/+2
Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use TCG_COND_TST* in do_unit_zero_condRichard Henderson1-2/+1
Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use TCG_COND_TST* in do_log_condRichard Henderson1-51/+27
We can directly test bits of a 32-bit comparison without zero or sign-extending an intermediate result. We can directly test bit 0 for odd/even. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use TCG_COND_TST* in do_condRichard Henderson1-36/+28
We can directly test bits of a 32-bit comparison without zero or sign-extending an intermediate result. We can directly test bit 0 for odd/even. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Rename cond_make_* helpersRichard Henderson1-26/+26
Use 'v' for a variable that needs copying, 't' for a temp that doesn't need copying, and 'i' for an immediate, and use this naming for both arguments of the comparison. So: cond_make_tmp -> cond_make_tt cond_make_0_tmp -> cond_make_ti cond_make_0 -> cond_make_vi cond_make -> cond_make_vv Pass 0 explictly, rather than implicitly in the function name. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use displacements in DisasIAQERichard Henderson1-20/+23
This is a first step in enabling CF_PCREL, but for now we regenerate the absolute address before writeback. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Introduce and use DisasIAQE for branch managementRichard Henderson1-180/+198
Wrap offset and space together in one structure, ensuring that they're copied together as required. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Always make a copy in do_ibranch_privRichard Henderson1-4/+3
This simplifies callers, which might otherwise have to make another copy. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use umax in do_ibranch_privRichard Henderson1-1/+1
Using umax is clearer than the same operation using movcond. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Add space argument to do_ibranchRichard Henderson1-50/+26
This allows unification of BE, BLR, BV, BVE with a common helper. Since we can now track space with IAQ_Next, we can now let the TranslationBlock continue across the delay slot with BE, BVE. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Add space arguments to install_iaq_entriesRichard Henderson1-31/+27
Move space assighments to a central location. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Add IASQ entries to DisasContextRichard Henderson1-9/+30
Add variable to track space changes to IAQ. So far, no such changes are introduced, but the new checks vs ctx->iasq_b may eliminate an unnecessary copy to cpu_iasq_f with e.g. BLR. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Simplify TB endRichard Henderson1-50/+55
Minimize the amount of code in hppa_tr_translate_insn advancing the insn queue for the next insn. Move the goto_tb path to hppa_tr_tb_stop. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Skip nullified insns in unconditional dbranch pathRichard Henderson1-2/+8
Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Delay computation of IAQ_NextRichard Henderson1-16/+10
We no longer have to allocate a temp and perform an addition before translation of the rest of the insn. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Add install_linkRichard Henderson1-23/+32
Add a common routine for writing the return address. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Add install_iaq_entriesRichard Henderson1-31/+33
Instead of two separate cpu_iaoq_entry calls, use one call to update both IAQ_Front and IAQ_Back. Simplify with an argument combination that automatically handles a simple increment from Front to Back. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_testRichard Henderson1-2/+3
The generic tcg driver will have already checked for breakpoints. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Allow prior nullification in do_ibranchRichard Henderson1-54/+21
Simplify the function by not attempting a conditional move on the branch destination -- just use nullify_over normally. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Pass displacement to do_dbranchRichard Henderson1-24/+9
Pass a displacement instead of an absolute value. In trans_be, remove the user-only do_dbranch case. The branch we are attempting to optimize is to the zero page, which is perforce on a different page than the code currently executing, which means that we will *not* use a goto_tb. Use a plain indirect branch instead, which is what we got out of the attempted direct branch anyway. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Move constant destination check into use_goto_tbRichard Henderson1-10/+10
Share this check between gen_goto_tb and hppa_tr_translate_insn. Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pcRichard Henderson1-4/+4
This function is for log_pc(), which needs to produce a similar result to cpu_get_tb_cpu_state(). Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-15target/hppa: Move cpu_get_tb_cpu_state out of lineRichard Henderson2-41/+44
Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-14Merge tag 'pull-request-2024-05-14' of https://gitlab.com/thuth/qemu into ↵Richard Henderson21-1795/+194
staging * Fix the "tsan-build" CI job on the shared gitlab CI runners * Bump minimum glib version and use URI code from the newer glib * Fix error message from "configure" when C compiler is not working # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmZDXcYRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVPJw//bK/NuMKOHlnwgowkQ/x41t8nc0jAR38+ # aMhJBTSB+9EOlPd+/y7+IeFlD9lS2JzoX/CWeBrNlKc6juWQahABJYcvscmdGiYr # a/dUy9iZoqJyY220TMjCWYwORRtNqPDXaiUIR8hBZZBmW51xs1hRc3aazxPm6dOD # cj1yFKwWGY5g72SkRNTMWi3qWX1tXNOh7sbuhWKkZ3eiRCllHb0RwrhA341ze4TI # ckmlSA6stMjls4XNAIAKVdRKLPE1BsJ/UKxpnOEO3F640cbe69B0+z13wIBNfTOY # Mk3zSjrdLY6thSY+2iOb2FLt3wC5QCBjyRluv+0kwdSnz6xsafEDWNx5VneZH+Iu # ZQWLGvN4qUUBBqHKY8eWnrsij3ABXioHLK8eHj2JuHidcG15tku/1cwAJvy/8P/O # iup0elZ3MXaAk6ce3dwYY4t6QecuzqX9cdJkTuRNlzysK1xKQdBiYTdeZikfUAoM # InuFUh732yPXDSiZcG+uMXUTAJXHWASr7bvPydDx/gL1tYGYBqYepfPF2uWYfNwg # VZRgsN6WVDBGPyXv8Z7eQ9lye5JoAGYrSDxZE87q8RwRV5holiYDxtf10zeLz3Wf # RI5L/bb2eFSHzi3quzOC1uLflLqNKwq+9UZEjdLv2z8zuhwVwxbcDV9+ox6zA8zi # dnVC3Yp/3ik= # =VRHz # -----END PGP SIGNATURE----- # gpg: Signature made Tue 14 May 2024 02:49:10 PM CEST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] * tag 'pull-request-2024-05-14' of https://gitlab.com/thuth/qemu: util/uri: Remove the old URI parsing code block/ssh: Use URI parsing code from glib block/nfs: Use URI parsing code from glib block/nbd: Use URI parsing code from glib block/gluster: Use URI parsing code from glib Remove glib compatibility code that is not required anymore Bump minimum glib version to v2.66 gitlab: use 'setarch -R' to workaround tsan bug gitlab: use $MAKE instead of 'make' dockerfiles: add 'MAKE' env variable to remaining containers configure: Fix error message when C compiler is not working Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-14util/uri: Remove the old URI parsing codeThomas Huth3-1566/+1
Now that we switched all consumers of the URI code to use the URI parsing functions from glib instead, we can remove our internal URI parsing code since it is not used anymore. Reviewed-by: Eric Blake <eblake@redhat.com> Message-ID: <20240418101056.302103-14-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14block/ssh: Use URI parsing code from glibThomas Huth1-35/+40
Since version 2.66, glib has useful URI parsing functions, too. Use those instead of the QEMU-internal ones to be finally able to get rid of the latter. While we're at it, also emit a warning when encountering unknown parameters in the URI, so that the users have a chance to detect their typos or other mistakes. Reviewed-by: Richard W.M. Jones <rjones@redhat.com> Message-ID: <20240418101056.302103-13-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14block/nfs: Use URI parsing code from glibThomas Huth1-56/+54
Since version 2.66, glib has useful URI parsing functions, too. Use those instead of the QEMU-internal ones to be finally able to get rid of the latter. While we're at it, slightly rephrase one of the error messages: Use "Invalid value..." instead of "Illegal value..." since the latter rather sounds like the users were breaking a law here. Reviewed-by: Eric Blake <eblake@redhat.com> Message-ID: <20240418101056.302103-12-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14block/nbd: Use URI parsing code from glibThomas Huth1-39/+37
Since version 2.66, glib has useful URI parsing functions, too. Use those instead of the QEMU-internal ones to be finally able to get rid of the latter. The g_uri_get_host() also takes care of removing the square brackets from IPv6 addresses, so we can drop that part of the QEMU code now, too. Reviewed-by: Richard W.M. Jones <rjones@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-ID: <20240418101056.302103-11-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14block/gluster: Use URI parsing code from glibThomas Huth1-35/+34
Since version 2.66, glib has useful URI parsing functions, too. Use those instead of the QEMU-internal ones to be finally able to get rid of the latter. Since g_uri_get_path() returns a const pointer, we also need to tweak the parameter of parse_volume_options() (where we use the result of g_uri_get_path() as input). Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20240418101056.302103-10-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14Remove glib compatibility code that is not required anymoreThomas Huth2-18/+0
Now that we bumped the minimum glib version to 2.66, we can drop the old code. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20240418101056.302103-9-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14Bump minimum glib version to v2.66Thomas Huth3-42/+5
Now that we dropped support for CentOS 8 and Ubuntu 20.04, we can look into bumping the glib version to a new minimum for further clean-ups. According to repology.org, available versions are: CentOS Stream 9: 2.66.7 Debian 11: 2.66.8 Fedora 38: 2.74.1 Freebsd: 2.78.4 Homebrew: 2.80.0 Openbsd: 2.78.4 OpenSuse leap 15.5: 2.70.5 pkgsrc_current: 2.78.4 Ubuntu 22.04: 2.72.1 Thus it should be safe to bump the minimum glib version to 2.66 now. Version 2.66 comes with new functions for URI parsing which will allow further clean-ups in the following patches. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20240418101056.302103-8-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14gitlab: use 'setarch -R' to workaround tsan bugDaniel P. Berrangé1-0/+3
The TSAN job started failing when gitlab rolled out their latest release. The root cause is a change in the Google COS version used on shared runners. This brings a kernel running with vm.mmap_rnd_bits = 31 which is incompatible with TSAN in LLVM < 18, which only supports upto '28'. LLVM 18 can support upto '30', and failing that will re-exec itself to turn off VA randomization. Our LLVM is too old for now, but we can run with 'setarch -R make ..' to turn off VA randomization ourselves. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240513111551.488088-4-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14gitlab: use $MAKE instead of 'make'Daniel P. Berrangé1-3/+3
The lcitool generated containers have '$MAKE' set to the path of the right 'make' binary. Using the env variable makes it possible to override the choice per job. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240513111551.488088-3-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-14dockerfiles: add 'MAKE' env variable to remaining containersDaniel P. Berrangé7-0/+7
All the lcitool generated containers define a "MAKE" env. It will be convenient for later patches if all containers do this. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240513111551.488088-2-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.1 at 2024-10-01 09:34:03 +0000