aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2021-07-20hw/isa/vt82c686: Add missing Kconfig dependencies (build error)Philippe Mathieu-Daudé1-0/+3
The VT82C686 device model misses various dependencies: /usr/bin/ld: libcommon.fa.p/hw_isa_vt82c686.c.o: in function `vt82c686b_realize': hw/isa/vt82c686.c:622: undefined reference to `i8259_init' /usr/bin/ld: hw/isa/vt82c686.c:624: undefined reference to `i8257_dma_init' /usr/bin/ld: hw/isa/vt82c686.c:627: undefined reference to `mc146818_rtc_init' Add them. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20210515173716.358295-11-philmd@redhat.com>
2021-07-20hw/pci-host/Kconfig: Add missing dependency MV64361 -> I8259Philippe Mathieu-Daudé1-0/+1
Looking at the MV64341 model source, there is a dependency on the 8259 interrupt controller: 523 case MV64340_PCI_1_INTERRUPT_ACKNOWLEDGE_VIRTUAL_REG: 524 /* FIXME: Should this be sent via the PCI bus somehow? */ 525 if (s->gpp_int_level && (s->gpp_value & BIT(31))) { 526 ret = pic_read_irq(isa_pic); 527 } 528 break; Add it to Kconfig to avoid the following build failure: /usr/bin/ld: libcommon.fa.p/hw_pci-host_mv64361.c.o: in function `mv64361_read': hw/pci-host/mv64361.c:526: undefined reference to `isa_pic' /usr/bin/ld: hw/pci-host/mv64361.c:526: undefined reference to `pic_read_irq' Fixes: dcdf98a9015 ("hw/pci-host: Add emulation of Marvell MV64361 PPC system controller") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20210515173716.358295-10-philmd@redhat.com>
2021-07-20hw/ppc/Kconfig: Add missing dependency E500 -> DS1338 RTCPhilippe Mathieu-Daudé2-1/+1
Commit 7abb479c7ab ("PPC: E500: Add FSL I2C controller and integrate RTC with it") added a global dependency on the DS1338 model, instead of a machine one (via Kconfig). This gives trouble when building standalone machines not exposing I2C bus: The following clauses were found for DS1338 CONFIG_DS1338=y config DS1338 depends on I2C Fix by selecting the DS1338 symbol in the single machine requiring it, the E500. Fixes: 7abb479c7ab ("PPC: E500: Add FSL I2C controller and integrate RTC with it") Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210513163858.3928976-9-philmd@redhat.com>
2021-07-20hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machinesPhilippe Mathieu-Daudé2-1/+6
Only the Virt and Spike machines use NUMA. Add a RISCV_NUMA Kconfig symbol and only have these machines select it. Adapt the Meson file to only built it if required. Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210515173716.358295-8-philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-07-20hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -> SERIALPhilippe Mathieu-Daudé1-0/+1
Commit a8fb0a500a6 ("hw/char: Add Microchip PolarFire SoC MMUART emulation") added a dependency on the SERIAL model, but forgot to add the Kconfig selector. Add the dependency to the MCHP_PFSOC_MMUART symbol to fix when building the MICROCHIP_PFSOC machine stand-alone: /usr/bin/ld: libcommon.fa.p/hw_char_mchp_pfsoc_mmuart.c.o: in function `mchp_pfsoc_mmuart_create': hw/char/mchp_pfsoc_mmuart.c:79: undefined reference to `serial_mm_init' Fixes: a8fb0a500a6 ("hw/char: Add Microchip PolarFire SoC MMUART emulation") Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210515173716.358295-7-philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-20hw/arm/Kconfig: Add missing SDHCI symbol to FSL_IMX25Philippe Mathieu-Daudé1-0/+1
Commit bfae1772c43 ("hw/arm/fsl-imx25: Wire up eSDHC controllers") added a dependency on the TYPE_IMX_USDHC model, but forgot to add the Kconfig selector. Fix that to solve when built stand-alone: $ qemu-system-arm -M imx25-pdk qemu-system-arm: missing object type 'imx-usdhc' Aborted (core dumped) Fixes: bfae1772c43 ("hw/arm/fsl-imx25: Wire up eSDHC controllers") Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210515173716.358295-6-philmd@redhat.com>
2021-07-20hw/arm/Kconfig: Remove unused DS1338 symbol from i.MX25 PDK BoardPhilippe Mathieu-Daudé1-1/+0
In commit c4f00daa5b3 ("imx25-pdk: create ds1338 for qtest inside the test") we removed the DS1338 device from the i.MX25 machine but forgot to remove it in the machine Kconfig definitions, do it now. Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210515173716.358295-5-philmd@redhat.com>
2021-07-20hw/arm/Kconfig: Add missing dependency NPCM7XX -> SMBUSPhilippe Mathieu-Daudé1-0/+1
The TYPE_NPCM7XX_SMBUS device model exposes an SMBus, but this isn't advertised with proper Kconfig symbol, leading to an early build failure when building NPCM7XX machines standalone: The following clauses were found for AT24C config AT24C depends on I2C select AT24C if NPCM7XX Fix by adding SMBUS to NPCM7XX. Fixes: 94e77879395 ("hw/i2c: Implement NPCM7XX SMBus Module Single Mode") Reviewed-by: Hao Wu <wuhaotsh@google.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210515173716.358295-4-philmd@redhat.com>
2021-07-20hw/ide/Kconfig: Add missing dependency PCI -> IDE_QDEVPhilippe Mathieu-Daudé1-1/+1
The pci_ide_create_devs() function is declared i hw/ide/qdev.c: $ git grep ide_create_drive hw/ide/pci.c:491: ide_create_drive(d->bus + bus[i], unit[i], hd_table[i]); hw/ide/qdev.c:127:IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive) include/hw/ide/internal.h:653:IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive); Fix the correct symbol dependency to avoid build failure when deselecting some machines: /usr/bin/ld: libcommon.fa.p/hw_ide_pci.c.o: in function `pci_ide_create_devs': hw/ide/pci.c:491: undefined reference to `ide_create_drive' Fixes: 8f01b41e109 ("ide: express dependencies with Kconfig") Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210515173716.358295-3-philmd@redhat.com> Acked-by: John Snow <jsnow@redhat.com>
2021-07-20hw/i386/Kconfig: Add missing Kconfig dependency (runtime error)Philippe Mathieu-Daudé1-0/+1
When building the 'microvm' machine stand-alone we get: $ qemu-system-x86_64 -M microvm ** ERROR:qom/object.c:714:object_new_with_type: assertion failed: (type != NULL) Bail out! ERROR:qom/object.c:714:object_new_with_type: assertion failed: (type != NULL) Aborted (core dumped) Looking at the backtrace: (gdb) bt #3 0x00007ff2330492ff in g_assertion_message_expr () at /lib64/libglib-2.0.so.0 #4 0x000055a878c18341 in object_new_with_type (type=<optimized out>) at qom/object.c:714 #5 0x000055a878c18399 in object_new (typename=typename@entry=0x55a878dec36a "isa-pit") at qom/object.c:747 #6 0x000055a878cc8146 in qdev_new (name=name@entry=0x55a878dec36a "isa-pit") at hw/core/qdev.c:153 #7 0x000055a878a8b439 in isa_new (name=name@entry=0x55a878dec36a "isa-pit") at hw/isa/isa-bus.c:160 #8 0x000055a878adb782 in i8254_pit_init (base=64, isa_irq=0, alt_irq=0x0, bus=0x55a87ab38760) at include/hw/timer/i8254.h:54 #9 microvm_devices_init (mms=0x55a87ac36800) at hw/i386/microvm.c:263 #10 microvm_machine_state_init (machine=<optimized out>) at hw/i386/microvm.c:471 #11 0x000055a878a944ab in machine_run_board_init (machine=machine@entry=0x55a87ac36800) at hw/core/machine.c:1239 The "isa-pit" type (TYPE_I8254) is missing. Add it. Fixes: 0ebf007ddac ("hw/i386: Introduce the microvm machine type") Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20210616204328.2611406-24-philmd@redhat.com>
2021-07-20hw/acpi/Kconfig: Add missing Kconfig dependencies (build error)Philippe Mathieu-Daudé1-0/+4
The 'microvm' machine misses various dependencies: /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `acpi_setup_microvm': hw/i386/acpi-microvm.c:247: undefined reference to `acpi_build_tables_init' /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `acpi_build_microvm': hw/i386/acpi-microvm.c:192: undefined reference to `bios_linker_loader_alloc' /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `build_dsdt_microvm': hw/i386/acpi-microvm.c:121: undefined reference to `init_aml_allocator' /usr/bin/ld: hw/i386/acpi-microvm.c:124: undefined reference to `acpi_data_push' /usr/bin/ld: hw/i386/acpi-microvm.c:126: undefined reference to `aml_scope' /usr/bin/ld: hw/i386/acpi-microvm.c:129: undefined reference to `build_ged_aml' /usr/bin/ld: hw/i386/acpi-microvm.c:131: undefined reference to `acpi_dsdt_add_power_button' /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `acpi_dsdt_add_virtio': hw/i386/acpi-microvm.c:77: undefined reference to `aml_string' /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `build_dsdt_microvm': hw/i386/acpi-microvm.c:138: undefined reference to `aml_scope' /usr/bin/ld: hw/i386/acpi-microvm.c:149: undefined reference to `build_header' /usr/bin/ld: hw/i386/acpi-microvm.c:152: undefined reference to `free_aml_allocator' /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `acpi_build_microvm': hw/i386/acpi-microvm.c:202: undefined reference to `acpi_add_table' /usr/bin/ld: hw/i386/acpi-microvm.c:203: undefined reference to `build_fadt' /usr/bin/ld: hw/i386/acpi-microvm.c:206: undefined reference to `acpi_add_table' /usr/bin/ld: hw/i386/acpi-microvm.c:207: undefined reference to `acpi_build_madt' /usr/bin/ld: hw/i386/acpi-microvm.c:212: undefined reference to `build_xsdt' /usr/bin/ld: hw/i386/acpi-microvm.c:224: undefined reference to `build_rsdp' /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `acpi_setup_microvm': hw/i386/acpi-microvm.c:251: undefined reference to `acpi_add_rom_blob' /usr/bin/ld: hw/i386/acpi-microvm.c:253: undefined reference to `acpi_add_rom_blob' /usr/bin/ld: hw/i386/acpi-microvm.c:255: undefined reference to `acpi_add_rom_blob' /usr/bin/ld: hw/i386/acpi-microvm.c:258: undefined reference to `acpi_build_tables_cleanup' /usr/bin/ld: libqemu-i386-softmmu.fa.p/hw_i386_acpi-microvm.c.o: in function `acpi_dsdt_add_pci': hw/i386/acpi-microvm.c:105: undefined reference to `acpi_dsdt_add_gpex' collect2: error: ld returned 1 exit status ninja: build stopped: subcommand failed. Update the ACPI_HW_REDUCED symbol to select ACPI_MEMORY_HOTPLUG / ACPI_NVDIMM / ACPI. Fixes: 8045df14bcc ("microvm/acpi: add minimal acpi support") Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20210616204328.2611406-23-philmd@redhat.com>
2021-07-20hw/acpi: Do not restrict ACPI core routines to x86 architecturePhilippe Mathieu-Daudé1-1/+2
ACPI core routines (in core.c) are not really x86-specific. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20210616204328.2611406-21-philmd@redhat.com>
2021-07-20hw/mips: Express dependencies of the Boston machine with KconfigPhilippe Mathieu-Daudé2-4/+5
Boston is built around a Xilinx FPGA, which includes a PCIe root port and an UART. An Intel EG20T PCH connects the I/O peripherals, but only the SATA bus is emulated. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Paul Burton <pburton@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190311005618.19007-6-philmd@redhat.com>
2021-07-20hw/mips: Add dependency MIPS_CPS -> MIPS_ITUPhilippe Mathieu-Daudé1-0/+1
The Inter-Thread Communication Unit (ITU, introduced in commit 34fa7e83e11) is part of the Coherent Processing System (CPS), as describe in commit 408294352ad: Make ITU available in the system if CPU supports multithreading and is part of CPS. Have CPS select ITU in Kconfig to avoid the following build failure: /usr/bin/ld: libqemu-mips64el-softmmu.fa.p/hw_mips_cps.c.o: in function `mips_cps_realize': hw/mips/cps.c:104: undefined reference to `mips_itu_get_tag_region' Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190311005618.19007-5-philmd@redhat.com>
2021-07-19Merge remote-tracking branch ↵Peter Maydell11-34/+81
'remotes/thuth-gitlab/tags/pull-request-2021-07-19' into staging - Compile-test the Windows installer in the Gitlab-CI - Fix endianess detection problem with LTO in "configure" - Fix two abort()s in the vmxnet code - Fix crash with x-remote machine and IDE devices # gpg: Signature made Mon 19 Jul 2021 10:47:12 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/thuth-gitlab/tags/pull-request-2021-07-19: hw/ide: Fix crash when plugging a piix3-ide device into the x-remote machine hw/net/net_tx_pkt: Fix crash detected by fuzzer hw/net/vmxnet3: Do not abort if the guest is trying to use an invalid TX queue configure: Fix endianess test with LTO ci: build & store windows installer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-19hw/ide: Fix crash when plugging a piix3-ide device into the x-remote machineThomas Huth5-21/+46
QEMU currently crashes when the user tries to do something like: qemu-system-x86_64 -M x-remote -device piix3-ide This happens because the "isabus" variable is not initialized with the x-remote machine yet. Add a proper check for this condition and propagate the error to the caller, so we can fail there gracefully. Message-Id: <20210416125256.2039734-1-thuth@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-07-19hw/net/net_tx_pkt: Fix crash detected by fuzzerThomas Huth1-5/+7
QEMU currently crashes when it's started like this: cat << EOF | ./qemu-system-i386 -device vmxnet3 -nodefaults -qtest stdio outl 0xcf8 0x80001014 outl 0xcfc 0xe0001000 outl 0xcf8 0x80001018 outl 0xcf8 0x80001004 outw 0xcfc 0x7 outl 0xcf8 0x80001083 write 0x0 0x1 0xe1 write 0x1 0x1 0xfe write 0x2 0x1 0xbe write 0x3 0x1 0xba writeq 0xe0001020 0xefefff5ecafe0000 writeq 0xe0001020 0xffff5e5ccafe0002 EOF It hits this assertion: qemu-system-i386: ../qemu/hw/net/net_tx_pkt.c:453: net_tx_pkt_reset: Assertion `pkt->raw' failed. This happens because net_tx_pkt_init() is called with max_frags == 0 and thus the allocation p->raw = g_new(struct iovec, max_frags); results in a NULL pointer that causes the assert(pkt->raw); in net_tx_pkt_reset() to fail later. To fix this issue we can check that max_raw_frags was not zero before asserting that pkt->raw is a non-NULL pointer. Buglink: https://bugs.launchpad.net/qemu/+bug/1890157 Message-Id: <20210715193219.1132571-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Pankaj Gupta <pankaj.gupta@ionos.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-07-19hw/net/vmxnet3: Do not abort if the guest is trying to use an invalid TX queueThomas Huth1-2/+7
QEMU should never abort just because the guest is doing something odd. Let's simply log the error and ignore the bad transmit queue instead. Buglink: https://bugs.launchpad.net/qemu/+bug/1926111 Message-Id: <20210715103755.1035566-1-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-07-19configure: Fix endianess test with LTOThomas Huth1-6/+9
If a user is trying to compile QEMU with link-time optimization enabled by running the configure script like this: .../configure --extra-cflags="-flto" then the endianess test is failing since the magic values do not show up in the intermediate object files there. If the host is a big endian machine (like s390x), the QEMU binary is then unusable since the corresponding variable "bigendian" is pre-initialized with "no". To fix this issue, we should rather create a full binary and look for the magic strings there instead. And we really should not continue the build if the endianess check failed, to make it clear right from the start that something went wrong here, thus let's also add some "exit 1" statements here after emitting the error message. Message-Id: <20210715083928.933806-1-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-07-19ci: build & store windows installerGerd Hoffmann3-0/+12
Build windows installer for qemu in gitlab CI, store the result as artifact. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Willian Rampazzo <willianr@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210623091137.1156959-2-kraxel@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-07-18Merge remote-tracking branch ↵Peter Maydell26-59/+122
'remotes/pmaydell/tags/pull-target-arm-20210718' into staging target-arm queue: * Remove duplicate 'plus1' function from Neon and SVE decode * Fix offsets for TTBCR for big-endian hosts * docs: fix copyright date * docs: add license/version info to HTML footers * docs: add an About section * docs: document some more arm boards # gpg: Signature made Sun 18 Jul 2021 13:45:22 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210718: target/arm: Remove duplicate 'plus1' function from Neon and SVE decode docs: Add skeletal documentation of highbank and midway docs: Add skeletal documentation of the emcraft-sf2 docs: Add skeletal documentation of cubieboard docs: Add QEMU version information to HTML footer docs: Add license note to the HTML page footer docs: Add some actual About text to about/index.rst docs: Move deprecation, build and license info out of system/ docs: Remove "Contents:" lines from top-level subsections docs: Stop calling the top level subsections of our manual 'manuals' docs: Fix documentation Copyright date target/arm: Fix offsets for TTBCR Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-18target/arm: Remove duplicate 'plus1' function from Neon and SVE decodePeter Maydell5-14/+4
The Neon and SVE decoders use private 'plus1' functions to implement "add one" for the !function decoder syntax. We have a generic "plus_1" function in translate.h, so use that instead. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210715095341.701-1-peter.maydell@linaro.org
2021-07-18docs: Add skeletal documentation of highbank and midwayPeter Maydell3-0/+21
Add skeletal documentation for the highbank and midway machines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-4-peter.maydell@linaro.org
2021-07-18docs: Add skeletal documentation of the emcraft-sf2Peter Maydell3-0/+17
Add skeletal documentation of the emcraft-sf2 machine. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-3-peter.maydell@linaro.org
2021-07-18docs: Add skeletal documentation of cubieboardPeter Maydell3-0/+18
Add skeletal documentation of the cubieboard machine. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-2-peter.maydell@linaro.org
2021-07-18docs: Add QEMU version information to HTML footerPeter Maydell1-0/+2
Add a line to the HTML document footer mentioning the QEMU version. The version information is already provided in very faint text below the QEMU logo in the sidebar, but that is rather inconspicious, so repeating it in the footer seems useful. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-8-peter.maydell@linaro.org
2021-07-18docs: Add license note to the HTML page footerPeter Maydell3-1/+15
The standard Sphinx/RTD HTML page footer gives a copyright line (based on the 'copyright' variable set in conf.py) and a line "Built with Sphinx using a theme provided by Read the Docs" (which can be disabled via the html_show_sphinx variable, but we leave it enabled). As a free software project, we'd like to also mention the license QEMU and its manual are released under. Add a template footer.html which defines the 'extrafooter' block that the RtD theme provides for this purpose. The new line of text will go below the existing copyright and sphinx-acknowledgement lines. (Unfortunately the RTD footer template does not permit putting it after the copyright but before the sphinx-acknowledgement.) We use the templating functionality to make the new text also be a hyperlink to the about/license.html page of the manual. Unlike rst files, HTML template files are not reported to our depfile plugin, so we maintain a manual list in meson.build. New template files should be rare, so not being able to auto-generate the dependency info is not too awkward. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-7-peter.maydell@linaro.org
2021-07-18docs: Add some actual About text to about/index.rstPeter Maydell1-0/+17
Add some text to About to act as a brief introduction to the QEMU manual and to make the about page a bit less of an abrupt start to it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-6-peter.maydell@linaro.org
2021-07-18docs: Move deprecation, build and license info out of system/Peter Maydell7-4/+11
Now that we have a single Sphinx manual rather than multiple manuals, we can provide a better place for "common to all of QEMU" information like the deprecation notices, build platforms, license information, which we currently have in the system/ manual even though it applies to all of QEMU. Create a new directory about/ on the same level as system/, user/, etc, and move these documents there. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-5-peter.maydell@linaro.org
2021-07-18docs: Remove "Contents:" lines from top-level subsectionsPeter Maydell6-12/+0
Since the top-level subsections aren't self-contained manuals any more, the "Contents:" lines at the top of each of their index pages look a bit odd; remove them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-4-peter.maydell@linaro.org
2021-07-18docs: Stop calling the top level subsections of our manual 'manuals'Peter Maydell6-23/+9
We merged our previous multiple-manual setup into a single Sphinx manual, but we left some text in the various index.rst lines that still calls the top level subsections separate 'manuals'. Update them to talk about "this section of the manual" instead, and remove now-obsolete comments about how the index.rst files are the "top level page for the 'foo' manual". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-3-peter.maydell@linaro.org
2021-07-18docs: Fix documentation Copyright datePeter Maydell1-1/+1
In commit 6d8980a38fa we updated the copyright string we present to the user in -version output, About dialogs, etc, but we forgot that the Sphinx manuals have a separate copyright string setting. Update that one too. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-2-peter.maydell@linaro.org
2021-07-18target/arm: Fix offsets for TTBCRRichard Henderson1-4/+7
The functions vmsa_ttbcr_write and vmsa_ttbcr_raw_write expect the offset to be for the complete TCR structure, not the offset to the low 32-bits of a uint64_t. Using offsetoflow32 in this case breaks big-endian hosts. For TTBCR2, we do want the high 32-bits of a uint64_t. Use cp15.tcr_el[*].raw_tcr as the offsetofhigh32 argument to clarify this. Buglink: https://gitlab.com/qemu-project/qemu/-/issues/187 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210709230621.938821-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-16Merge remote-tracking branch 'remotes/mst/tags/for_upstream3' into stagingPeter Maydell43-42/+949
pc,pci,virtio: lots of new features Lots of last minute stuff. vhost-user-i2c. vhost-vsock SOCK_SEQPACKET support. IOMMU bypass. ACPI based pci hotplug. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 16 Jul 2021 16:11:27 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream3: vhost-vsock: SOCK_SEQPACKET feature bit support docs: Add documentation for iommu bypass hw/i386/acpi-build: Add IVRS support to bypass iommu hw/i386/acpi-build: Add DMAR support to bypass iommu hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3 hw/pci: Add pci_bus_range() to get PCI bus number range hw/i386: Add a default_bus_bypass_iommu pc machine option hw/arm/virt: Add default_bus_bypass_iommu machine option hw/pxb: Add a bypass iommu property hw/pci/pci_host: Allow PCI host to bypass iommu docs: Add '-device intel-iommu' entry hw/virtio: add vhost-user-i2c-pci boilerplate hw/virtio: add boilerplate for vhost-user-i2c device bios-tables-test: Update golden binaries hw/acpi/ich9: Set ACPI PCI hot-plug as default on Q35 bios-tables-test: Allow changes in DSDT ACPI tables hw/pci/pcie: Do not set HPC flag if acpihp is used hw/acpi/ich9: Enable ACPI PCI hot-plug hw/i386/acpi-build: Add ACPI PCI hot-plug methods to Q35 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-16vhost-vsock: SOCK_SEQPACKET feature bit supportArseny Krasnov1-2/+10
This adds processing of VIRTIO_VSOCK_F_SEQPACKET features bit. Guest negotiates it with vhost, thus both will know that SOCK_SEQPACKET supported by peer. Signed-off-by: Arseny Krasnov <arseny.krasnov@kaspersky.com> Message-Id: <20210622144747.2949134-1-arseny.krasnov@kaspersky.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16docs: Add documentation for iommu bypassXingang Wang1-0/+89
Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1625748919-52456-10-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/i386/acpi-build: Add IVRS support to bypass iommuXingang Wang1-1/+1
Check bypass_iommu to exclude the devices which will bypass iommu. Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1625748919-52456-9-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/i386/acpi-build: Add DMAR support to bypass iommuXingang Wang1-2/+66
In DMAR table, the drhd is set to cover all PCI devices when intel_iommu is on. To support bypass iommu feature, we need to walk the PCI bus with bypass_iommu disabled and add explicit scope data in DMAR drhd structure. /mnt/sdb/wxg/qemu-next/qemu/build/x86_64-softmmu/qemu-system-x86_64 \ -machine q35,accel=kvm,default_bus_bypass_iommu=true \ -cpu host \ -m 16G \ -smp 36,sockets=2,cores=18,threads=1 \ -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3 \ -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x4,bypass_iommu=true \ -device pcie-root-port,port=0x1,chassis=1,id=pci.11,bus=pci.10,addr=0x0 \ -device pcie-root-port,port=0x2,chassis=2,id=pci.21,bus=pci.20,addr=0x0 \ -device virtio-scsi-pci,id=scsi0,bus=pci.11,addr=0x0 \ -device virtio-scsi-pci,id=scsi1,bus=pci.21,addr=0x0 \ -drive file=/mnt/sdb/wxg/fedora-48g.qcow2,format=qcow2,if=none,id=drive-scsi0-0-0-0,cache=none,aio=native \ -device scsi-hd,bus=scsi1.0,channel=0,scsi-id=0,lun=0,drive=drive-scsi0-0-0-0,id=scsi0-0-0-0,bootindex=1 \ -device intel-iommu \ -nographic \ And we get the guest configuration: ~ lspci -vt -+-[0000:20]---00.0-[21]----00.0 Red Hat, Inc. Virtio SCSI +-[0000:10]---00.0-[11]----00.0 Red Hat, Inc. Virtio SCSI \-[0000:00]-+-00.0 Intel Corporation 82G33/G31/P35/P31 Express DRAM Controller +-01.0 Device 1234:1111 +-02.0 Intel Corporation 82574L Gigabit Network Connection +-03.0 Red Hat, Inc. QEMU PCIe Expander bridge +-04.0 Red Hat, Inc. QEMU PCIe Expander bridge +-1f.0 Intel Corporation 82801IB (ICH9) LPC Interface Controller +-1f.2 Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA Controller [AHCI mode] \-1f.3 Intel Corporation 82801I (ICH9 Family) SMBus Controller With bypass_iommu enabled on root bus, the attached devices will bypass iommu: /sys/class/iommu/dmar0 ├── devices │   ├── 0000:10:00.0 -> ../../../../pci0000:10/0000:10:00.0 │   └── 0000:11:00.0 -> ../../../../pci0000:10/0000:10:00.0/0000:11:00.0 Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1625748919-52456-8-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3Xingang Wang1-11/+103
When we build IORT table with SMMUv3 and bypass iommu feature enabled, we can no longer setup one map from RC to SMMUv3 covering the whole RIDs. We need to walk the PCI bus and check whether the root bus will bypass iommu, setup RC -> SMMUv3 -> ITS map for RC which will not bypass iommu. When a SMMUv3 node exist, we setup the idmap from SMMUv3 to ITS covering the whole RIDs, and only modify the map from RC to SMMUv3. We build RC -> SMMUv3 -> ITS map for root bus with bypass_iommu disabled, and build idmap from RC to ITS directly for the rest of the whole RID space. For example we run qemu with command line: qemu/build/aarch64-softmmu/qemu-system-aarch64 \ -kernel arch/arm64/boot/Image \ -enable-kvm \ -cpu host \ -m 8G \ -smp 8,sockets=2,cores=4,threads=1 \ -machine virt,kernel_irqchip=on,gic-version=3,iommu=smmuv3,default_bus_bypass_iommu=true \ -drive file=./QEMU_EFI-pflash.raw,if=pflash,format=raw,unit=0,readonly=on \ -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3.0x1 \ -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x3.0x2,bypass_iommu=true \ -device pcie-root-port,port=0x20,chassis=1,id=pci.1,bus=pcie.0,addr=0x2 \ -device pcie-root-port,port=0x20,chassis=11,id=pci.11,bus=pci.10,addr=0x1 \ -device pcie-root-port,port=0x20,chassis=21,id=pci.21,bus=pci.20,addr=0x1 \ -device virtio-scsi-pci,id=scsi0,bus=pci.1,addr=0x1 \ -device virtio-scsi-pci,id=scsi1,bus=pci.11,addr=0x1 \ -device virtio-scsi-pci,id=scsi2,bus=pci.21,addr=0x1 \ -initrd /mnt/davinci/wxg/kill-linux/rootfs/mfs.cpio.gz \ -nographic \ -append "rdinit=init console=ttyAMA0 earlycon=pl011,0x9000000 nokaslr" \ And we get guest configuration: -+-[0000:20]---01.0-[21]-- +-[0000:10]---01.0-[11]-- \-[0000:00]-+-00.0 Device 1b36:0008 +-01.0 Device 1af4:1000 \-02.0-[01]-- With bypass_iommu enabled, the attached devices will bypass iommu. /sys/class/iommu/smmu3.0x0000000009050000/ |-- device -> ../../../arm-smmu-v3.0.auto |-- devices | `-- 0000:10:01.0 -> ../../../../../pci0000:10/0000:10:01.0 Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1625748919-52456-7-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/pci: Add pci_bus_range() to get PCI bus number rangeXingang Wang2-0/+17
This helps to get the min and max bus number of a PCI bus hierarchy. Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <1625748919-52456-6-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/i386: Add a default_bus_bypass_iommu pc machine optionXingang Wang3-0/+23
Add a default_bus_bypass_iommu pc machine option to enable/disable bypass_iommu for default root bus. The option is disabled by default and can be enabled with: $QEMU -machine q35,default_bus_bypass_iommu=true Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1625748919-52456-5-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/arm/virt: Add default_bus_bypass_iommu machine optionXingang Wang2-0/+27
Add a default_bus_bypass_iommu machine option to enable/disable bypass_iommu for default root bus. The option is disabled by default and can be enabled with: $QEMU -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1625748919-52456-4-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/pxb: Add a bypass iommu propertyXingang Wang1-0/+3
Add a bypass_iommu property for pci_expander_bridge, the property is used to indicate whether pxb root bus will bypass iommu. By default the bypass_iommu is disabled, and it can be enabled with: qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <1625748919-52456-3-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/pci/pci_host: Allow PCI host to bypass iommuXingang Wang4-1/+20
Add a new bypass_iommu property for PCI host and use it to check whether devices attached to the PCI root bus will bypass iommu. In pci_device_iommu_address_space(), check the property and avoid getting iommu address space for devices bypass iommu. Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <1625748919-52456-2-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16docs: Add '-device intel-iommu' entryPeter Xu1-0/+33
The parameters of intel-iommu device are non-trivial to understand. Add an entry for it so that people can reference to it when using. There're actually a few more options there, but I hide them explicitly because they shouldn't be used by normal QEMU users. Cc: Chao Yang <chayang@redhat.com> Cc: Lei Yang <leiyang@redhat.com> Cc: Jing Zhao <jinzhao@redhat.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20210707154114.197580-1-peterx@redhat.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/virtio: add vhost-user-i2c-pci boilerplateViresh Kumar2-0/+70
This allows is to instantiate a vhost-user-i2c device as part of a PCI bus. It is mostly boilerplate which looks pretty similar to the vhost-user-fs-pci device. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Message-Id: <8a083eaa57d93feaab12acd1f94b225879212f20.1625806763.git.viresh.kumar@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/virtio: add boilerplate for vhost-user-i2c deviceViresh Kumar4-0/+322
This creates the QEMU side of the vhost-user-i2c device which connects to the remote daemon. It is based of vhost-user-fs code. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Message-Id: <e80591b52fea4b51631818bb92a798a3daf90399.1625806763.git.viresh.kumar@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-07-15' into ↵Peter Maydell4-1/+5
staging QAPI patches patches for 2021-07-15 # gpg: Signature made Thu 15 Jul 2021 13:30:14 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2021-07-15: qapi: Fix crash on missing enum member name Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-16bios-tables-test: Update golden binariesJulia Suvorova12-11/+0
Add ACPI hot-plug registers to DSDT Q35 tables. Changes in the tables: + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0x0CC4, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0x0CCC, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0x0CD4, 0x08) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32, + PIDX, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + + Method (AIDX, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + PIDX = (One << Arg1) + Local0 = PIDX /* \_SB_.PCI0.PIDX */ + Release (BLCK) + Return (Local0) + } + + Method (PDSM, 6, Serialized) + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Local0 = AIDX (Arg4, Arg5) + If ((Arg2 == Zero)) + { + If ((Arg1 == 0x02)) + { + If (!((Local0 == Zero) | (Local0 == 0xFFFFFFFF))) + { + Return (Buffer (One) + { + 0x81 // . + }) + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + ElseIf ((Arg2 == 0x07)) + { + Local1 = Package (0x02) + { + Zero, + "" + } + Local1 [Zero] = Local0 + Return (Local1) + } + } + } + } + ... Scope (_GPE) { Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } ... + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CC4, // Range Minimum + 0x0CC4, // Range Maximum + 0x01, // Alignment + 0x18, // Length + ) + }) + } } ... And if there is a port in configuration: Device (S10) { Name (_ADR, 0x00020000) // _ADR: Address + Name (BSEL, Zero) + Device (S00) + { + Name (_SUN, Zero) // _SUN: Slot User Number + Name (_ADR, Zero) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + } + } + ... + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & One)) + { + Notify (S00, Arg1) + } ... Signed-off-by: Julia Suvorova <jusual@redhat.com> Message-Id: <20210713004205.775386-7-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-07-16hw/acpi/ich9: Set ACPI PCI hot-plug as default on Q35Julia Suvorova2-1/+2
Q35 has three different types of PCI devices hot-plug: PCIe Native, SHPC Native and ACPI hot-plug. This patch changes the default choice for cold-plugged bridges from PCIe Native to ACPI Hot-plug with ability to use SHPC and PCIe Native for hot-plugged bridges. This is a list of the PCIe Native hot-plug issues that led to this change: * no racy behavior during boot (see 110c477c2ed) * no delay during deleting - after the actual power off software must wait at least 1 second before indicating about it. This case is quite important for users, it even has its own bug: https://bugzilla.redhat.com/show_bug.cgi?id=1594168 * no timer-based behavior - in addition to the previous example, the attention button has a 5-second waiting period, during which the operation can be canceled with a second press. While this looks fine for manual button control, automation will result in the need to queue or drop events, and the software receiving events in all sort of unspecified combinations of attention/power indicator states, which is racy and uppredictable. * fixes: * https://bugzilla.redhat.com/show_bug.cgi?id=1752465 * https://bugzilla.redhat.com/show_bug.cgi?id=1690256 To return to PCIe Native hot-plug: -global ICH9-LPC.acpi-pci-hotplug-with-bridge-support=off Known issue: older linux guests need the following flag to allow hotplugged pci express devices to use io: -device pcie-root-port,io-reserve=4096. io is unusual for pci express so this seems minor. We'll fix this by a follow up patch. Signed-off-by: Julia Suvorova <jusual@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210713004205.775386-6-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>