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2023-12-31meson: remove config_targetosPaolo Bonzini7-21/+17
config_targetos is now empty and can be removed; its use in sourcesets that do not involve target-specific files can be replaced with an empty dictionary. In fact, at this point *all* sourcesets that do not involve target-specific files are just glorified mutable arrays. Enforce that they never test for symbols in "when:" by computing the set of files without "strict: false". Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetosPaolo Bonzini8-60/+79
For consistency with other OSes, use if...endif for rules that are target-independent. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: remove OS definitions from config_targetosPaolo Bonzini15-42/+57
CONFIG_DARWIN, CONFIG_LINUX and CONFIG_BSD are used in some rules, but only CONFIG_LINUX has substantial use. Convert them all to if...endif. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: always probe u2f and canokey if the option is enabledPaolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: move subdirs to "Collect sources" sectionPaolo Bonzini1-33/+33
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: move config-host.h definitions togetherPaolo Bonzini1-13/+14
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: move CFI detection code with other compiler flagsPaolo Bonzini1-40/+40
Keep it together with the other compiler modes, and before dependencies. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: keep subprojects togetherPaolo Bonzini1-36/+36
And move away dependencies that are not subprojects anymore. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: move accelerator dependency checks togetherPaolo Bonzini1-84/+91
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: move option validation togetherPaolo Bonzini1-69/+68
Check options before compiler flags, because some compiler flags are incompatible with modules. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: move program checks togetherPaolo Bonzini1-51/+56
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: add more sections to main meson.buildPaolo Bonzini1-6/+18
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31configure: unify again the case arms in probe_target_compilerPaolo Bonzini1-59/+28
Remove assignments that match the default, and group the targets for debian-legacy-test-cross and debian-all-test-cross into a single arm. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31configure: remove unnecessary subshellPaolo Bonzini1-5/+3
Do not use a subshell to hide the shadowing of $config_host_mak. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31Makefile: clean qemu-iotests outputPaolo Bonzini2-1/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: use version_compare() to compare versionPaolo Bonzini1-1/+1
While a simple lexicographic comparison usually works, it is less robust than a more specific algorithm designed to compare versions. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: remove unused variablePaolo Bonzini1-3/+3
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31meson: fix type of "relocatable" optionPaolo Bonzini1-1/+1
Since the option is of boolean type, the default value should be a boolean rather than a string. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31esp: check for NULL result from scsi_device_find()Alexandra Diupina1-0/+9
Add a 'current_lun' check for a null value to avoid null pointer dereferencing and recover host if NULL return Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 4eb8606560 (esp: store lun coming from the MESSAGE OUT phase) Signed-off-by: Alexandra Diupina <adiupina@astralinux.ru> Message-ID: <20231229152647.19699-1-adiupina@astralinux.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-31target/i386: the sgx_epc_get_section stub is reachablePaolo Bonzini1-1/+1
The sgx_epc_get_section stub is reachable from cpu_x86_cpuid. It should not assert, instead it should just return true just like the "real" sgx_epc_get_section does when SGX is disabled. Reported-by: Vladimír Beneš <vbenes@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20220201190941.106001-1-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: implement CMPccXADDPaolo Bonzini5-1/+133
The main difficulty here is that a page fault when writing to the destination must not overwrite the flags. Therefore, the flags computation must be inlined instead of using gen_jcc1*. For simplicity, I am using an unconditional cmpxchg operation, that becomes a NOP if the comparison fails. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: introduce flags writeback mechanismPaolo Bonzini6-13/+101
ALU instructions can write to both memory and flags. If the CC_SRC* and CC_DST locations have been written already when a memory access causes a fault, the value in CC_SRC* and CC_DST might be interpreted with the wrong CC_OP (the one that is in effect before the instruction. Besides just using the wrong result for the flags, something like subtracting -1 can have disastrous effects if the current CC_OP is CC_OP_EFLAGS: this is because QEMU does not expect bits outside the ALU flags to be set in CC_SRC, and env->eflags can end up set to all-ones. In the case of the attached testcase, this sets IOPL to 3 and would cause an assertion failure if SUB is moved to the new decoder. This mechanism is not really needed for BMI instructions, which can only write to a register, but put it to use anyway for cleanliness. In the case of BZHI, the code has to be modified slightly to ensure that decode->cc_src is written, otherwise the new assertions trigger. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: adjust decoding of J operandPaolo Bonzini1-10/+0
gen_jcc() has been changed to accept a relative offset since the new decoder was written. Adjust the J operand, which is meant to be used with jump instructions such as gen_jcc(), to not include the program counter and to not truncate the result, as both operations are now performed by common code. The result is that J is now the same as the I operand. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: move operand load and writeback out of gen_cmovcc1Paolo Bonzini1-10/+6
Similar to gen_setcc1, make gen_cmovcc1 receive TCGv. This is more friendly to simultaneous implementation in the old and the new decoder. A small wart is that s->T0 of CMOV is currently the *second* argument (which would ordinarily be in T1). Therefore, the condition has to be inverted in order to overwrite s->T0 with cpu_regs[reg] if the MOV is not performed. This only applies to the old decoder, and this code will go away soon. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: prepare for implementation of STOS/SCAS in new decoderPaolo Bonzini1-2/+7
Do not use gen_op, and pull the load from the accumulator into disas_insn. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0Paolo Bonzini1-3/+6
Create a new temporary, to ease the register allocator's work. Creation of the temporary is pushed into gen_ext_tl, which also allows NULL as the first parameter now. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: do not use s->tmp4 for pushPaolo Bonzini1-1/+1
Just create a temporary for the occasion. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: split eflags computation out of gen_compute_eflagsPaolo Bonzini1-9/+19
The new x86 decoder wants the gen_* functions to compute EFLAGS before writeback, which can be an issue for instructions with a memory destination such as ARPL or shifts. Extract code to compute the EFLAGS without clobbering CC_SRC, in case the memory write causes a fault. The flags writeback mechanism will take care of copying the result to CC_SRC. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: do not clobber T0 on string operationsPaolo Bonzini1-21/+24
The new decoder would rather have the operand in T0 when expanding SCAS, rather than use R_EAX directly as gen_scas currently does. This makes SCAS more similar to CMP and SUB, in that CC_DST = T0 - T1. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: do not clobber A0 in POP translationPaolo Bonzini1-14/+20
The new decoder likes to compute the address in A0 very early, so the gen_lea_v_seg in gen_pop_T0 would clobber the address of the memory operand. Instead use T0 since it is already available and will be overwritten immediately after. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: do not decode string source/destination into decode->memPaolo Bonzini1-18/+2
decode->mem is only used if one operand has has_ea == true. String operations will not use decode->mem and will load A0 on their own, because they are the only case of two memory operands in a single instruction. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: add X86_SPECIALs for MOVSX and MOVZXPaolo Bonzini3-24/+40
Usually the registers are just moved into s->T0 without much care for their operand size. However, in some cases we can get more efficient code if the operand fetching logic syncs with the emission function on what is nicer. All the current uses are mostly demonstrative and only reduce the code in the emission functions, because the instructions do not support memory operands. However the logic is generic and applies to several more instructions such as MOVSXD (aka movslq), one-byte shift instructions, multiplications, XLAT, and indirect calls/jumps. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: rename zext0/zext2 and make them closer to the manualPaolo Bonzini2-12/+21
X86_SPECIAL_ZExtOp0 and X86_SPECIAL_ZExtOp2 are poorly named; they are a hack that is needed by scalar insertion and extraction instructions, and not really related to zero extension: for PEXTR the zero extension is done by the generation functions, for PINSR the high bits are not used at all and in fact are *not* filled with zeroes when loaded into s->T1. Rename the values to match the effect described in the manual, and explain better in the comments. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: avoid trunc and ext for MULX and RORXPaolo Bonzini1-10/+23
Use _tl operations for 32-bit operands on 32-bit targets, and only go through trunc and extu ops for 64-bit targets. While the trunc/ext ops should be pretty much free after optimization, the optimizer also does not like having the same temporary used in multiple EBBs. Therefore it is nicer to not use tmpN* unless necessary. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: reimplement check for validity of LOCK prefixPaolo Bonzini3-12/+13
The previous check erroneously allowed CMP to be modified with LOCK. Instead, tag explicitly the instructions that do support LOCK. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: document more deviations from the manualPaolo Bonzini1-0/+12
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: clean up cpu_cc_compute_allPaolo Bonzini6-20/+18
cpu_cc_compute_all() has an argument that is always equal to CC_OP for historical reasons (dating back to commit a7812ae4123, "TCG variable type checking.", 2008-11-17, which added the argument to helper_cc_compute_all). It does not make sense for the argument to have any other value, so remove it and clean up some lines that are not too long anymore. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: remove unnecessary truncationsPaolo Bonzini2-5/+1
gen_lea_v_seg (called by gen_add_A0_ds_seg) already zeroes any bits of s->A0 beyond s->aflag. It does so before summing the segment base and, if not in 64-bit mode, also after summing it. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: remove unnecessary arguments from raise_interruptPaolo Bonzini3-7/+5
is_int is always 1, and error_code is always zero. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: speedup JO/SETO after MUL or IMULPaolo Bonzini1-0/+3
OF is equal to the carry flag, so use the same CCPrepare. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/i386: optimize computation of JL and JLE from flagsPaolo Bonzini1-6/+4
Take advantage of the fact that there can be no 1 bits between SF and OF. If they were adjacent, you could sum SF and get a carry only if SF was already set. Then the value of OF in the sum is the XOR of OF itself, the carry (which is SF) and 0 (the value of the OF bit in the addend): this is OF^SF exactly. Because OF and SF are not adjacent, just place more 1 bits to the left so that the carry propagates, which means summing CC_O - CC_S. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-22configure: use a native non-cross compiler for linux-userPaolo Bonzini1-2/+2
Commit c2118e9e1ab ("configure: don't try a "native" cross for linux-user", 2023-11-23) sought to avoid issues with using the native compiler with a cross-endian or cross-bitness setup. However, in doing so it ended up requiring a cross compiler setup (and most likely a slow compiler setup) even when building TCG tests that are native to the host architecture. Always allow the host compiler in that case. Cc: qemu-stable@nongnu.org Fixes: c2118e9e1ab ("configure: don't try a "native" cross for linux-user", 2023-11-23) Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-20Merge tag 'pull-request-2023-12-20' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi35-111/+236
staging * Add compat machines for QEMU 9.0 * Some header clean-ups by Philippe * Restrict type names to alphanumerical range (and a few special characters) * Fix analyze-migration.py script on s390x * Clean up and improve some tests * Document handling of commas in CLI options parameters # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmWCtYsRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbWLnw//cNJrxG0V+j0iakX+C7HRumVrLBDI4KYY # Cp2Hx92SyeQ0Kk8DJS6JueTV0SLjMsV77APu2YPH7ELmPlk+CB9gqmV7xVoYNvsm # QbRPlIjFw8MHLekadc2A+C+pn48tWACoOdBEDIfazKrxybnf0B57RC/fIfMKHjbs # 2ALCoFbbgphs7yWuzTHK8ayKaGMhUVkWfzHQwpnq899olHyZBhkl951uKJA6VmLx # KvggePkpszLjmmXA8MH1hDCcizki31cB0ZKTbQFCyE42s2S3Hvg0GueU90O7Y1cj # lS5tPVQxyEhUYMLL+/hudlf2OYqVn2BalB7ieUQIy6rG8yoc9zxfIKQi0ccl+2oA # s8HRq5S0bSjtilQogU1LQL/Gk6W1/N9MmnhKvCGB+BTK5KX7s4EQk02y9gGZm/8s # pMErMyaXTG4dLiTAK42VgMVDqCYvzBmE+Gj91OmoUR7fb+VMrsWxeBFxMPDn+VtL # TMJegIFsjw2QCSitcU4v+nP0qtKgXGbuZtrGXKabrxH5PmeQFJDSM7TwpTK4qvjK # QMIQKBbz8BfJnUzN8qAaaJEpp1T5tcMJClKtfcgxq/+VyaSaHLmD0cljqBC+g+y7 # FTo+fa7oYx44sAlqapdEXBSGn4T+J26iuCef13CCCiPfYBv/tk3b2E0AWHj4y58I # +VpInjUaPBQ= # =TA1/ # -----END PGP SIGNATURE----- # gpg: Signature made Wed 20 Dec 2023 04:36:11 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-12-20' of https://gitlab.com/thuth/qemu: tests/unit/test-qmp-event: Replace fixture by global variables tests/unit/test-qmp-event: Simplify event emission check tests/unit/test-qmp-event: Drop superfluous mutex tests/qtest/npcm7xx_pwm-test: Only do full testing in slow mode qemu-options: Clarify handling of commas in options parameters tests/qtest/migration-test: Fix analyze-migration.py for s390x qom/object: Limit type names to alphanumerical and some few special characters tests/unit/test-io-task: Rename "qemu:dummy" to avoid colon in the name memory: Remove "qemu:" prefix from the "qemu:ram-discard-manager" type name hw: Replace anti-social QOM type names (again) docs/system/arm: Fix for rename of type "xlnx.bbram-ctrl" target: Restrict 'sysemu/reset.h' to system emulation hw/s390x/ipl: Remove unused 'exec/exec-all.h' included header hw/misc/mips_itu: Remove unnecessary 'exec/exec-all.h' header hw/ppc/spapr_hcall: Remove unused 'exec/exec-all.h' included header system/qtest: Restrict QTest API to system emulation system/qtest: Include missing 'hw/core/cpu.h' header MAINTAINERS: Add some more vmware-related files to the corresponding section hw: Add compat machines for 9.0 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-12-20Merge tag 'pull-target-arm-20231219' of ↵Stefan Hajnoczi16-1656/+1592
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * arm/kvm: drop the split between "common KVM support" and "64-bit KVM support", since 32-bit Arm KVM no longer exists * arm/kvm: clean up APIs to be consistent about CPU arguments * Don't implement *32_EL2 registers when EL1 is AArch64 only * Restrict DC CVAP & DC CVADP instructions to TCG accel * Restrict TCG specific helpers * Propagate MDCR_EL2.HPMN into PMCR_EL0.N * Include missing 'exec/exec-all.h' header * fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmWB6o0ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mxMEACRpRxJ81pLs8fFYC5BgRhU # BCxr+ZqarBygzsH9YWUN2TFFKlEZi7mLu6lzFsfN/qEmYCg8VslPbulQHqcGkx51 # kVxXFp/KuGlKt4zGRagZUJxgYAwwU5mnK6dTZT5/ZF6yWX67dXn8V7MP9lqqEPw5 # 5gut7Mu4f7MiAQbwZY1CWP+iu5uZmdsBuKxA6zkxOWJh/A1SfaqQRO6xVQttLAxS # DPMTpQGmwPS4I+3gGNnqlSu6etp2tdy2K0cW3fhMp6hx70uNMHmFNzRhT/6TaKka # 9AqXQsFHQiFXDGAm6PmCvfQI6KpLljDyNL/TuUkQWi72bGEHjUsJAdG0aXVOa30W # uC7vuJkdZrP/t5P1AkZhWQUrlawDRV2YHNDD+gY4fxJL/STkGyU6M8R1nm1J+InN # n0SeK0VHRC6DRPXCMQhC5QwKUH6ZjFZRs/r2opTu9p+ThQAQRmZBiVfdISCDMYnN # DCiSb78gIFaUkwtiP44qq8MJQjsHnXtTD1Akqyo2fXSKs66jDK9Gnc8gENYdpghe # 7V36bOp6scROHOB2a/r8gT42RKzSN6uh6xByaaToza63/bPgvHnn8vvQQbB01AgX # zJC1xs3dwY8JMyqDefda0K0NDPS8TzNsXYmgxxxcQJpUvB4VVjet9VIMF3T+d8HO # Pas41Z1gsQY+rcaRk/9mPA== # =GWIA # -----END PGP SIGNATURE----- # gpg: Signature made Tue 19 Dec 2023 14:10:05 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20231219' of https://git.linaro.org/people/pmaydell/qemu-arm: (43 commits) fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards target/arm/helper: Propagate MDCR_EL2.HPMN into PMCR_EL0.N target/arm/tcg: Including missing 'exec/exec-all.h' header target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel target/arm: Restrict TCG specific helpers target/arm: Don't implement *32_EL2 registers when EL1 is AArch64 only target/arm/kvm: Have kvm_arm_hw_debug_active take a ARMCPU argument target/arm/kvm: Have kvm_arm_handle_debug take a ARMCPU argument target/arm/kvm: Have kvm_arm_handle_dabt_nisv take a ARMCPU argument target/arm/kvm: Have kvm_arm_verify_ext_dabt_pending take a ARMCPU arg target/arm/kvm: Have kvm_arm_[get|put]_virtual_time take ARMCPU argument target/arm/kvm: Have kvm_arm_vcpu_finalize take a ARMCPU argument target/arm/kvm: Have kvm_arm_vcpu_init take a ARMCPU argument target/arm/kvm: Have kvm_arm_pmu_set_irq take a ARMCPU argument target/arm/kvm: Have kvm_arm_pmu_init take a ARMCPU argument target/arm/kvm: Have kvm_arm_pvtime_init take a ARMCPU argument target/arm/kvm: Have kvm_arm_set_device_attr take a ARMCPU argument target/arm/kvm: Have kvm_arm_sve_get_vls take a ARMCPU argument target/arm/kvm: Have kvm_arm_sve_set_vls take a ARMCPU argument target/arm/kvm: Have kvm_arm_add_vcpu_properties take a ARMCPU argument ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-12-20Merge tag 'pull-vfio-20231219' of https://github.com/legoater/qemu into stagingStefan Hajnoczi33-514/+2229
vfio queue: * Introduce an IOMMU interface backend for VFIO devices * Convert IOMMU type1 and sPAPR IOMMU to respective backends * Introduce a new IOMMUFD backend for ARM, x86_64 and s390x platforms # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmWB34AACgkQUaNDx8/7 # 7KGOMxAAqXegvAneHqIlu4c8TzTuUR2rkYgev9RdfIHRDuY2XtaX14xlWn/rpTXZ # qSgeta+iT8Cv4YV1POJeHWFDNs9E29p1w+R7nLcH1qTIIaZHtxwbVVQ3s7kAo1Vb # 1S1G0/zIznzGVI50a0lj1gO2yQJnu/79nXpnICgA5REW0CscMssnvboQODlwq17V # ZLNVM8CSAvKl6ppkmzRdfNXCfq6x7bf4MsvnuXsqda4TBbvyyTjAqdo/8sjKiGly # gSDQqhgy6cvEXIF0UUHPJzFApf0YdXUDlL8hzH90hvRVu4W/t24dPmT7UkVIX9Ek # TA7RVxv7iJlHtFDqfSTAJFr7nKO9Tm2V9N7xbD1OJUKrMoPZRT6+0R1hMKqsZ5z+ # nG6khqHGzuo/aI9n70YxYIPXt+vs/EHI4WUtslGLUTL0xv8lUzk6cxyIJupFRmDS # ix6GM9TXOV8RyOveL2knHVymlFnAR6dekkMB+6ljUTuzDwG0oco4vno8z9bi7Vct # j36bM56U3lhY+w+Ljoy0gPwgrw/FROnGG3mp1mwp1KRHqtEDnUQu8CaLbJOBsBGE # JJDP6AKAYMczdmYVkd4CvE0WaeSxtOUxW5H5NCPjtaFQt0qEcght2lA2K15g521q # jeojoJ/QK5949jnNCqm1Z66/YQVL79lPyL0E+mxEohwu+yTORk4= # =U0x5 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 19 Dec 2023 13:22:56 EST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [unknown] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20231219' of https://github.com/legoater/qemu: (47 commits) hw/ppc/Kconfig: Imply VFIO_PCI docs/devel: Add VFIO iommufd backend documentation vfio: Introduce a helper function to initialize VFIODevice vfio/ccw: Move VFIODevice initializations in vfio_ccw_instance_init vfio/ap: Move VFIODevice initializations in vfio_ap_instance_init vfio/platform: Move VFIODevice initializations in vfio_platform_instance_init vfio/pci: Move VFIODevice initializations in vfio_instance_init hw/i386: Activate IOMMUFD for q35 machines kconfig: Activate IOMMUFD for s390x machines hw/arm: Activate IOMMUFD for virt machines vfio: Make VFIOContainerBase poiner parameter const in VFIOIOMMUOps callbacks vfio/ccw: Make vfio cdev pre-openable by passing a file handle vfio/ccw: Allow the selection of a given iommu backend vfio/ap: Make vfio cdev pre-openable by passing a file handle vfio/ap: Allow the selection of a given iommu backend vfio/platform: Make vfio cdev pre-openable by passing a file handle vfio/platform: Allow the selection of a given iommu backend vfio/pci: Make vfio cdev pre-openable by passing a file handle vfio/pci: Allow the selection of a given iommu backend vfio/iommufd: Enable pci hot reset through iommufd cdev interface ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-12-20tests/unit/test-qmp-event: Replace fixture by global variablesMarkus Armbruster1-61/+30
The fixture buys us exactly nothing, as we need a global variable anyway, for test_qapi_event_emit(). Drop it. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231122072456.2518816-4-armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-12-20tests/unit/test-qmp-event: Simplify event emission checkMarkus Armbruster1-20/+10
The generated qapi_event_send_FOO() call an event emitter function. It's test_qapi_event_emit() in this test. It compares the actual event to the expected event, and sets a flag to record it was called. The test functions set expected data and clear the flag before calling qapi_event_send_FOO(), and check the flag afterwards. Make test_qapi_event_emit() consume expected data, and the test functions check it was consumed. Delete the flag. This is simpler. It also catches extraneous calls of test_qapi_event_emit(). Catching that is not worthwhile, but since the cost is negative... Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231122072456.2518816-3-armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-12-20tests/unit/test-qmp-event: Drop superfluous mutexMarkus Armbruster1-5/+0
Mutex @test_event_lock is held from fixture setup to teardown, protecting global variable @test_event_data. But tests always run one after the other, so this is superfluous. It also confuses Coverity. Drop the mutex. Fixes: CID 1527425 Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231122072456.2518816-2-armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-12-20tests/qtest/npcm7xx_pwm-test: Only do full testing in slow modeThomas Huth1-3/+10
The npcm7xx_pwm-test can take quite a while when running with --enable-debug on a loaded system. The tests here are quite repetitive - by default it should be fine if we only execute some of them and only execute all when running in slow testing mode. Message-ID: <20231215143524.49241-1-thuth@redhat.com> Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-12-20qemu-options: Clarify handling of commas in options parametersYihuan Pan3-0/+14
Provide explicit guidance on dealing with option parameters as arbitrary strings containing commas, such as in "file=my,file" and "string=a,b". The updated documentation emphasizes the need to double commas when they appear within such parameters. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1839 Signed-off-by: Yihuan Pan <xun794@gmail.com> Message-ID: <20231213141706.629833-2-xun794@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.1 at 2024-09-18 14:54:07 +0000