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2019-11-06linux-user: Introduce cpu_clone_regs_parentRichard Henderson19-0/+74
We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user: Rename cpu_clone_regs to cpu_clone_regs_childRichard Henderson19-20/+40
We will need a target-specific hook for adjusting registers in the parent during clone. To avoid confusion, rename the one we have to make it clear it affects the child. At the same time, pass in the flags from the clone syscall. We will need them for correct behaviour for Sparc. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-10-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc64: Fix target_signal_frameRichard Henderson1-2/+2
Instructions are always 4 bytes; use uint32_t not abi_ulong. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-9-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Fix WREG usage in setup_frameRichard Henderson1-1/+1
Use WREG_I0 not WREG_O0 in order to properly save the "ins". The "outs" were saved separately in setup___siginfo. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191106113318.10226-8-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Use WREG_SP constant in sparc/signal.cRichard Henderson1-5/+2
s/UREG_FP/WREG_SP/g This is non-obvious because the UREG_FP constant is fact wrong. However, the previous search-and-replace patch made it clear that UREG_FP expands to WREG_O6, and we can see from the enumeration in target/sparc/cpu.h that WREG_O6 is in fact WREG_SP, the stack pointer. The UREG_SP define is unused; remove it. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-7-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Begin using WREG constants in sparc/signal.cRichard Henderson1-62/+33
This is non-obvious because the UREG constants are in fact wrong. s/UREG_I/WREG_O/g s/UREG_O/WREG_I/g s/UREG_L/WREG_L/g These substitutions have identical integer values. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-6-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06linux-user/sparc: Use WREG constants in sparc/target_cpu.hRichard Henderson1-8/+2
This fixes a naming bug wherein we used "UREG_FP" to access the stack pointer. OTOH, the "UREG_FP" constant was also defined incorrectly such that it *did* reference the stack pointer. Note that the kernel legitimately uses the name "FP", because it utilizes the rolled stack window in processing the system call. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20191106113318.10226-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06target/sparc: Define an enumeration for accessing env->regwptrRichard Henderson1-0/+33
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191106113318.10226-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06tests/tcg/multiarch/linux-test: Fix error check for shmatRichard Henderson1-1/+2
The error indicator for this syscall is -1, not 0. Fixes: e374bfa35bfb ("shm tests - disabled clone test") Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-06scripts/qemu-binfmt-conf: Update for sparc64Richard Henderson1-2/+6
Also note that we were missing the qemu_target_list entry for plain sparc; fix that at the same time. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191106113318.10226-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-05linux-user: Support for NETLINK socket optionsJosh Kunz1-0/+101
This change includes support for all AF_NETLINK socket options up to about kernel version 5.4 (5.4 is not formally released at the time of writing). Socket options that were introduced in kernel versions before the oldest currently stable kernel version are guarded by kernel version macros. This change has been built under gcc 8.3, and clang 9.0, and it passes `make check`. The netlink options have been tested by emulating some non-trival software that uses NETLINK socket options, but they have not been exaustively verified. Signed-off-by: Josh Kunz <jkz@google.com> Message-Id: <20191029224310.164025-1-jkz@google.com> [lv: updated patch according to CODING_STYLE] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-02Merge remote-tracking branch 'remotes/palmer/tags/palmer-for-master-4.2-sf1' ↵Peter Maydell1-2/+2
into staging Update my MAINTAINERS file entry This contains a single patch to change my email address. # gpg: Signature made Fri 01 Nov 2019 16:14:45 GMT # gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/palmer/tags/palmer-for-master-4.2-sf1: MAINTAINERS: Change to my personal email address Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-02Merge remote-tracking branch ↵Peter Maydell16-59/+1798
'remotes/pmaydell/tags/pull-target-arm-20191101-2' into staging target-arm queue: * Support SVE in KVM guests * Don't UNDEF on M-profile 'vmrs apsr_nzcv, fpscr' * Update hflags after boot.c modifies CPU state # gpg: Signature made Sat 02 Nov 2019 10:38:59 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20191101-2: target/arm: Allow reading flags from FPSCR for M-profile hw/arm/boot: Rebuild hflags when modifying CPUState at boot target/arm/kvm: host cpu: Add support for sve<N> properties target/arm/cpu64: max cpu: Support sve properties with KVM target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features target/arm/kvm64: max cpu: Enable SVE when available target/arm/kvm64: Add kvm_arch_get/put_sve target/arm/cpu64: max cpu: Introduce sve<N> properties target/arm: Allow SVE to be disabled via a CPU property tests: arm: Introduce cpu feature tests target/arm/monitor: Introduce qmp_query_cpu_model_expansion Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm: Allow reading flags from FPSCR for M-profileChristophe Lyon1-2/+3
rt==15 is a special case when reading the flags: it means the destination is APSR. This patch avoids rejecting vmrs apsr_nzcv, fpscr as illegal instruction. Cc: qemu-stable@nongnu.org Signed-off-by: Christophe Lyon <christophe.lyon@linaro.org> Message-id: 20191025095711.10853-1-christophe.lyon@linaro.org [PMM: updated the comment] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01hw/arm/boot: Rebuild hflags when modifying CPUState at bootEdgar E. Iglesias1-0/+1
Rebuild hflags when modifying CPUState at boot. Fixes: e979972a6a Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20191031040830.18800-2-edgar.iglesias@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm/kvm: host cpu: Add support for sve<N> propertiesAndrew Jones6-33/+55
Allow cpu 'host' to enable SVE when it's available, unless the user chooses to disable it with the added 'sve=off' cpu property. Also give the user the ability to select vector lengths with the sve<N> properties. We don't adopt 'max' cpu's other sve property, sve-max-vq, because that property is difficult to use with KVM. That property assumes all vector lengths in the range from 1 up to and including the specified maximum length are supported, but there may be optional lengths not supported by the host in that range. With KVM one must be more specific when enabling vector lengths. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Message-id: 20191031142734.8590-10-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm/cpu64: max cpu: Support sve properties with KVMAndrew Jones5-56/+377
Extend the SVE vq map initialization and validation with KVM's supported vector lengths when KVM is enabled. In order to determine and select supported lengths we add two new KVM functions for getting and setting the KVM_REG_ARM64_SVE_VLS pseudo-register. This patch has been co-authored with Richard Henderson, who reworked the target/arm/cpu64.c changes in order to push all the validation and auto-enabling/disabling steps into the finalizer, resulting in a nice LOC reduction. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Message-id: 20191031142734.8590-9-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init featuresAndrew Jones3-7/+25
kvm_arm_create_scratch_host_vcpu() takes a struct kvm_vcpu_init parameter. Rather than just using it as an output parameter to pass back the preferred target, use it also as an input parameter, allowing a caller to pass a selected target if they wish and to also pass cpu features. If the caller doesn't want to select a target they can pass -1 for the target which indicates they want to use the preferred target and have it passed back like before. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Reviewed-by: Beata Michalska <beata.michalska@linaro.org> Message-id: 20191031142734.8590-8-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm/kvm64: max cpu: Enable SVE when availableAndrew Jones5-4/+69
Enable SVE in the KVM guest when the 'max' cpu type is configured and KVM supports it. KVM SVE requires use of the new finalize vcpu ioctl, so we add that now too. For starters SVE can only be turned on or off, getting all vector lengths the host CPU supports when on. We'll add the other SVE CPU properties in later patches. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Reviewed-by: Beata Michalska <beata.michalska@linaro.org> Message-id: 20191031142734.8590-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm/kvm64: Add kvm_arch_get/put_sveAndrew Jones1-28/+155
These are the SVE equivalents to kvm_arch_get/put_fpsimd. Note, the swabbing is different than it is for fpsmid because the vector format is a little-endian stream of words. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Message-id: 20191031142734.8590-6-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm/cpu64: max cpu: Introduce sve<N> propertiesAndrew Jones8-9/+606
Introduce cpu properties to give fine control over SVE vector lengths. We introduce a property for each valid length up to the current maximum supported, which is 2048-bits. The properties are named, e.g. sve128, sve256, sve384, sve512, ..., where the number is the number of bits. See the updates to docs/arm-cpu-features.rst for a description of the semantics and for example uses. Note, as sve-max-vq is still present and we'd like to be able to support qmp_query_cpu_model_expansion with guests launched with e.g. -cpu max,sve-max-vq=8 on their command lines, then we do allow sve-max-vq and sve<N> properties to be provided at the same time, but this is not recommended, and is why sve-max-vq is not mentioned in the document. If sve-max-vq is provided then it enables all lengths smaller than and including the max and disables all lengths larger. It also has the side-effect that no larger lengths may be enabled and that the max itself cannot be disabled. Smaller non-power-of-two lengths may, however, be disabled, e.g. -cpu max,sve-max-vq=4,sve384=off provides a guest the vector lengths 128, 256, and 512 bits. This patch has been co-authored with Richard Henderson, who reworked the target/arm/cpu64.c changes in order to push all the validation and auto-enabling/disabling steps into the finalizer, resulting in a nice LOC reduction. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Reviewed-by: Beata Michalska <beata.michalska@linaro.org> Message-id: 20191031142734.8590-5-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm: Allow SVE to be disabled via a CPU propertyAndrew Jones4-9/+49
Since 97a28b0eeac14 ("target/arm: Allow VFP and Neon to be disabled via a CPU property") we can disable the 'max' cpu model's VFP and neon features, but there's no way to disable SVE. Add the 'sve=on|off' property to give it that flexibility. We also rename cpu_max_get/set_sve_vq to cpu_max_get/set_sve_max_vq in order for them to follow the typical *_get/set_<property-name> pattern. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Reviewed-by: Beata Michalska <beata.michalska@linaro.org> Message-id: 20191031142734.8590-4-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01MAINTAINERS: Change to my personal email addressPalmer Dabbelt1-2/+2
I'm leaving SiFive in a bit less than two weeks, which means I'll be losing my @sifive email address. I don't have my new email address yet, so I'm switching over to my personal address. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2019-11-01tests: arm: Introduce cpu feature testsAndrew Jones2-1/+265
Now that Arm CPUs have advertised features lets add tests to ensure we maintain their expected availability with and without KVM. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20191031142734.8590-3-drjones@redhat.com [PMM: squash in fix to avoid failure on aarch32-compat] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-01target/arm/monitor: Introduce qmp_query_cpu_model_expansionAndrew Jones3-3/+286
Add support for the query-cpu-model-expansion QMP command to Arm. We do this selectively, only exposing CPU properties which represent optional CPU features which the user may want to enable/disable. Additionally we restrict the list of queryable cpu models to 'max', 'host', or the current type when KVM is in use. And, finally, we only implement expansion type 'full', as Arm does not yet have a "base" CPU type. More details and example queries are described in a new document (docs/arm-cpu-features.rst). Note, certainly more features may be added to the list of advertised features, e.g. 'vfp' and 'neon'. The only requirement is that we can detect invalid configurations and emit failures at QMP query time. For 'vfp' and 'neon' this will require some refactoring to share a validation function between the QMP query and the CPU realize functions. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Beata Michalska <beata.michalska@linaro.org> Message-id: 20191031142734.8590-2-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-31Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into stagingPeter Maydell13-43/+753
Pull request # gpg: Signature made Thu 31 Oct 2019 15:55:44 GMT # gpg: using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full] # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jnsnow/tags/ide-pull-request: hd-geo-test: Add tests for lchs override bootdevice: FW_CFG interface for LCHS values bootdevice: Refactor get_boot_devices_list bootdevice: Gather LCHS from all relevant devices scsi: Propagate unrealize() callback to scsi-hd bootdevice: Add interface to gather LCHS block: Support providing LCHS from user block: Refactor macros - fix tabbing IDE: deprecate ide-drive Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-31hd-geo-test: Add tests for lchs overrideSam Eiderman2-1/+552
Add QTest tests to check the logical geometry override option. The tests in hd-geo-test are out of date - they only test IDE and do not test interesting MBRs. Creating qcow2 disks with specific size and MBR layout is currently unused - we only use a default empty MBR. Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31bootdevice: FW_CFG interface for LCHS valuesSam Eiderman3-3/+43
Using fw_cfg, supply logical CHS values directly from QEMU to the BIOS. Non-standard logical geometries break under QEMU. A virtual disk which contains an operating system which depends on logical geometries (consistent values being reported from BIOS INT13 AH=08) will most likely break under QEMU/SeaBIOS if it has non-standard logical geometries - for example 56 SPT (sectors per track). No matter what QEMU will report - SeaBIOS, for large enough disks - will use LBA translation, which will report 63 SPT instead. In addition we cannot force SeaBIOS to rely on physical geometries at all. A virtio-blk-pci virtual disk with 255 phyiscal heads cannot report more than 16 physical heads when moved to an IDE controller, since the ATA spec allows a maximum of 16 heads - this is an artifact of virtualization. By supplying the logical geometries directly we are able to support such "exotic" disks. We serialize this information in a similar way to the "bootorder" interface. The new fw_cfg entry is "bios-geometry". Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31bootdevice: Refactor get_boot_devices_listSam Eiderman1-27/+34
Move device name construction to a separate function. We will reuse this function in the following commit to pass logical CHS parameters through fw_cfg much like we currently pass bootindex. Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31bootdevice: Gather LCHS from all relevant devicesSam Eiderman3-0/+23
Relevant devices are: * ide-hd (and ide-cd, ide-drive) * scsi-hd (and scsi-cd, scsi-disk, scsi-block) * virtio-blk-pci We do not call del_boot_device_lchs() for ide-* since we don't need to - IDE block devices do not support unplugging. Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31scsi: Propagate unrealize() callback to scsi-hdSam Eiderman2-0/+17
We will need to add LCHS removal logic to scsi-hd's unrealize() in the next commit. Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31bootdevice: Add interface to gather LCHSSam Eiderman2-0/+58
Add an interface to provide direct logical CHS values for boot devices. We will use this interface in the next commits. Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31block: Support providing LCHS from userSam Eiderman1-1/+5
Add logical geometry variables to BlockConf. A user can now supply "lcyls", "lheads" & "lsecs" for any HD device that supports CHS ("cyls", "heads", "secs"). These devices include: * ide-hd * scsi-hd * virtio-blk-pci In future commits we will use the provided LCHS and pass it to the BIOS through fw_cfg to be supplied using INT13 routines. Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31iotests: Remove 130 from the "auto" groupThomas Huth1-1/+1
Peter hit a "Could not open 'TEST_DIR/t.IMGFMT': Failed to get shared 'write' lock - Is another process using the image [TEST_DIR/t.IMGFMT]?" error with 130 already twice. Looks like this test is a little bit shaky, and currently nobody has a real clue what could be causing this issue, so for the time being, let's disable it from the "auto" group so that it does not gate the pull requests. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-31Merge remote-tracking branch ↵Peter Maydell2-5/+8
'remotes/stsquad/tags/pull-testing-next-311019-1' into staging Fixes to get CI green again - fix m68k acceptance tests (Cleber) - stop build breakage (Daniel) # gpg: Signature made Thu 31 Oct 2019 10:00:53 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-next-311019-1: Acceptance test: update kernel for m68k/q800 test Acceptance test: cancel test if m68k kernel packages goes missing tests: fix conditional for disabling XTS test Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-31Acceptance test: update kernel for m68k/q800 testCleber Rosa1-3/+3
There's an updated version of the Debian package containing the m68k Kernel. Now, if the package gets updated again, the test won't fail, but will be canceled. A more permanent solution is certainly needed. Signed-off-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20191029232320.12419-3-crosa@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-10-31Acceptance test: cancel test if m68k kernel packages goes missingCleber Rosa1-1/+4
The Linux kernel that is extracted from a Debian package for the q800 machine test is hosted on a "pool" location. AFAICT, it gets updated without too much ceremony, and I don't see any archival location that is stable enough. For now, to avoid test errors, let's cancel the test if fetching the package fails. Signed-off-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20191029232320.12419-2-crosa@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-10-31tests: fix conditional for disabling XTS testDaniel P. Berrangé1-1/+1
The intent is to only enable the XTS test if both CONFIG_BLOCK and CONFIG_QEMU_PRIVATE_XTS are set to 'y'. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20191030151740.14326-1-berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-10-31block: Refactor macros - fix tabbingSam Eiderman2-9/+9
Fixing tabbing in block related macros. Signed-off-by: Sam Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Sam Eiderman <sameid@google.com> Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com> Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31IDE: deprecate ide-driveJohn Snow3-2/+12
It's an old compatibility shim that just delegates to ide-cd or ide-hd. I'd like to refactor these some day, and getting rid of the super-object will make that easier. Either way, we don't need this. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> ACKed-by: Peter Krempa <pkrempa@redhat.com> Message-id: 20191009224303.10232-2-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2019-10-31Merge remote-tracking branch 'remotes/rth/tags/pull-sfp-20191030' into stagingPeter Maydell1-1/+18
Use hardfloat for float32_to_float64 # gpg: Signature made Wed 30 Oct 2019 18:06:19 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-sfp-20191030: softfp: Added hardfloat conversion from float32 to float64 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-30softfp: Added hardfloat conversion from float32 to float64Matus Kysel1-1/+18
Reintroduce float32_to_float64 that was removed here: https://lists.gnu.org/archive/html/qemu-devel/2018-04/msg00455.html - nbench test it not actually calling this function at all - SPECS 2006 significat number of tests impoved their runtime, just few of them showed small slowdown Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matus Kysel <mkysel@tachyum.com> Message-Id: <20191017142133.59439-1-mkysel@tachyum.com> [rth: Add comment about impossible inexact exceptions.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-10-30Merge remote-tracking branch ↵Peter Maydell92-165/+5168
'remotes/stsquad/tags/pull-tcg-plugins-281019-4' into staging TCG Plugins initial implementation - use --enable-plugins @ configure - low impact introspection (-plugin empty.so to measure overhead) - plugins cannot alter guest state - example plugins included in source tree (tests/plugins) - -d plugin to enable plugin output in logs - check-tcg runs extra tests when plugins enabled - documentation in docs/devel/plugins.rst # gpg: Signature made Mon 28 Oct 2019 15:13:23 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-tcg-plugins-281019-4: (57 commits) travis.yml: enable linux-gcc-debug-tcg cache MAINTAINERS: add me for the TCG plugins code scripts/checkpatch.pl: don't complain about (foo, /* empty */) .travis.yml: add --enable-plugins tests include/exec: wrap cpu_ldst.h in CONFIG_TCG accel/stubs: reduce headers from tcg-stub tests/plugin: add hotpages to analyse memory access patterns tests/plugin: add instruction execution breakdown tests/plugin: add a hotblocks plugin tests/tcg: enable plugin testing tests/tcg: drop test-i386-fprem from TESTS when not SLOW tests/tcg: move "virtual" tests to EXTRA_TESTS tests/tcg: set QEMU_OPTS for all cris runs tests/tcg/Makefile.target: fix path to config-host.mak tests/plugin: add sample plugins linux-user: support -plugin option vl: support -plugin option plugin: add qemu_plugin_outs helper plugin: add qemu_plugin_insn_disas helper plugin: expand the plugin_init function to include an info block ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-30Merge remote-tracking branch 'remotes/cleber/tags/python-next-pull-request' ↵Peter Maydell8-58/+308
into staging Python (acceptance tests) queue, 2019-10-28 # gpg: Signature made Mon 28 Oct 2019 23:43:11 GMT # gpg: using RSA key 7ABB96EB8B46B94D5E0FE9BB657E8D33A5F209F3 # gpg: Good signature from "Cleber Rosa <crosa@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 7ABB 96EB 8B46 B94D 5E0F E9BB 657E 8D33 A5F2 09F3 * remotes/cleber/tags/python-next-pull-request: tests/boot_linux_console: Run BusyBox on 5KEc 64-bit cpu tests/boot_linux_console: Add initrd test for the Exynos4210 tests/boot_linux_console: Add a test for the Raspberry Pi 2 tests/boot_linux_console: Use Avocado archive::gzip_uncompress() .travis.yml: Let the avocado job run the 40p tests tests/acceptance: Test OpenBIOS on the PReP/40p tests/acceptance: Add test that runs NetBSD 4.0 installer on PRep/40p .travis.yml: Let the avocado job run the Leon3 test tests/acceptance: Add test that boots the HelenOS microkernel on Leon3 tests/acceptance: Refactor exec_command_and_wait_for_pattern() tests/acceptance: Send <carriage return> on serial lines tests/acceptance: Fix wait_for_console_pattern() hangs Acceptance tests: refactor wait_for_console_pattern Python libs: close console sockets before shutting down the VMs Acceptance tests: work around socket dir MAINTAINERS: update location of Python libraries Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-30Merge remote-tracking branch 'remotes/stsquad/tags/pull-gitdm-next-271019-1' ↵Peter Maydell2-0/+3
into staging gitdm updates - Add a few individuals - Add China Mobile # gpg: Signature made Sun 27 Oct 2019 19:21:15 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-gitdm-next-271019-1: contrib/gitdm: add China Mobile to the domain map contrib/gitdm: add Andrey to the individual group contrib/gitdm: add Emanuele as an individual Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-30Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell24-65/+673
virtio: features, cleanups virtio net failover rcu cleanup Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 29 Oct 2019 22:58:14 GMT # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: virtio: Use auto rcu_read macros virtio_net: use RCU_READ_LOCK_GUARD virtio/vhost: Use auto_rcu_read macros vfio: unplug failover primary device before migration net/virtio: add failover support libqos: tolerate wait-unplug migration state migration: add new migration state wait-unplug migration: allow unplug during migration for failover devices qapi: add failover negotiated event qapi: add unplug primary event pci: mark device having guest unplug request pending pci: mark devices partially unplugged pci: add option for net failover qdev/qbus: add hidden device support Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-10-29virtio: Use auto rcu_read macrosDr. David Alan Gilbert1-42/+23
Use RCU_READ_LOCK_GUARD and WITH_RCU_READ_LOCK_GUARD to replace the manual rcu_read_(un)lock calls. I think the only change is virtio_load which was missing unlocks in error paths; those end up being fatal errors so it's not that important anyway. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20191028161109.60205-1-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-10-29virtio_net: use RCU_READ_LOCK_GUARDDr. David Alan Gilbert1-5/+2
Use RCU_READ_LOCK_GUARD rather than the manual rcu_read_(un)lock call. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20191025103403.120616-3-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-10-29virtio/vhost: Use auto_rcu_read macrosDr. David Alan Gilbert1-3/+1
Use RCU_READ_LOCK_GUARD instead of manual rcu_read_(un)lock Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20191025103403.120616-2-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-10-29vfio: unplug failover primary device before migrationJens Freimann2-6/+21
As usual block all vfio-pci devices from being migrated, but make an exception for failover primary devices. This is achieved by setting unmigratable to 0 but also add a migration blocker for all vfio-pci devices except failover primary devices. These will be unplugged before migration happens by the migration handler of the corresponding virtio-net standby device. Signed-off-by: Jens Freimann <jfreimann@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Message-Id: <20191029114905.6856-12-jfreimann@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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