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2016-06-07Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160607' into...Peter Maydell21-127/+388
2016-06-07ppc: Do not take exceptions on unknown SPRs in privileged modeBenjamin Herrenschmidt1-2/+9
2016-06-07ppc: Add missing slbfee. instruction on ppc64 BookS processorsBenjamin Herrenschmidt3-0/+57
2016-06-07ppc: Fix slbia decodeBenjamin Herrenschmidt1-1/+1
2016-06-07ppc: Fix mtmsr decodingBenjamin Herrenschmidt1-1/+1
2016-06-07ppc: POWER7 has lq/stq instructions and stq need to check ISABenjamin Herrenschmidt2-2/+5
2016-06-07ppc: POWER7 had ACOP and PID registersBenjamin Herrenschmidt1-0/+18
2016-06-07ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash modeBenjamin Herrenschmidt4-44/+31
2016-06-07ppc: Fix tlb invalidations on 6xx/7xx/7xxx 32-bit processorsBenjamin Herrenschmidt1-0/+8
2016-06-07ppc: Properly tag the translation cache based on MMU modeBenjamin Herrenschmidt1-1/+1
2016-06-07dbdma: use DMA memory interface for memory accessesMark Cave-Ayland1-6/+7
2016-06-07macio: use DMA memory interface for non-block ATAPI transfersMark Cave-Ayland1-1/+2
2016-06-07target-ppc: fixup bitrot in mmu_helper.c debug statementsMark Cave-Ayland1-14/+24
2016-06-07spapr_pci: Drop cannot_instantiate_with_device_add_yet=falseMarkus Armbruster1-1/+0
2016-06-07ppc: fix hrfid, tlbia and slbia privilegeCédric Le Goater1-3/+3
2016-06-07ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HVBenjamin Herrenschmidt2-4/+8
2016-06-07ppc: Better figure out if processor has HV modeBenjamin Herrenschmidt3-5/+22
2016-06-07spapr: Introduce pseries-2.7 machine typeBharata B Rao1-2/+20
2016-06-07spapr: Increase hotpluggable memory slots to 256Bharata B Rao1-2/+12
2016-06-07spapr_pci: Add and export DMA resetting helperAlexey Kardashevskiy2-2/+10
2016-06-07spapr_pci: Reset DMA config on PHB resetAlexey Kardashevskiy1-6/+11
2016-06-07spapr_iommu: Add root memory regionAlexey Kardashevskiy3-7/+14
2016-06-07spapr_iommu: Migrate full stateAlexey Kardashevskiy3-3/+67
2016-06-07spapr_iommu: Introduce "enabled" state for TCE tableAlexey Kardashevskiy4-37/+56
2016-06-07vmstate: Define VARRAY with VMS_ALLOCAlexey Kardashevskiy1-0/+10
2016-06-07kvm: API to obtain max supported mem slotsBharata B Rao2-0/+8
2016-06-07target-ppc/fpu_helper: Fix efscmp* instructions handlingTalha Imran1-1/+1
2016-06-06Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160606-...Peter Maydell41-213/+1125
2016-06-06zynqmp: Add the ZCU102 boardAlistair Francis1-0/+8
2016-06-06target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translationSergey Sorokin1-16/+22
2016-06-06char: get rid of qemu_char_get_next_serialxiaoqiang zhao2-17/+0
2016-06-06hw/char: QOM'ify xilinx_uartlite modelxiaoqiang zhao3-6/+44
2016-06-06hw/char: QOM'ify stm32f2xx_usart modelxiaoqiang zhao2-4/+12
2016-06-06hw/char: QOM'ify digic-uart modelxiaoqiang zhao2-4/+8
2016-06-06hw/char: QOM'ify cadence_uart modelxiaoqiang zhao4-8/+28
2016-06-06hw/char: QOM'ify pl011 modelxiaoqiang zhao10-35/+86
2016-06-06hw/ptimer: Introduce ptimer_get_limitDmitry Osipenko2-0/+6
2016-06-06hw/ptimer: Support "on the fly" timer mode switchDmitry Osipenko1-6/+7
2016-06-06hw/ptimer: Update .delta on period/freq changeDmitry Osipenko1-0/+2
2016-06-06hw/ptimer: Perform counter wrap around if timer already expiredDmitry Osipenko1-6/+13
2016-06-06hw/ptimer: Fix issues caused by the adjusted timer limit valueDmitry Osipenko1-20/+31
2016-06-06xlnx-zynqmp: Use the in kernel GIC model for KVM runsEdgar E. Iglesias1-1/+3
2016-06-06xlnx-zynqmp: Delay realization of GIC until post CPU realizationEdgar E. Iglesias1-25/+31
2016-06-06xlnx-zynqmp: Make the RPU subsystem optionalEdgar E. Iglesias2-24/+40
2016-06-06xlnx-zynqmp: Add a secure prop to en/disable ARM Security ExtensionsEdgar E. Iglesias2-0/+6
2016-06-06hw/arm/virt: Reject gic-version=host for non-KVMCole Robinson1-1/+5
2016-06-06i2c: add aspeed i2c controllerCédric Le Goater5-0/+521
2016-06-06hw/intc/gic: RAZ/WI non-sec access to sec interruptsJens Wiklander1-6/+62
2016-06-06hw/arm/virt: fix limit of 64-bit ACPI/ECAM PCI MMIO rangeArd Biesheuvel1-1/+2
2016-06-06target-arm: Don't try to set ESR IL bit in arm_cpu_do_interrupt_aarch64()Peter Maydell1-3/+0