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2020-06-09net: Do not include a newline in the id of -nic devicesThomas Huth1-1/+1
The '\n' sneaked in by accident here, an "id" string should really not contain a newline character at the end. Fixes: 78cd6f7bf6b ('net: Add a new convenience option "--nic" ...') Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200518074352.23125-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-09Fix parameter type in vhost migration log pathRaphael Norwitz1-2/+2
The ‘enable’ parameter to the vhost_migration_log() function is given as an int, but "true"/"false" values are passed in wherever it is invoked. Inside the function itself it is only ever compared with bool values. Therefore the parameter value itself should be changed to bool. Signed-off-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <CAFubqFtqNZw=Y-ar3N=3zTQi6LkKg_G-7W7OOHHbE7Y1fV7HAQ@mail.gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-08Merge remote-tracking branch ↵Peter Maydell16-73/+143
'remotes/vivier2/tags/linux-user-for-5.1-pull-request' into staging linux-user pull request 20200605-v2 Implement F_OFD_ fcntl() command, /proc/cpuinfo for hppa Fix socket(), prnctl() error codes, underflow in target_mremap, epoll_create() strace, oldumount for alpha User-mode build dependencies improvement # gpg: Signature made Sat 06 Jun 2020 14:15:36 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-5.1-pull-request: stubs: Restrict ui/win32-kbd-hook to system-mode hw/core: Restrict CpuClass::get_crash_info() to system-mode target/s390x: Restrict CpuClass::get_crash_info() to system-mode target/i386: Restrict CpuClass::get_crash_info() to system-mode arch_init: Remove unused 'qapi-commands-misc.h' include exec: Assert CPU migration is not used on user-only build target/riscv/cpu: Restrict CPU migration to system-mode stubs/Makefile: Reduce the user-mode object list util/Makefile: Reduce the user-mode object list tests/Makefile: Restrict some softmmu-only tests tests/Makefile: Only display TCG-related tests when TCG is available configure: Avoid building TCG when not needed Makefile: Only build virtiofsd if system-mode is enabled linux-user: implement OFD locks linux-user/mmap.c: fix integer underflow in target_mremap linux-user/strace.list: fix epoll_create{,1} -strace output linux-user: Add support for /proc/cpuinfo on hppa platform linux-user: return target error codes for socket() and prctl() linux-user, alpha: fix oldumount syscall Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05Merge remote-tracking branch ↵Peter Maydell28-915/+4263
'remotes/pmaydell/tags/pull-target-arm-20200605' into staging target-arm queue: hw/ssi/imx_spi: Handle tx burst lengths other than 8 correctly hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask() hw/arm/pxa2xx: Replace printf() call by qemu_log_mask() target/arm: Convert crypto insns to gvec hw/adc/stm32f2xx_adc: Correct memory region size and access size tests/acceptance: Add a boot test for the xlnx-versal-virt machine docs/system: Document Aspeed boards raspi: Add model of the USB controller target/arm: Convert 2-reg-and-shift and 1-reg-imm Neon insns to decodetree # gpg: Signature made Fri 05 Jun 2020 17:48:39 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200605: (29 commits) target/arm: Convert Neon one-register-and-immediate insns to decodetree target/arm: Convert VCVT fixed-point ops to decodetree target/arm: Convert Neon VSHLL, VMOVL to decodetree target/arm: Convert Neon narrowing shifts with op==9 to decodetree target/arm: Convert Neon narrowing shifts with op==8 to decodetree target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host wire in the dwc-hsotg (dwc2) USB host controller emulation usb: add short-packet handling to usb-storage driver dwc-hsotg (dwc2) USB host controller emulation dwc-hsotg (dwc2) USB host controller state definitions dwc-hsotg (dwc2) USB host controller register definitions raspi: add BCM2835 SOC MPHI emulation docs/system: Document Aspeed boards tests/acceptance: Add a boot test for the xlnx-versal-virt machine hw/adc/stm32f2xx_adc: Correct memory region size and access size target/arm: Split helper_crypto_sm3tt ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05stubs: Restrict ui/win32-kbd-hook to system-modePhilippe Mathieu-Daudé1-1/+1
In Makefile.objs, the ui/ directory is restricted to system-mode: 43 ifeq ($(CONFIG_SOFTMMU),y) ... 65 common-obj-y += ui/ 66 common-obj-m += ui/ ... 82 endif # CONFIG_SOFTMMU Restrict the ui/ stub added in commit 2df9f5718df to only build it for system-mode emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200522172510.25784-14-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05hw/core: Restrict CpuClass::get_crash_info() to system-modePhilippe Mathieu-Daudé2-1/+8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-13-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05target/s390x: Restrict CpuClass::get_crash_info() to system-modePhilippe Mathieu-Daudé1-7/+5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-12-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05target/i386: Restrict CpuClass::get_crash_info() to system-modePhilippe Mathieu-Daudé1-1/+5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-11-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05arch_init: Remove unused 'qapi-commands-misc.h' includePhilippe Mathieu-Daudé1-1/+0
Commit ffaee83bcb2 moved qmp_query_target but forgot to remove this include. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-10-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05exec: Assert CPU migration is not used on user-only buildPhilippe Mathieu-Daudé1-1/+3
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-9-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05target/riscv/cpu: Restrict CPU migration to system-modePhilippe Mathieu-Daudé1-2/+4
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-8-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05stubs/Makefile: Reduce the user-mode object listPhilippe Mathieu-Daudé1-21/+29
These stubs are not required when configured with --disable-system. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-7-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05util/Makefile: Reduce the user-mode object listPhilippe Mathieu-Daudé1-21/+38
These objects are not required when configured with --disable-system. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-6-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05tests/Makefile: Restrict some softmmu-only testsPhilippe Mathieu-Daudé1-8/+8
In the next commit we are going to remove some objects from the util-obj-y variable (objects which are not used by user-mode, when configured with --disable-system). Then some system-mode tests are going to fail, due to the missing objects: $ make check-unit -k LINK tests/test-iov /usr/bin/ld: tests/test-iov.o: in function `iov_from_buf': include/qemu/iov.h:49: undefined reference to `iov_from_buf_full' make: *** [rules.mak:124: tests/test-iov] Error 1 LINK tests/test-timed-average /usr/bin/ld: tests/test-timed-average.o: in function `account': tests/test-timed-average.c:27: undefined reference to `timed_average_account' make: *** [rules.mak:124: tests/test-timed-average] Error 1 LINK tests/test-util-filemonitor /usr/bin/ld: tests/test-util-filemonitor.o: in function `qemu_file_monitor_test_event_loop': tests/test-util-filemonitor.c:83: undefined reference to `main_loop_wait' make: *** [rules.mak:124: tests/test-util-filemonitor] Error 1 LINK tests/test-util-sockets /usr/bin/ld: tests/test-util-sockets.o: in function `test_socket_fd_pass_name_good': tests/test-util-sockets.c:91: undefined reference to `socket_connect' make: *** [rules.mak:124: tests/test-util-sockets] Error 1 LINK tests/test-base64 /usr/bin/ld: tests/test-base64.o: in function `test_base64_good': tests/test-base64.c:35: undefined reference to `qbase64_decode' collect2: error: ld returned 1 exit status make: *** [rules.mak:124: tests/test-base64] Error 1 LINK tests/test-bufferiszero /usr/bin/ld: tests/test-bufferiszero.o: in function `test_1': tests/test-bufferiszero.c:31: undefined reference to `buffer_is_zero' make: *** [rules.mak:124: tests/test-bufferiszero] Error 1 make: Target 'check-unit' not remade because of errors. Instead, restrict these tests to system-mode, by using the $(CONFIG_SOFTMMU) variable. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-5-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05tests/Makefile: Only display TCG-related tests when TCG is availablePhilippe Mathieu-Daudé1-0/+2
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-4-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05configure: Avoid building TCG when not neededPhilippe Mathieu-Daudé1-0/+4
Avoid building TCG when building only tools: ./configure --enable-tools --disable-system --disable-user This saves us from running the soft-float tests enabled since commit 76170102508. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-3-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05Makefile: Only build virtiofsd if system-mode is enabledPhilippe Mathieu-Daudé1-1/+1
Do not build the virtiofsd helper when configured with --disable-system. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200522172510.25784-2-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05linux-user: implement OFD locksAndreas Schwab2-0/+10
Signed-off-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <mvm7dx0cun3.fsf@suse.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05linux-user/mmap.c: fix integer underflow in target_mremapJonathan Marler1-1/+1
Fixes: https://bugs.launchpad.net/bugs/1876373 This code path in mmap occurs when a page size is decreased with mremap. When a section of pages is shrunk, qemu calls mmap_reserve on the pages that were released. However, it has the diff operation reversed, subtracting the larger old_size from the smaller new_size. Instead, it should be subtracting the smaller new_size from the larger old_size. You can also see in the previous line of the change that this mmap_reserve call only occurs when old_size > new_size. Bug: https://bugs.launchpad.net/qemu/+bug/1876373 Signed-off-by: Jonathan Marler <johnnymarler@gmail.com> Reviewded-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200502161225.14346-1-johnnymarler@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05linux-user/strace.list: fix epoll_create{,1} -strace outputSergei Trofimovich1-2/+2
Fix syscall name and parameters priinter. Before the change: ``` $ alpha-linux-user/qemu-alpha -strace -L /usr/alpha-unknown-linux-gnu/ /tmp/a ... 1274697 %s(%d)(2097152,274903156744,274903156760,274905840712,274877908880,274903235616) = 3 1274697 exit_group(0) ``` After the change: ``` $ alpha-linux-user/qemu-alpha -strace -L /usr/alpha-unknown-linux-gnu/ /tmp/a ... 1273719 epoll_create1(2097152) = 3 1273719 exit_group(0) ``` Fixes: 9cbc0578cb6 ("Improve output of various syscalls") Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org> CC: Riku Voipio <riku.voipio@iki.fi> CC: Laurent Vivier <laurent@vivier.eu> Cc: qemu-stable@nongnu.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200416175957.1274882-1-slyfox@gentoo.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05linux-user: Add support for /proc/cpuinfo on hppa platformHelge Deller1-2/+14
Provide our own /proc/cpuinfo file for the hppa (parisc) platform. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20200424210648.GA26715@ls3530.fritz.box> [lv: s/an/our/ and add TARGET_HPPA to guard is_proc()] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-06-05Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200605' into stagingPeter Maydell12-26/+219
s390x update: - enhance s390x documentation - allow ORBs without prefetch specified for vfio-ccw - various cleanups and enhancements # gpg: Signature made Fri 05 Jun 2020 16:32:43 BST # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [marginal] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [marginal] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [marginal] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20200605: target/s390x: Restrict system-mode declarations target/s390x/helper: Clean ifdef'ry target/s390x: Only compile decode_basedisp() on system-mode MAINTAINERS: add Thomas as additional s390x maintainer docs/s390x: document vfio-ccw vfio-ccw: allow non-prefetch ORBs docs/s390x: document 3270 docs/s390x: document the virtual css s390x: pv: Fix KVM_PV_PREP_RESET command wrapper name s390x/kvm: help valgrind in several places Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05target/arm: Convert Neon one-register-and-immediate insns to decodetreePeter Maydell3-99/+142
Convert the insns in the one-register-and-immediate group to decodetree. In the new decode, our asimd_imm_const() function returns a 64-bit value rather than a 32-bit one, which means we don't need to treat cmode=14 op=1 as a special case in the decoder (it is the only encoding where the two halves of the 64-bit value are different). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-10-peter.maydell@linaro.org
2020-06-05target/arm: Convert VCVT fixed-point ops to decodetreePeter Maydell3-73/+62
Convert the VCVT fixed-point conversion operations in the Neon 2-regs-and-shift group to decodetree. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-9-peter.maydell@linaro.org
2020-06-05target/arm: Convert Neon VSHLL, VMOVL to decodetreePeter Maydell3-44/+99
Convert the VSHLL and VMOVL insns from the 2-reg-shift group to decodetree. Since the loop always has two passes, we unroll it to avoid the awkward reassignment of one TCGv to another. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-8-peter.maydell@linaro.org
2020-06-05target/arm: Convert Neon narrowing shifts with op==9 to decodetreePeter Maydell3-108/+37
Convert the remaining Neon narrowing shifts to decodetree: * VQSHRN * VQRSHRN Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-7-peter.maydell@linaro.org
2020-06-05target/arm: Convert Neon narrowing shifts with op==8 to decodetreePeter Maydell3-0/+195
Convert the Neon narrowing shifts where op==8 to decodetree: * VSHRN * VRSHRN * VQSHRUN * VQRSHRUN Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-6-peter.maydell@linaro.org
2020-06-05target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetreePeter Maydell3-107/+126
Convert the VQSHLU and QVSHL 2-reg-shift insns to decodetree. These are the last of the simple shift-by-immediate insns. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-5-peter.maydell@linaro.org
2020-06-05target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to ↵Peter Maydell3-48/+46
decodetree Convert the VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree. (These are the last instructions in the group that are vectorized; the rest all require looping over each element.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-4-peter.maydell@linaro.org
2020-06-05target/arm: Convert Neon VSHR 2-reg-shift insns to decodetreePeter Maydell3-20/+67
Convert the VSHR 2-reg-shift insns to decodetree. Note that unlike the legacy decoder, we present the right shift amount to the trans_ function as a positive integer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-3-peter.maydell@linaro.org
2020-06-05target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetreePeter Maydell3-10/+71
Convert the VSHL and VSLI insns from the Neon 2-registers-and-a-shift group to decodetree. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200522145520.6778-2-peter.maydell@linaro.org
2020-06-05raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB hostPaul Zimmerman1-2/+7
Add a check for functional dwc-hsotg (dwc2) USB host emulation to the Raspi 2 acceptance test Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Reviewed-by: Philippe Mathieu-Daude <f4bug@amsat.org> Message-id: 20200520235349.21215-8-pauldzim@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05wire in the dwc-hsotg (dwc2) USB host controller emulationPaul Zimmerman2-2/+22
Wire the dwc-hsotg (dwc2) emulation into Qemu Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Reviewed-by: Philippe Mathieu-Daude <f4bug@amsat.org> Message-id: 20200520235349.21215-7-pauldzim@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05usb: add short-packet handling to usb-storage driverPaul Zimmerman1-1/+14
The dwc-hsotg (dwc2) USB host depends on a short packet to indicate the end of an IN transfer. The usb-storage driver currently doesn't provide this, so fix it. I have tested this change rather extensively using a PC emulation with xhci, ehci, and uhci controllers, and have not observed any regressions. Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Message-id: 20200520235349.21215-6-pauldzim@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05dwc-hsotg (dwc2) USB host controller emulationPaul Zimmerman4-0/+1473
Add the dwc-hsotg (dwc2) USB host controller emulation code. Based on hw/usb/hcd-ehci.c and hw/usb/hcd-ohci.c. Note that to use this with the dwc-otg driver in the Raspbian kernel, you must pass the option "dwc_otg.fiq_fsm_enable=0" on the kernel command line. Emulation of slave mode and of descriptor-DMA mode has not been implemented yet. These modes are seldom used. I have used some on-line sources of information while developing this emulation, including: http://www.capital-micro.com/PDF/CME-M7_Family_User_Guide_EN.pdf which has a pretty complete description of the controller starting on page 370. https://sourceforge.net/p/wive-ng/wive-ng-mt/ci/master/tree/docs/DataSheets/RT3050_5x_V2.0_081408_0902.pdf which has a description of the controller registers starting on page 130. Thanks to Felippe Mathieu-Daude for providing a cleaner method of implementing the memory regions for the controller registers. Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Message-id: 20200520235349.21215-5-pauldzim@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05dwc-hsotg (dwc2) USB host controller state definitionsPaul Zimmerman1-0/+190
Add the dwc-hsotg (dwc2) USB host controller state definitions. Mostly based on hw/usb/hcd-ehci.h. Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Message-id: 20200520235349.21215-4-pauldzim@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05dwc-hsotg (dwc2) USB host controller register definitionsPaul Zimmerman1-0/+899
Import the dwc-hsotg (dwc2) register definitions file from the Linux kernel. This is a copy of drivers/usb/dwc2/hw.h from the mainline Linux kernel, the only changes being to the header, and two instances of 'u32' changed to 'uint32_t' to allow it to compile. Checkpatch throws a boatload of errors due to the tab indentation, but I would rather import it as-is than reformat it. Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Message-id: 20200520235349.21215-3-pauldzim@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05raspi: add BCM2835 SOC MPHI emulationPaul Zimmerman5-0/+255
Add BCM2835 SOC MPHI (Message-based Parallel Host Interface) emulation. It is very basic, only providing the FIQ interrupt needed to allow the dwc-otg USB host controller driver in the Raspbian kernel to function. Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Acked-by: Philippe Mathieu-Daude <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200520235349.21215-2-pauldzim@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05docs/system: Document Aspeed boardsCédric Le Goater2-0/+86
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200602135050.593692-1-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05tests/acceptance: Add a boot test for the xlnx-versal-virt machineThomas Huth1-0/+26
As described by Edgar here: https://www.mail-archive.com/qemu-devel@nongnu.org/msg605124.html we can use the Ubuntu kernel for testing the xlnx-versal-virt machine. So let's add a boot test for this now. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200525141237.15243-1-thuth@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05hw/adc/stm32f2xx_adc: Correct memory region size and access sizePhilippe Mathieu-Daudé1-1/+3
The ADC region size is 256B, split as: - [0x00 - 0x4f] defined - [0x50 - 0xff] reserved All registers are 32-bit (thus when the datasheet mentions the last defined register is 0x4c, it means its address range is 0x4c .. 0x4f. This model implementation is also 32-bit. Set MemoryRegionOps 'impl' fields. See: 'RM0033 Reference manual Rev 8', Table 10.13.18 "ADC register map". Reported-by: Seth Kintigh <skintigh@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200603055915.17678-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05target/arm: Split helper_crypto_sm3ttRichard Henderson3-23/+27
Rather than passing an opcode to a helper, fully decode the operation at translate time. Use clear_tail_16 to zap the balance of the SVE register with the AdvSIMD write. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-7-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05target/arm: Split helper_crypto_sha1_3regRichard Henderson5-94/+95
Rather than passing an opcode to a helper, fully decode the operation at translate time. Use clear_tail_16 to zap the balance of the SVE register with the AdvSIMD write. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05target/arm: Convert sha1 and sha256 to gvec helpersRichard Henderson6-162/+66
Do not yet convert the helpers to loop over opr_sz, but the descriptor allows the vector tail to be cleared. Which fixes an existing bug vs SVE. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05target/arm: Convert sha512 and sm3 to gvec helpersRichard Henderson3-47/+55
Do not yet convert the helpers to loop over opr_sz, but the descriptor allows the vector tail to be cleared. Which fixes an existing bug vs SVE. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05target/arm: Convert rax1 to gvec helpersRichard Henderson4-28/+47
With this conversion, we will be able to use the same helpers with sve. This also fixes a bug in which we failed to clear the high bits of the SVE register after an AdvSIMD operation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05target/arm: Convert aes and sm4 to gvec helpersRichard Henderson6-67/+138
With this conversion, we will be able to use the same helpers with sve. In particular, pass 3 vector parameters for the 3-operand operations; for advsimd the destination register is also an input. This also fixes a bug in which we failed to clear the high bits of the SVE register after an AdvSIMD operation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()Philippe Mathieu-Daudé1-17/+49
Replace printf() calls by qemu_log_mask(), which is disabled by default. This avoid flooding the terminal when fuzzing the device. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200525114123.21317-3-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé1-3/+7
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask() (missed in commit 5a0001ec7e). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200525114123.21317-2-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-06-05hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slaveEden Mikitas1-1/+1
When inserting the value retrieved (rx) from the spi slave, rx is pushed to rx_fifo after being cast to uint8_t. rx_fifo is a fifo32, and the rx register the driver uses is also 32 bit. This zeroes the 24 most significant bits of rx. This proved problematic with devices that expect to use the whole 32 bits of the rx register. Signed-off-by: Eden Mikitas <e.mikitas@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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