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2023-05-06target/loongarch: Implement vfrstpSong Gao5-0/+61
2023-05-06target/loongarch: Implement vbitclr vbitset vbitrevSong Gao5-0/+437
2023-05-06target/loongarch: Implement vpcntSong Gao5-0/+38
2023-05-06target/loongarch: Implement vclo vclzSong Gao5-0/+67
2023-05-06target/loongarch: Implement vssrlrn vssrarnSong Gao5-0/+478
2023-05-06target/loongarch: Implement vssrln vssranSong Gao5-0/+499
2023-05-06target/loongarch: Implement vsrlrn vsrarnSong Gao5-0/+190
2023-05-06target/loongarch: Implement vsrln vsranSong Gao5-0/+179
2023-05-06target/loongarch: Implement vsrlr vsrarSong Gao5-0/+176
2023-05-06target/loongarch: Implement vsllwil vextlSong Gao5-0/+89
2023-05-06target/loongarch: Implement vsll vsrl vsra vrotrSong Gao3-0/+108
2023-05-06target/loongarch: Implement LSX logic instructionsSong Gao5-0/+94
2023-05-06target/loongarch: Implement vmskltz/vmskgez/vmsknzSong Gao5-0/+141
2023-05-06target/loongarch: Implement vsigncovSong Gao5-0/+75
2023-05-06target/loongarch: Implement vexthSong Gao5-0/+82
2023-05-06target/loongarch: Implement vsatSong Gao5-0/+168
2023-05-06target/loongarch: Implement vdiv/vmodSong Gao5-0/+105
2023-05-06target/loongarch: Implement vmadd/vmsub/vmaddw{ev/od}Song Gao5-0/+817
2023-05-06target/loongarch: Implement vmul/vmuh/vmulw{ev/od}Song Gao5-0/+732
2023-05-06target/loongarch: Implement vmax/vminSong Gao5-0/+319
2023-05-06target/loongarch: Implement vaddaSong Gao5-0/+87
2023-05-06target/loongarch: Implement vabsdSong Gao5-0/+133
2023-05-06target/loongarch: Implement vavg/vavgrSong Gao5-0/+281
2023-05-06target/loongarch: Implement vaddw/vsubwSong Gao5-0/+1116
2023-05-06target/loongarch: Implement vhaddw/vhsubwSong Gao5-0/+150
2023-05-06target/loongarch: Implement vsadd/vssubSong Gao3-0/+51
2023-05-06target/loongarch: Implement vnegSong Gao3-0/+37
2023-05-06target/loongarch: Implement vaddi/vsubiSong Gao3-0/+62
2023-05-06target/loongarch: Implement vadd/vsubSong Gao5-0/+139
2023-05-06target/loongarch: Add CHECK_SXE maccro for check LSX enableSong Gao3-0/+15
2023-05-06target/loongarch: meson.build support build LSXSong Gao4-0/+13
2023-05-06target/loongarch: Add LSX data type VRegSong Gao6-13/+119
2023-05-05Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson42-1288/+1117
2023-05-05Merge tag 'pull-ppc-20230505' of https://gitlab.com/danielhb/qemu into stagingRichard Henderson14-64/+90
2023-05-05Merge tag 'pw-pull-request' of https://gitlab.com/marcandre.lureau/qemu into ...Richard Henderson10-3/+1013
2023-05-05Merge tag 'migration-20230505-pull-request' of https://gitlab.com/juan.quinte...Richard Henderson12-89/+109
2023-05-05tcg: Widen helper_*_st[bw]_mmu val argumentsRichard Henderson2-6/+10
2023-05-05tcg: Introduce arg_slot_stk_ofsRichard Henderson1-12/+17
2023-05-05tcg: Replace REG_P with arg_loc_reg_pRichard Henderson2-7/+13
2023-05-05tcg: Move TCGLabelQemuLdst to tcg.cRichard Henderson2-14/+13
2023-05-05tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st}Richard Henderson1-3/+3
2023-05-05tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data returnRichard Henderson1-1/+1
2023-05-05tcg/s390x: Introduce HostAddressRichard Henderson1-49/+60
2023-05-05tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}Richard Henderson1-8/+14
2023-05-05tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}Richard Henderson1-42/+24
2023-05-05tcg/riscv: Require TCG_TARGET_REG_BITS == 64Richard Henderson3-190/+72
2023-05-05tcg/ppc: Introduce HostAddressRichard Henderson1-43/+47
2023-05-05tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st}Richard Henderson1-51/+59
2023-05-05tcg/mips: Rationalize args to tcg_out_qemu_{ld,st}Richard Henderson1-91/+95
2023-05-05tcg/loongarch64: Introduce HostAddressRichard Henderson1-25/+30
generated by cgit v1.1 at 2025-01-07 12:29:55 +0000