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2022-01-26
virtiofsd: Drop membership of all supplementary groups (CVE-2022-0358)
Vivek Goyal
1
-0
/
+27
2022-01-22
Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/python-pull-request' ...
Peter Maydell
24
-90
/
+151
2022-01-21
scripts/render-block-graph: switch to AQMP
John Snow
1
-5
/
+3
2022-01-21
scripts/cpu-x86-uarch-abi: switch to AQMP
John Snow
1
-2
/
+2
2022-01-21
scripts/cpu-x86-uarch-abi: fix CLI parsing
John Snow
1
-2
/
+1
2022-01-21
python: move qmp-shell under the AQMP package
John Snow
4
-3
/
+3
2022-01-21
python: move qmp utilities to python/qemu/utils
John Snow
11
-14
/
+14
2022-01-21
python/qmp: switch qmp-shell to AQMP
John Snow
2
-14
/
+20
2022-01-21
python/qmp: switch qom tools to AQMP
John Snow
3
-8
/
+11
2022-01-21
python/qmp: switch qemu-ga-client to AQMP
John Snow
1
-11
/
+11
2022-01-21
python/qemu-ga-client: don't use deprecated CLI syntax in usage comment
John Snow
1
-1
/
+1
2022-01-21
python/aqmp: rename AQMPError to QMPError
John Snow
6
-21
/
+21
2022-01-21
python/aqmp: add SocketAddrT to package root
John Snow
1
-1
/
+9
2022-01-21
python/aqmp: copy type definitions from qmp
John Snow
2
-8
/
+30
2022-01-21
python/aqmp: handle asyncio.TimeoutError on execute()
John Snow
1
-2
/
+6
2022-01-21
python/aqmp: add __del__ method to legacy interface
John Snow
1
-0
/
+18
2022-01-21
python/aqmp: fix docstring typo
John Snow
1
-1
/
+1
2022-01-21
python: use avocado's "new" runner
John Snow
1
-1
/
+1
2022-01-21
python: pin setuptools below v60.0.0
John Snow
2
-0
/
+3
2022-01-21
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20220...
Peter Maydell
42
-356
/
+1608
2022-01-21
target/riscv: Relax UXL field for debugging
LIU Zhiwei
1
-4
/
+4
2022-01-21
target/riscv: Enable uxl field write
LIU Zhiwei
2
-6
/
+25
2022-01-21
target/riscv: Set default XLEN for hypervisor
LIU Zhiwei
1
-0
/
+10
2022-01-21
target/riscv: Adjust scalar reg in vector with XLEN
LIU Zhiwei
1
-1
/
+1
2022-01-21
target/riscv: Adjust vector address with mask
LIU Zhiwei
1
-10
/
+15
2022-01-21
target/riscv: Fix check range for first fault only
LIU Zhiwei
1
-2
/
+2
2022-01-21
target/riscv: Remove VILL field in VTYPE
LIU Zhiwei
1
-1
/
+0
2022-01-21
target/riscv: Adjust vsetvl according to XLEN
LIU Zhiwei
2
-2
/
+10
2022-01-21
target/riscv: Split out the vill from vtype
LIU Zhiwei
5
-6
/
+19
2022-01-21
target/riscv: Split pm_enabled into mask and base
LIU Zhiwei
3
-23
/
+16
2022-01-21
target/riscv: Calculate address according to XLEN
LIU Zhiwei
5
-69
/
+21
2022-01-21
target/riscv: Alloc tcg global for cur_pm[mask|base]
LIU Zhiwei
1
-24
/
+8
2022-01-21
target/riscv: Create current pm fields in env
LIU Zhiwei
5
-0
/
+68
2022-01-21
target/riscv: Adjust csr write mask with XLEN
LIU Zhiwei
2
-5
/
+10
2022-01-21
target/riscv: Relax debug check for pm write
LIU Zhiwei
1
-0
/
+3
2022-01-21
target/riscv: Use gdb xml according to max mxlen
LIU Zhiwei
2
-24
/
+55
2022-01-21
target/riscv: Extend pc for runtime pc write
LIU Zhiwei
1
-3
/
+19
2022-01-21
target/riscv: Ignore the pc bits above XLEN
LIU Zhiwei
1
-1
/
+1
2022-01-21
target/riscv: Create xl field in env
LIU Zhiwei
5
-32
/
+46
2022-01-21
target/riscv: Sign extend pc for different XLEN
LIU Zhiwei
4
-9
/
+27
2022-01-21
target/riscv: Sign extend link reg for jal and jalr
LIU Zhiwei
2
-6
/
+2
2022-01-21
target/riscv: Don't save pc when exception return
LIU Zhiwei
3
-9
/
+6
2022-01-21
target/riscv: Adjust pmpcfg access with mxl
LIU Zhiwei
2
-8
/
+23
2022-01-21
roms/opensbi: Remove ELF images
Anup Patel
5
-6
/
+0
2022-01-21
hw/riscv: Remove macros for ELF BIOS image names
Anup Patel
2
-4
/
+2
2022-01-21
hw/riscv: spike: Allow using binary firmware as bios
Anup Patel
4
-28
/
+52
2022-01-21
target/riscv: rvv-1.0: Allow Zve32f extension to be turned on
Frank Chang
1
-0
/
+1
2022-01-21
target/riscv: rvv-1.0: Add Zve32f support for narrowing type-convert insns
Frank Chang
1
-0
/
+3
2022-01-21
target/riscv: rvv-1.0: Add Zve32f support for widening type-convert insns
Frank Chang
1
-0
/
+18
2022-01-21
target/riscv: rvv-1.0: Add Zve32f support for single-width fp reduction insns
Frank Chang
1
-0
/
+1
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