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2017-01-10tcg/i386: Allow bmi2 shiftx to have non-matching operandsRichard Henderson1-14/+19
Previously we could not have different constraints for different ISA levels, which prevented us from eliding the matching constraint for shifts. We do now have to make sure that the operands match for constant shifts. We can also handle some small left shifts via lea. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/i386: Hoist common arguments in tcg_out_opRichard Henderson1-102/+95
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/i386: Fuly convert tcg_target_op_defRichard Henderson1-142/+198
Use a switch instead of searching a table. Share constraints between 32-bit and 64-bit, when at all possible. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/s390: Handle clz opcodeRichard Henderson2-2/+36
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/mips: Handle clz opcodeRichard Henderson2-2/+51
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/arm: Handle ctz and clz opcodesRichard Henderson2-2/+29
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/aarch64: Handle ctz and clz opcodesRichard Henderson2-4/+52
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/ppc: Handle ctz and clz opcodesRichard Henderson2-4/+73
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-i386: Use clz and ctz opcodesRichard Henderson3-30/+14
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-arm: Use clz opcodeRichard Henderson6-25/+7
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-xtensa: Use clz opcodeRichard Henderson3-17/+11
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-unicore32: Use clz opcodeRichard Henderson3-16/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-tricore: Use clz opcodeRichard Henderson3-14/+3
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-tilegx: Use clz and ctz opcodesRichard Henderson3-14/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-s390x: Use clz opcodeRichard Henderson3-8/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-ppc: Use clz and ctz opcodesRichard Henderson3-28/+16
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-openrisc: Use clz and ctz opcodesRichard Henderson3-23/+4
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-mips: Use clz opcodeRichard Henderson3-36/+16
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-microblaze: Use clz opcodeRichard Henderson3-7/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-cris: Use clz opcodeRichard Henderson3-7/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-alpha: Use the ctz and clz opcodesRichard Henderson3-14/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10disas/ppc: Handle popcnt and cnttzRichard Henderson1-0/+10
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10disas/i386.c: Handle tzcntRichard Henderson1-2/+10
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Add clz and ctz opcodesRichard Henderson17-0/+266
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Allow an operand to be matching or a constantRichard Henderson2-35/+41
This allows an output operand to match an input operand only when the input operand needs a register. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Pass the opcode width to target_parse_constraintRichard Henderson10-85/+53
This will let us choose how to interpret a given constraint depending on whether the opcode is 32- or 64-bit. Which will let us share more constraint combinations between opcodes. At the same time, change the interface to return the advanced pointer instead of passing it in/out by reference. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Transition flat op_defs array to a target callbackRichard Henderson11-77/+136
This will allow the target to tailor the constraints to the auto-detected ISA extensions. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Add markup for output requires new registerRichard Henderson2-12/+23
This is the same concept as, and same markup as, the early clobber markup in gcc. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/optimize: Fold movcond 0/1 into setcondRichard Henderson1-0/+15
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-s390x: Use the new deposit and extract opsRichard Henderson1-12/+22
Use the new primitives for RISBG. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-ppc: Use the new deposit and extract opsRichard Henderson1-16/+19
Use the new primitives for RDWINM and RLDICL. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-mips: Use the new extract opRichard Henderson1-7/+5
Use extract for EXT and DEXT. Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-i386: Use new deposit and extract opsRichard Henderson1-22/+23
A couple of places where it was easy to identify a right-shift followed by an extract or and-with-immediate, and the obvious sign-extract from a high byte register. Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-arm: Use new deposit and extract opsRichard Henderson2-81/+37
Use the new primitives for UBFX and SBFX. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-alpha: Use deposit and extract opsRichard Henderson1-25/+42
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/s390: Support deposit into zeroRichard Henderson1-4/+26
Since we can no longer use matching constraints, this does mean we must handle that data movement by hand. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/s390: Implement field extraction opcodesRichard Henderson2-2/+13
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/s390: Expose host facilities to tcg-target.hRichard Henderson2-104/+96
This lets us expose facilities to TCG_TARGET_HAS_* defines directly, rather than hiding behind function calls. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/ppc: Implement field extraction opcodesRichard Henderson2-2/+12
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/mips: Implement field extraction opcodesRichard Henderson2-1/+12
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/i386: Implement field extraction opcodesRichard Henderson2-3/+47
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/arm: Implement field extraction opcodesRichard Henderson2-2/+26
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/arm: Move isa detection to tcg-target.hRichard Henderson2-44/+33
This allows us to use this detection within the TCG_TARGET_HAS_* macros, instead of requiring a function call into tcg-target.inc.c. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg/aarch64: Implement field extraction opcodesRichard Henderson2-4/+18
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Add deposit_z expanderRichard Henderson2-0/+149
While we don't require a new opcode, it is handy to have an expander that knows the first source is zero. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Minor adjustments to deposit expandersRichard Henderson1-2/+4
Assert that len is not 0. Since we have asserted that ofs + len <= N, a later check for len == N implies that ofs == 0. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10tcg: Add field extraction primitivesRichard Henderson15-2/+426
Adds tcg_gen_extract_* and tcg_gen_sextract_* for extraction of fixed position bitfields, much like we already have for deposit. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell66-557/+1164
virtio, vhost, pc: fixes, features beginnings of iotlb support for vhost acpi hotplug rework vhost net tx flush on link down passing mtu to guests hotplug for virtio crypto fixes and cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 10 Jan 2017 05:37:48 GMT # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (41 commits) acpi-test: update expected files memhp: move DIMM devices into dedicated scope with related common methods memhp: don't generate memory hotplug AML if it's not enabled/supported memhp: move memory hotplug only defines to memory_hotplug.c memhp: move GPE handler_E03 into build_memory_hotplug_aml() memhp: merge build_memory_devices() into build_memory_hotplug_aml() memhp: consolidate scattered MHPD device declaration memhp: move build_memory_devices() into memory_hotplug.c memhp: move build_memory_hotplug_aml() into memory_hotplug.c tests: pc: add memory hotplug acpi tables tests virtio-net: Add MTU feature support vhost-net: Notify the backend about the host MTU vhost-user: Add MTU protocol feature and op net: virtio-net discards TX data after link down virtio: Introduce virtqueue_drop_all procedure net: vhost stop updates virtio queue state net: Add virtio queue interface to update used index from vring state balloon: Don't balloon roms virtio: fix vq->inuse recalc after migr pcie_aer: support configurable AER capa version ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-10acpi-test: update expected filesMichael S. Tsirkin10-0/+0
clean up warnings after latest hotplug changes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-01-10memhp: move DIMM devices into dedicated scope with related common methodsIgor Mammedov1-93/+97
Move DIMM devices from global _SB scope to a new \_SB.MHPC container along with common methods used by DIMMs: MCRS, MRST, MPXM, MOST, MEJ00, MSCN, MTFY this reduces AML size on 12 * #slots bytes, i.e. up to 3072 bytes for 265 slots. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
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