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2023-11-15Merge tag 'pull-tcg-20231114' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi9-42/+30
accel/tcg: Forward probe size on to notdirty_write accel/tcg: Remove CF_LAST_IO target/sparc: Fix RETURN # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmVTyVodHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV91UAf/Sf304RJutaNX+85s # 2HP31heScIsrrziDvPhZJG+gD3/Xeq9aDRCNqw7C/MhIHadarJcghTVqPuTMZ8Eg # j3FqvSr6e+6A6VGNdg2d5CKasIYhRMHqCy94g/0fVWtnV9n/2cJPS6zIWGlxl2dT # tJ9AK9IbkLo9b7jifUztTsllhzU8rMvxYznxr6dynJ/3V10gtcAIsc41BeHoLzob # e8wZtuwNUtgiHBGhfEnpspK+oJaPKo2Qy1zPdBiuLadUhl066JdXeOKN9XgCuRyR # 024dOqVwZ+UBQhcmUdJuOjAnsnJJUx29TKtmOOoTugrq+mE1xybSBiiih6EELQlj # AYq6jg== # =D4Wj # -----END PGP SIGNATURE----- # gpg: Signature made Tue 14 Nov 2023 14:24:10 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20231114' of https://gitlab.com/rth7680/qemu: target/sparc: Fix RETURN accel/tcg: Forward probe size on to notdirty_write accel/tcg: Remove CF_LAST_IO Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14target/sparc: Fix RETURNRichard Henderson1-1/+1
Perform window restore before pc update. Required in order to recognize any window underflow trap with the current pc. Fixes: 86b82fe021f4 ("target/sparc: Move JMPL, RETT, RETURN to decodetree") Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-14accel/tcg: Forward probe size on to notdirty_writeJessica Clarke1-4/+7
Without this, we just dirty a single byte, and so if the caller writes more than one byte to the host memory then we won't have invalidated any translation blocks that start after the first byte and overlap those writes. In particular, AArch64's DC ZVA implementation uses probe_access (via probe_write), and so we don't invalidate the entire block, only the TB overlapping the first byte (and, in the unusual case an unaligned VA is given to the instruction, we also probe that specific address in order to get the right VA reported on an exception, so will invalidate a TB overlapping that address too). Since our IC IVAU implementation is a no-op for system emulation that relies on the softmmu already having detected self-modifying code via this mechanism, this means we have observably wrong behaviour when jumping to code that has been DC ZVA'ed. In practice this is an unusual thing for software to do, as in reality the OS will DC ZVA the page and the application will go and write actual instructions to it that aren't UDF #0, but you can write a test that clearly shows the faulty behaviour. For functions other than probe_access it's not clear what size to use when 0 is passed in. Arguably a size of 0 shouldn't dirty at all, since if you want to actually write then you should pass in a real size, but I have conservatively kept the implementation as dirtying the first byte in that case so as to avoid breaking any assumptions about that behaviour. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Message-Id: <20231104031232.3246614-1-jrtc27@jrtc27.com> [rth: Move the dirtysize computation next to notdirty_write.] Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-14accel/tcg: Remove CF_LAST_IORichard Henderson7-37/+22
In cpu_exec_step_atomic, we did not set CF_LAST_IO, which lead to a loop with cpu_io_recompile. But since 18a536f1f8 ("Always require can_do_io") we no longer need a flag to indicate when the last insn should have can_do_io set, so remove the flag entirely. Reported-by: Clément Chigot <chigot@adacore.com> Tested-by: Clément Chigot <chigot@adacore.com> Reviewed-by: Claudio Fontana <cfontana@suse.de> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1961 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-14Update version for v8.2.0-rc0 releasev8.2.0-rc0Stefan Hajnoczi1-1/+1
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14Merge tag 'pull-request-2023-11-14' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi3-4/+22
staging * Fix s390x PV dumps in case of errors # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmVTXR4RHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbUzBg//ZDrzcInE59jo6zuEJiDYdqkauxiJWqdm # PF3AaemZdww/SZ94960BLCPLm/53L4qeNHl9F4HMoCCqfqp6gUVouc0Rh5kd8/Bn # 0+ND4Ni20LgKrr/10M8frVreujYhWEtILWA3Ef3HkMWGt45RB8mMwpYwmIZh6DHv # B45xZaiOWzXNtroGSEBO52MuWzAlbBi68iVCS8xJ/q5xOe0s6julS4EwGo8P6R0c # VZKlGM8KVndPPiRmG4NSyqpg91fp2p0Zo4Ol6GMSMsljvLB4aSIu0lDMR2FjreIv # Fjmz78CZbNmgh/7edH1+vj+P083kEGwD7j1WHq4gbFONFdP8Gp0NQjhj/Zl4HsQh # aCwVMuSdQmg7KEvn1wXc29kL9rBsG/5t5mSPkAzvM/kDahchtltpRxFYgcTGLhNs # lT4cBjXSmyL2bCc1lX4sEw3/0RZE2GTRtuvP3caJWMZAAxYuE18LstWalPV5ttqe # p7Xg/XRjOYlM2FGIMI9L5KR4mNKzWduvxnU/3o7qHUOEtWe9mICzCwC8UilLYbjd # sGRJ5KRYN2nIzqTm0K50rrXPop9zVUHRSl37/9bV9+z6mFAh6Tg4+gIdQPayTo0S # omRpMUMxmKkKSk1lTFWRr59sxTI+S5ANbRLeApxJsxXGCvoOzAn4nE7fxEpmTR2e # ocddl9Wg4+w= # =sFZX # -----END PGP SIGNATURE----- # gpg: Signature made Tue 14 Nov 2023 06:42:22 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-11-14' of https://gitlab.com/thuth/qemu: target/s390x/arch_dump: Add arch cleanup function for PV dumps dump: Add arch cleanup function target/s390x/dump: Remove unneeded dump info function pointer init Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into stagingStefan Hajnoczi7-3/+45
# -----BEGIN PGP SIGNATURE----- # Version: GnuPG v1 # # iQEcBAABAgAGBQJlUt3jAAoJEO8Ells5jWIRX30H/iATyz+77w3Zd2rVfOpyHLhM # lgvhTwVCltsWdZSZLu6zrLYh419NNcAOyb9/Ci7hKR+x4OmWbP6pme772LRH2Mhz # zWzVoMXJeW1unjGvBcA8eAIsu3PUKoHLQ1J2dNwHheupMb2LkrWMaEMj10605aZ9 # WnjCFRIiejq4s2JGhofDTa0GCHcFmq2/Nzghb6MMzdPa99QTFnPmYRdIg2bGWd4L # PmoueuiA/zoDZjx+Y1nC2IzXRq7SvFIAyz91J/zaUtZLD+7QKV/bP+JACTnyzhOY # coUZnVzFc7q0Gv9wjw2oTNQo5CgKDyw7aDUB8oWsQLR1UvqEICbMhhz29YCWhok= # =10qX # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 21:39:31 EST # gpg: using RSA key EF04965B398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [full] # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * tag 'net-pull-request' of https://github.com/jasowang/qemu: igb: Add Function Level Reset to PF and VF igb: Add a VF reset handler Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14Merge tag 'misc-fixes-20231113' of https://github.com/philmd/qemu into stagingStefan Hajnoczi4-11/+368
Misc fixes for 8.2 - Missing Kconfig dependency in hw/mips (Marc-André) - Typo in VMWare model (Alexandra) - New avocado test for x86 processors addressing (Ani) - Fix SyntaxWarnings in avocado (Thomas) - Update virtio-fs mailing list address in MAINTAINERS (Stefan) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVSaAwACgkQ4+MsLN6t # wN7L9RAAvlX5MKJe6d3+gYV8NciEYFQGWzgSjtc0IzRenYf1wvxXubFnmeTJ3kfF # VOugAmeQUx5xvD0iPNrYCFn5fb1ZIFDuES25TsUSN38GCfo1/1+pG+wBWPJRwnQg # LhRHLSzwJOiUSzOEWrVW/4f2TUM1svUM7WKAWB1AbO2Dd3BKzb25/AEdgYWCeQKV # xrBFUH/owNCnWHxIFfLEO8Gt2WGkCLgblvLpeu5Mzds/5JcAi1Fb9lgpvvYxB1Jk # Jgb2ic4Lp6+aTxYxS/+EbQcZciM1M7XXVN57xsQZEcave5CQ9fN8dMbTy3GJxEfJ # OqWzLbwxybQCDA2f2Kd0HEv+U828ZD6/8HDfFk1JmZjE8UJ9vsvdnhQDDJOn5VJu # INyupPsgaG86jaQavzAQJ7Cehe4SdEX0B11mdPfujooy4FvO79O8AzlMM2YG8ARn # YydUzc1RnzE9l67RuEPvqiw1htpjJwV32v7nNZzsoBpqHG5OXAAD732OYnu/30a0 # U73tApRwPDUX3kiS8kUvXLq4/2NxFbX5VDx1bcJPTsweGplr59tPzMRpRxKQGhwa # WEsjjqnDNEjYVzTMVfFRQlvDUkcr5Rrgd51Q3MDbm6inCf2JofT4m7UmvFVmOW3p # w7IAbiguwyxC+Us9AkPTh03FYlzT2B+3XhKbAxcYJZ5/oH1O3x8= # =SFhl # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 13:16:44 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-fixes-20231113' of https://github.com/philmd/qemu: MAINTAINERS: update virtio-fs mailing list address tests/avocado/machine_s390_ccw_virtio.py: Fix SyntaxWarnings from python 3.12 tests/avocado: add test to exercise processor address space memory bound checks hw/display/vmware_vga: fix probably typo hw/mips: LOONGSON3V depends on UNIMP device Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14Merge tag 'pull-target-arm-20231113' of ↵Stefan Hajnoczi4-5/+19
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/arm/virt: fix GIC maintenance IRQ registration * target/arm: HVC at EL3 should go to EL3, not EL2 * target/arm: Correct MTE tag checking for reverse-copy MOPS * target/arm/tcg: enable PMU feature for Cortex-A8 and A9 # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmVSYL0ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3iLND/99dZKHgNJx1k7aeGX8t4lU # MTU0AsFndpx/WjWbviyfrO17B0FIi6kwhggDk2cXrXF26eBFcx5ruJ6sw9R1ZvsV # y6Z1rhjd+skj3PMxGMU/I0XeR3TXJNo2eLAeKyPy4W75+5I0zT4PMEPJ05WylVTs # RXuAhlyCXX9uTT2ILtGRiThpRrgnzGE3DU2Ry32s0+qjYq5U89J0+0kYPg6VFg29 # Lfj4zCwVu3/xX7Me+b84bTDxlQD4LSGdibscd0aCiMyamzfLl/naoDLvFIia/Q7h # 4epcw3Bu+3nTicg70i9k6iNP4nDXPO9V2dbopJVd9wcgPBXicyoDrLA8CQdp+04v # /vHT9+IZ4pFUcUp1+A9s6CcSMDeYOSPrQsd96HwaTtw/RjpxhLKC6EEpswpr5d4q # SBU5I6lUe47HuwLxPpqucwNk/o4/9PZKBDSI1SUKoLPVyOvSS0sxJlTdQCyHCgmU # ogjnFnw9J16X/GOWzS3tUD+9GS8s7WqJHyFl0t5ngvvamFTdquPFSFXQfZMTwAU1 # vVSam4oi51ON2sVjkR7Pn7BrTBE1QnsudB8Sc9If/LGhFSuNUKlj13+pWrGMty+n # q9fFS5MuNlvVehX3mr+i4PA6WWYCZ0wHzTvXtYxKkyu1CZi53r9H1pZPwb6URjUt # ceyJngaQH5dgtkVgCNSoRQ== # =4D8I # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 12:45:33 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20231113' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm/tcg: enable PMU feature for Cortex-A8 and A9 target/arm: Correct MTE tag checking for reverse-copy MOPS target/arm: HVC at EL3 should go to EL3, not EL2 hw/arm/virt: fix GIC maintenance IRQ registration Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14Merge tag 'pull-pa-20231113' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi11-118/+137
target/hppa: Mask reserved PSW bits in expand_sm_imm target/hppa: Fix calculation of CR_IIASQ back register target/hppa: Fix possible overflow in TLB size calculation target/hppa: Fix probe instruction target/hppa: Split MMU_PHYS_IDX to MMU_ABS_IDX, MMU_ABS_W_IDX target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40 hw/pci-host/astro: Translate 32-bit pci onto 40-bit runway bus hw/hppa: Update SeaBIOS-hppa to version 12 # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmVSXR4dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV87qwf+MkEuvMiwqx9YB2qa # Yhn4m4H1DrQcqGJ2egGuiYrS45JCAUZUcXnmBxL//w3AW7hoeoZwmuFSj+I3EOhI # y6ykMjMAe8d0VpWEvdkRh7SAWPBKvCJiAclkNyZkYhhagXryiFxqo9tL6nNQQEyz # HaYzrDwqL+Qgh7/ahkA9XdVLdeTsMtXoLm1cCXpY+TL0MiQonBa1mc17vbyWN8hs # qWQFBtik0lBIuEN0cB0bUgvV1oH9B8KVUYKbx/RhQORQAiU/O2SaSZ0fxU+F8ynB # xIyQH6aik0pzgwSo25T/AMxxgUoDydvLDyLCu/R85eNmdgvOj+n4XGIiNEJKEltT # 1OwGSQ== # =Qcsh # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 12:30:06 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-pa-20231113' of https://gitlab.com/rth7680/qemu: hw/hppa: Require at least SeaBIOS-hppa version 12 target/hppa: Update to SeaBIOS-hppa from version 10 to 12 hw/hppa: Move software power button address to page zero hw/pci-host/astro: Fix boot for C3700 machine target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40 target/hppa: Replace MMU_PHYS_IDX with MMU_ABS_IDX, MMU_ABS_W_IDX target/hppa: Introduce MMU_IDX_MMU_DISABLED target/hppa: Fix possible overflow in TLB size calculation target/hppa: Fix calculation of CR_IIASQ back register target/hppa: Use PRIV_P_TO_MMU_IDX in helper_probe target/hppa: Use only low 2 immediate bits for PROBEI target/hppa: Mask reserved PSW bits in expand_sm_imm Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14target/s390x/arch_dump: Add arch cleanup function for PV dumpsJanosch Frank1-0/+17
PV dumps block vcpu runs until dump end is reached. If there's an error between PV dump init and PV dump end the vm will never be able to run again. One example of such an error is insufficient disk space for the dump file. Let's add a cleanup function that tries to do a dump end. The dump completion data is discarded but there's no point in writing it to a file anyway if there's a possibility that other PV dump data is missing. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20231109120443.185979-4-frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-14dump: Add arch cleanup functionJanosch Frank2-0/+5
Some architectures (s390x) need to cleanup after a failed dump to be able to continue to run the vm. Add a cleanup function pointer and call it if it's set. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20231109120443.185979-3-frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-14target/s390x/dump: Remove unneeded dump info function pointer initJanosch Frank1-4/+0
dump_state_prepare() now sets the function pointers to NULL so we only need to touch them if we're going to use them. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231109120443.185979-2-frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13MAINTAINERS: update virtio-fs mailing list addressStefan Hajnoczi1-1/+1
The old virtio-fs mailing list address is no longer in use. Switch to the new mailing list address. Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: German Maglione <gmaglione@redhat.com> Cc: Hanna Czenczek <hreitz@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: German Maglione <gmaglione@redhat.com> Message-ID: <20231111004920.148348-1-stefanha@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-13tests/avocado/machine_s390_ccw_virtio.py: Fix SyntaxWarnings from python 3.12Thomas Huth1-9/+9
Python 3.12 now warns about backslashes in strings that aren't used for escaping a special character from Python. Silence the warning by using raw strings here instead. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231113140721.46903-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-13hw/hppa: Require at least SeaBIOS-hppa version 12Helge Deller1-1/+1
The new SeaBIOS-hppa version 12 includes the necessary fixes to support emulated PA2.0 CPUs and which allows starting 64-bit Linux kernels in the guest. To boot a 64-bit machine use the "-machine C3700" qemu option. Signed-off-by: Helge Deller <deller@gmx.de> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Update to SeaBIOS-hppa from version 10 to 12Helge Deller2-0/+0
SEABIOS_HPPA_VERSION 12 contains those fixes and enhancements: - Reduce debug level - Update README file for PA-RISC - Fix debug name of CPU_HPA_xx if xx >= 10 - Disable device indexing SEABIOS_HPPA_VERSION 11 contains those fixes and enhancements (mostly to enable support for 64-bit Linux kernel): - Fixed 64-bit CPU detection via "mfctl,w" instruction - Implement PDC_PSW for 64-bit CPUs - Added PAT PDC functions: - PDC_PAT_CELL - PDC_PAT_CHASSIS_LOG - PDC_PAT_PD_GET_ADDR_MAP - PDC_PAT_CPU - Fix return value of PDC_CACHE_RET_SPID space-id bits - Introduce new default software IDs for the machines - Fix CPU and FPU model numbers - Fix 64-bit SMP rendezvous - Fix Linux 64-bit kernel crash in STI due to usage of unsigned 32-bit "next_font" pointer in sti header files - Fix graphics output to LASI artist card on PA2.0 machines - More USB OHCI endianess fixes - Fixes which make ODE run on B160L - Fixes which make ODE detect Astro Runway port and CPUs - Implement "firmware unlocking" via PDC_MODEL/PDC_MODEL_CAPABILITIES call - Add subfunction 2 for PDC_MODEL_VERSIONS Signed-off-by: Helge Deller <deller@gmx.de> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13hw/hppa: Move software power button address to page zeroHelge Deller1-1/+2
Something appears to be off between the 64-bit CPU, the 32-bit PDC (SeaBIOS-hppa firmware), and the 64-bit kernel in addressing the power button address in high-mapped firmware memory. Use a 32-bit value at PAGE0->pad0[4] instead. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13hw/pci-host/astro: Fix boot for C3700 machineHelge Deller2-42/+33
Apply the "32-bit PCI addressing on 40-bit Runway" as the default iommu transformation. This allows PCI devices to dma PDC memory. Signed-off-by: Helge Deller <deller@gmx.de> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40Richard Henderson2-18/+35
This is the value that is supported by both PA-8500 and Astro. If we support a larger address space than expected, we trip up software that did not fill in all of the page table bits, expecting them to be ignored. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Replace MMU_PHYS_IDX with MMU_ABS_IDX, MMU_ABS_W_IDXRichard Henderson3-36/+39
Align the language with pa2.0, separating absolute and physical. The translation from absolute to physical depends on PSW.W, and we prefer not to flush between changes, therefore use 2 mmu_idx. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Introduce MMU_IDX_MMU_DISABLEDRichard Henderson3-11/+14
Reduce the number of direct checks against MMU_PHYS_IDX. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Fix possible overflow in TLB size calculationHelge Deller1-2/+2
Coverty found that the shift of TARGET_PAGE_SIZE (32-bit type) might overflow. Fix it by casting TARGET_PAGE_SIZE to a 64-bit type before doing the shift (CID 1523902 and CID 1523908). Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Helge Deller <deller@gmx.de> Message-Id: <ZU6F/H8CZr3q4pP/@p100> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Fix calculation of CR_IIASQ back registerHelge Deller1-1/+1
Need to use iasq_b and iaoq_b to determine back register of CR_IIASQ. This fixes random faults when booting up Linux user space. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Use PRIV_P_TO_MMU_IDX in helper_probeRichard Henderson1-2/+3
Direct privilege level to mmu_idx mapping has been false for some time. Provide the correct value to hppa_get_physical_address. Fixes: fa824d99f9b ("target/hppa: Switch to use MMU indices 11-15") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/hppa: Use only low 2 immediate bits for PROBEIRichard Henderson1-1/+1
During the conversion to decodetree, the 2-bit mask was lost. Fixes: deee69a19fd ("target/hppa: Convert memory management insns") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13target/arm/tcg: enable PMU feature for Cortex-A8 and A9Nikita Ostrenkov1-0/+2
According to the technical reference manual, the Cortex-A9 has a Perfomance Unit Monitor (PMU): https://developer.arm.com/documentation/100511/0401/performance-monitoring-unit/about-the-performance-monitoring-unit The Cortex-A8 does also. We already already define the PMU registers when emulating the Cortex-A8 and Cortex-A9, because we put them in v7_cp_reginfo[] rather than guarding them behind ARM_FEATURE_PMU. So the only thing that setting the feature bit changes is that the registers actually do something. Enable ARM_FEATURE_PMU for Cortex-A8 and Cortex-A9, to avoid this anomaly. (The A8 and A9 PMU predates the standardisation of ID_DFR0.PerfMon, so the field there is 0, but the PMU is still present.) Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> Message-id: 20231112165658.2335-1-n.ostrenkov@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: tweaked commit message; also enable PMU for A8] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-13tests/avocado: add test to exercise processor address space memory bound checksAni Sinha1-0/+356
QEMU has validations to make sure that a VM is not started with more memory (static and hotpluggable memory) than what the guest processor can address directly with its addressing bits. This change adds a test to make sure QEMU fails to start with a specific error message when an attempt is made to start a VM with more memory than what the processor can directly address. The test also checks for passing cases when the address space of the processor is capable of addressing all memory. Boundary cases are tested. CC: imammedo@redhat.com CC: David Hildenbrand <david@redhat.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-ID: <20231109045601.33349-1-anisinha@redhat.com> Message-ID: <D5D8D419-76BA-4FB0-9BAC-4F7470A052FC@redhat.com> [PMD: Use SPDX tag] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-13hw/display/vmware_vga: fix probably typoAlexandra Diupina1-2/+2
When calling trace_vmware_verify_rect_greater_than_bound() replace "y" with "h" and y with h Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 02218aedb1 ("hw/display/vmware_vga: replace fprintf calls with trace events") Signed-off-by: Alexandra Diupina <adiupina@astralinux.ru> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231110174104.13280-1-adiupina@astralinux.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-13hw/mips: LOONGSON3V depends on UNIMP deviceMarc-André Lureau1-0/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: qemu-stable@nongnu.org Fixes: c76b409fef ("hw/mips: Add Loongson-3 machine support") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231107140615.3034763-1-marcandre.lureau@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-13target/arm: Correct MTE tag checking for reverse-copy MOPSPeter Maydell1-2/+10
When we are doing a FEAT_MOPS copy that must be performed backwards, we call mte_mops_probe_rev(), passing it the address of the last byte in the region we are probing. However, allocation_tag_mem_probe() wants the address of the first byte to get the tag memory for. Because we passed it (ptr, size) we could incorrectly trip the allocation_tag_mem_probe() check for "does this access run across to the following page", and if that following page happened not to be valid then we would assert. We know we will always be only dealing with a single page because the code that calls mte_mops_probe_rev() ensures that. We could make mte_mops_probe_rev() pass 'ptr - (size - 1)' to allocation_tag_mem_probe(), but then we would have to adjust the returned 'mem' pointer to get back to the tag RAM for the last byte of the region. It's simpler to just pass in a size of 1 byte, because we know that allocation_tag_mem_probe() in pure-probe single-page mode doesn't care about the size. Fixes: 69c51dc3723b ("target/arm: Implement MTE tag-checking functions for FEAT_MOPS copies") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231110162546.2192512-1-peter.maydell@linaro.org
2023-11-13target/arm: HVC at EL3 should go to EL3, not EL2Peter Maydell1-1/+3
AArch64 permits code at EL3 to use the HVC instruction; however the exception we take should go to EL3, not down to EL2 (see the pseudocode AArch64.CallHypervisor()). Fix the target EL. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Message-id: 20231109151917.1925107-1-peter.maydell@linaro.org
2023-11-13hw/arm/virt: fix GIC maintenance IRQ registrationJean-Philippe Brucker1-2/+4
Since commit 9036e917f8 ("{include/}hw/arm: refactor virt PPI logic"), GIC maintenance IRQ registration fails on arm64: [ 0.979743] kvm [1]: Cannot register interrupt 9 That commit re-defined VIRTUAL_PMU_IRQ to be a INTID but missed a case where the maintenance IRQ is actually referred by its PPI index. Just like commit fa68ecb330db ("hw/arm/virt: fix PMU IRQ registration"), use INITID_TO_PPI(). A search of "GIC_FDT_IRQ_TYPE_PPI" indicates that there shouldn't be more similar issues. Fixes: 9036e917f8 ("{include/}hw/arm: refactor virt PPI logic") Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20231110090557.3219206-2-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-13Merge tag 'pull-request-2023-11-13' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi10-12/+43
staging * Fix compilation with Clang 17 on s390x hosts * Two small s390x PCI fixes * Update MAINTAINERS file with more entries * Fix NetBSD VM test * Clean up some bad wordings # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmVSAoIRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVXBg//VVZS5CXEfOFV91I1kqQnLCvgwmuAyqEg # PI2/HBxuhzeBx+F1t7uR0n15tUPi1zkFFBOpyBDBubvWcp4vGvFwLQoiBCUvNzBA # +b1vMySP+K0OO1X5yT3cFHXF9q0o0V5WADwemf5RglIPjlTOIiz9qhD4EYqd2QHC # EUd9Y45DP4Y0V5raHLjY990f/zr3PuSAB6MASFTUnKdgGkRqonLWdLDdIZNDrZuL # oGwx1ALXgBOMV3yNyQx9jZBT24git/ai1vd9AU/d3JRKDPsd+4vC39+PTI9NH4h6 # oQglvo399f64cir1f1JJ3MN4ZtwXZpwUkjeTMcR9XZxk7GibU7P2arG5M3TERdmE # VLqylYsnbJojWOeCH+TViJapRhg1CzUveVlQofr7GHvf2N3oy3BrKaV715gauEyW # zpjbhSPpIQu9WFXt8+tSquqbvpAP/VlLrOV73D4LzJ7WdTa9CHmSek8D0zoRQDZR # 8OixrgoBKS+pmBDmTve5gFsIKhZIz9CrmaAKKYdskC8blENxCng8LOFp7sg2PK3M # U0lWYoDS7qZ85761Bl+QaBdFocdahQqkO/LUQuhoSt2OvA1EGAz2FdVSKkmPDdSS # P/homr4hOXIqJFSsZj0YNUTIXsXwLBvKjvcJPAWYgbXZhim0LtPQTQO3+ignwGyu # RXjaVkvkf/s= # =+2rp # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 06:03:30 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-11-13' of https://gitlab.com/thuth/qemu: hw/audio/es1370: Clean up comment tests/tsan: Rename the file with the entries that should be ignored test-resv-mem: Fix CID 1523911 tests/vm/netbsd: Use Python v3.11 MAINTAINERS: Add a general architecture section for x86 MAINTAINERS: Extend the Stellaris section MAINTAINERS: Add hw/display/sii9022.c to the Versatile Express section MAINTAINERS: Add hw/input/ads7846.c to the PXA2XX section MAINTAINERS: Add include/hw/input/pl050.h to the PrimeCell/CMSDK section s390x/pci: only limit DMA aperture if vfio DMA limit reported s390x/pci: bypass vfio DMA counting when using cdev host/include/generic/host/atomic128: Fix compilation problem with Clang 17 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-13Merge tag 'pull-qapi-2023-11-13' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi3-7/+7
QAPI patches patches for 2023-11-13 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmVR7j4SHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTmT0P/imN9c6xnkx8Kff0iEaT88N8YUHEu5gt # ECiQtfpbU8y8itIrWpuXWk7HUC1Jp397vKgUhmmr5Im32vx1waUGz/zxdBiitw0a # 2McXfD6Lbz3LN+q002Vq0QjP3tMeoc8DoP/CagmdXniGrxyJSs/oIsUAdqZnymug # ZREYRUlbrgJ8XA06n9qIaCGpiihBLl2XBbx4SV9JWle/9vKpII9EBrWNXTcCkde3 # W6gHEKgGAKa1NGYMJtOncanpnzVP0qoLmb3jmiR9tpj3YBB/5LP9l4O11DTC+PQ5 # nn+OmtmjuKE2a2C79Y8VCbRPR6MPSDDbuWwu7Q+A7vXi/1gnkMeXH+A6jE0d3y+p # PWKqBK65U+yS0IwiUGpMpcGo2WtZiBLzp3ragt+gzi3gV5GvEvPv0uvcEd66in95 # +M2RoVhkbi+e03mF+vDldvbwBYPwlNdgAX/ly7SR76YZybSMK0Jkp7yfvxN35LJc # kgCo0CY9kAYYUgPUJMiPhaxSfRVk738Qex7QCvFwDiZE8l4XEwoT1PRO0fs8G5aI # /Yz7hhjkaLw+i+k/tCVCVe+hOgMxxVUz/gZzV4+yrfQNxz41v4WqCfE8a+m6RROo # TaceVJPKqsyoJ2zmS+CpEPFWkWXEQSQ14yu2wdF8wMyKEWDS4yhRG78rnYC2/ZhC # zullCL7QfFbf # =bGOD # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 04:37:02 EST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-qapi-2023-11-13' of https://repo.or.cz/qemu/armbru: tests/qapi-schema: Tidy up pylint warnings and advice sphinx/qapidoc: Tidy up pylint warning raise-missing-from qapi: Fix QAPISchemaEntity.__repr__() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-13Merge tag 'pull-shadow-2023-11-13' of https://repo.or.cz/qemu/armbru into ↵Stefan Hajnoczi2-4/+3
staging -Wshadow=local patches for 2023-11-13 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmVR7ZISHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZT7YkP/RUaHzka7vJhcAJSFgCviZ7NYZFbDYkT # MT9Hi4XYYkOqS0BQ9xZPZDy47oB4pqZlNfMCUD3vmD8LLdVsUyRIbZxu59SdgTOa # dnNvXIsC16y7Hk6VRfWB4bifOa1rmbF2el5WevA1UpXMRnjkMbtahbXXlSudQpeQ # Y0e5mILKcbLD1Q6RuTounkfZ/C5pJZKycxVrN8YvFBQ2pILR/JtVwCU9rQ525Sgx # tgScQ+Z+S4Pw+hyD8kpnw+xqk/iXprgX7GmOhCiy4yLdndq1nZgXOXnZvuIvG3n2 # cvM+dNTVH32qlLMqNdwAaOjAVStobdt85oiyMTnkBfi1+6B+5I6FzyH31/XhV86t # siCqZ1vsL8N8cuA9mhbKS2eaLrf4ubAyh07SycaKNWfxVMgIAN0rpqaUzKghGcT3 # y9TfFI48zKgCS8AmMuUYy9G6xPlQy726ZHi4yb+t+j2dDx80eAQyXZRPQBiEomND # cIotxEAPdAdl+52lCwMpYPt+rnxGg4EW05de/CrjKag9Fizfz4cOuwCsSp32XuNe # TmE1Gi3pKaX/goLO2oTesZ6h8rbMoGZ3XG7YWoIkDpjb+XKuUXXxg+b1cv/0dntk # Qn6izIFdSscYXakxAkq6ci/3xS0ork3FXjDHihOKj9IWR8YrhqaDZ//XHnIL1Ld7 # QcXs7wElHeJM # =66br # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 04:34:10 EST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-shadow-2023-11-13' of https://repo.or.cz/qemu/armbru: meson: Enable -Wshadow=local block/snapshot: Fix compiler warning with -Wshadow=local Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-13Merge tag 'mem-2023-11-13' of https://github.com/davidhildenbrand/qemu into ↵Stefan Hajnoczi1-10/+12
staging Hi, "Host Memory Backends" and "Memory devices" queue ("mem"): - One virtio-mem fix leading to a QEMU crash in QEMU debug builds # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEG9nKrXNcTDpGDfzKTd4Q9wD/g1oFAmVR4DsRHGRhdmlkQHJl # ZGhhdC5jb20ACgkQTd4Q9wD/g1qKMQ//fe/4mJOXQ8l5OZ3ScpC2K7yoB9dowJiQ # vobja0X0UhyMIOEH4V5RDtMrW3WcYzD2rVwehpLel3QbwcGa7TTB8NtkTx/t4L8P # tRQe3epGvz+0Kkx4kBFcNBYNR5Skl1rg9kcDhYxNmoOLngWjJcDqRBryfc3V9pEs # dl9sWXaQn82MGNQGuWFnTOUeOgg1LIdKMRcU2AzhAhrA/e4BqOof/JW+PVdQfzDq # 4Jhq74pDmKiuH9GmRZgbNlNFX+GxRk63jJrRw4HDAbSD5dBmVnLAjgFZ0sBcKxe0 # HyiGrZOZNIMhMl/GwwQ7NilN03Hl6Hqlx03nz96/2DbiEKr6sOAErIclkUOVlr7k # YeJvFv+iijqyC4XF43OqoIOz8mtkxan8CuiZW/6/FV9mS/Rb3r8of/BnrK2a8/Kh # RJLX3tsmrxFdFDxVXWPw+UYrJy8g0xQP2Ils3OReO8QO9qqCytPqJFQsSHDlK3T3 # 2K5FiDpMu7cjFezLyRF0LkPSWg1CV7D6Vc8mp+amc2K4Ltiyhp4xZ2TBKrEC8HHE # zs+EyEIfsna4SaKwVUVRimWF3+B4GojoAcAD0zju+uhD8Zw+z553zXpr5TSx0Une # cbMs1n5MTzE6pQo1MmL3hu1xaf6Xdx7hnJPlcnjlKXGFol8ghv6tBkHbOQA5B1/H # 7hVX43f3epM= # =7M1K # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Nov 2023 03:37:15 EST # gpg: using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A # gpg: issuer "david@redhat.com" # gpg: Good signature from "David Hildenbrand <david@redhat.com>" [unknown] # gpg: aka "David Hildenbrand <davidhildenbrand@gmail.com>" [full] # gpg: aka "David Hildenbrand <hildenbr@in.tum.de>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 1BD9 CAAD 735C 4C3A 460D FCCA 4DDE 10F7 00FF 835A * tag 'mem-2023-11-13' of https://github.com/davidhildenbrand/qemu: virtio-mem: fix division by zero in virtio_mem_activate_memslots_to_plug() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-13MAINTAINERS: update virtio-fs mailing list addressStefan Hajnoczi1-1/+1
The old virtio-fs mailing list address is no longer in use. Switch to the new mailing list address. Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: German Maglione <gmaglione@redhat.com> Cc: Hanna Czenczek <hreitz@redhat.com> Reviewed-by: German Maglione <gmaglione@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-ID: <20231111004920.148348-1-stefanha@redhat.com>
2023-11-13hw/audio/es1370: Clean up commentPeter Maydell1-2/+7
Replace a sweary comment with one that's a bit more helpful to future readers of the code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Volker Rümelin <vr_qemu@t-online.de> Message-ID: <20231110164318.2197569-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13tests/tsan: Rename the file with the entries that should be ignoredThomas Huth2-5/+5
Let's use a better file name here. Message-ID: <20231109174720.375873-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13test-resv-mem: Fix CID 1523911Eric Auger1-0/+4
Coverity complains about passing "&expected" to "run_range_inverse_array", which dereferences null "expected". I guess the problem is that the compare_ranges() loop dereferences 'e' without testing it. However the loop condition is based on 'ranges' which is garanteed to have the same length as 'expected' given the g_assert_cmpint() just before the loop. So the code looks safe to me. Nevertheless adding a test on expected before the loop to get rid of the warning. Fixes: CID 1523901 Signed-off-by: Eric Auger <eric.auger@redhat.com> Reported-by: Coverity (CID 1523901) Message-ID: <20231110083654.277345-1-eric.auger@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13tests/vm/netbsd: Use Python v3.11Philippe Mathieu-Daudé1-2/+2
We requiere the 'ninja-build', which depends on 'python311': $ pkgin show-deps ninja-build direct dependencies for ninja-build-1.11.1nb1 python311>=3.11.0 So we end up installing both Python v3.10 and v3.11: [31/76] installing python311-3.11.5... [54/76] installing python310-3.10.13... [74/76] installing py310-expat-3.10.13nb1... Then the build system picks Python v3.11, and doesn't find py-expat because we only installed the 3.10 version: python determined to be '/usr/pkg/bin/python3.11' python version: Python 3.11.5 *** Ouch! *** Python's pyexpat module is not found. It's normally part of the Python standard library, maybe your distribution packages it separately? Either install pyexpat, or alleviate the need for it in the first place by installing pip and setuptools for '/usr/pkg/bin/python3.11'. (Hint: NetBSD's pkgsrc debundles this to e.g. 'py310-expat'.) ERROR: python venv creation failed Fix by installing py-expat for v3.11. Remove the v3.10 packages since we aren't using them anymore. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231109150900.91186-1-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13MAINTAINERS: Add a general architecture section for x86Thomas Huth1-0/+11
It's a little bit weird that the files in target/i386/ which are not in a subfolder there do not have any associated maintainer (and thus nobody might be CC:-ed on changes to these files). We should have a general x86 section for these files, similar to what we already have for s390x and mips. Since Paolo is already listed as maintainer for both, the x86 KVM and TCG CPUs, I'd like to suggest him as maintainer for the general files, too. Message-ID: <20230929134551.395438-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13MAINTAINERS: Extend the Stellaris sectionThomas Huth1-0/+2
This header include/hw/timer/stellaris-gptm.h obviously belongs to the Stellaris machines, so let's add it to the corresponding section. And hw/display/ssd0303.c and hw/display/ssd0323.c are only used by hw/arm/stellaris.c, so add them to the corresponding section in the MAINTAINERS file, too. Message-ID: <20231020060936.524988-5-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13MAINTAINERS: Add hw/display/sii9022.c to the Versatile Express sectionThomas Huth1-0/+1
This graphics adapter is only used by the Versatile Express machine, so add it to the corresponding section in MAINTAINERS. Message-ID: <20231020060936.524988-4-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13MAINTAINERS: Add hw/input/ads7846.c to the PXA2XX sectionThomas Huth1-0/+1
The code from hw/input/ads7846.c is only used by hw/arm/spitz.c, so add this file to the same section where hw/arm/spitz.c is listed. Message-ID: <20231020060936.524988-3-thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13MAINTAINERS: Add include/hw/input/pl050.h to the PrimeCell/CMSDK sectionThomas Huth1-0/+1
The corresponding pl050.c file is already listed here, so we should mention the header here, too. Message-ID: <20231020060936.524988-2-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13s390x/pci: only limit DMA aperture if vfio DMA limit reportedMatthew Rosato1-1/+1
If the host kernel lacks vfio DMA limit reporting, do not attempt to shrink the guest DMA aperture. Fixes: df202e3ff3 ("s390x/pci: shrink DMA aperture to be bound by vfio DMA limit") Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Message-ID: <20231110175108.465851-3-mjrosato@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13s390x/pci: bypass vfio DMA counting when using cdevMatthew Rosato1-0/+4
The current code assumes that there is always a vfio group, but that's no longer guaranteed with the iommufd backend when using cdev. In this case, we don't need to track the vfio dma limit anyway. Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Message-ID: <20231110175108.465851-2-mjrosato@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-13host/include/generic/host/atomic128: Fix compilation problem with Clang 17Thomas Huth3-2/+4
When compiling QEMU with Clang 17 on a s390x, the compilation fails: In file included from ../accel/tcg/cputlb.c:32: In file included from /root/qemu/include/exec/helper-proto-common.h:10: In file included from /root/qemu/include/qemu/atomic128.h:62: /root/qemu/host/include/generic/host/atomic128-ldst.h:68:15: error: __sync builtin operation MUST have natural alignment (consider using __ atomic). [-Werror,-Wsync-alignment] 68 | } while (!__sync_bool_compare_and_swap_16(ptr_align, old, new.i)); | ^ In file included from ../accel/tcg/cputlb.c:32: In file included from /root/qemu/include/exec/helper-proto-common.h:10: In file included from /root/qemu/include/qemu/atomic128.h:61: /root/qemu/host/include/generic/host/atomic128-cas.h:36:11: error: __sync builtin operation MUST have natural alignment (consider using __a tomic). [-Werror,-Wsync-alignment] 36 | r.i = __sync_val_compare_and_swap_16(ptr_align, c.i, n.i); | ^ 2 errors generated. It's arguably a bug in Clang since we already use __builtin_assume_aligned() to tell the compiler that the pointer is properly aligned. But according to https://github.com/llvm/llvm-project/issues/69146 it seems like the Clang folks don't see an easy fix on their side and recommend to use a type declared with __attribute__((aligned(16))) to work around this problem. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1934 Message-ID: <20231108085954.313071-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.1 at 2025-01-11 05:35:57 +0000