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2023-11-27target/arm: Set IL bit for pauth, SVE access, BTI trap syndromesPeter Maydell1-3/+3
The syndrome register value always has an IL field at bit 25, which is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32 bit instruction (or for exceptions which aren't traps on a known instruction, like PC alignment faults). This means that our syn_*() functions should always either take an is_16bit argument to determine whether to set the IL bit, or else unconditionally set it. We missed setting the IL bit for the syndrome for three kinds of trap: * an SVE access exception * a pointer authentication check failure * a BTI (branch target identification) check failure All of these traps are AArch64 only, and so the instruction causing the trap is always 64 bit. This means we can unconditionally set the IL bit in the syn_*() function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120150121.3458408-1-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-24Merge tag 'pull-for-8.2-fixes-231123-1' of https://gitlab.com/stsquad/qemu ↵Stefan Hajnoczi32-196/+798
into staging various random fixes for 8.2 - replace fedora-i386 cross compiler with debian - update cirrus MacOS image to Ventura - merge debian-native and debian-amd64 docker images - fix compile of plugins on Windows mingw cross - add some doc notes on semihosting READC - add some doc notes on gdbstub - skip loading debug symbols if we have failed - enable arm-softmmu TCG tests - don't attempt to use native cross builds for linux-user - clean up registers gdb test case (ppc64/s390x) # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmVfXowACgkQ+9DbCVqe # KkQY6Af5AVjPG2aHmixvhTjxEx5dXAH3cGYsWbny3EByT2RijaTBBK/A4OB7RTVV # fr11kGpCkJDk4JPoUz4yTuw6Q+7WBmB0tJJ5wcGyC9cyCjI/PttSTJUC7hiikifw # dg1IVrJZX0ahOpUiDXAtDbeHK1/i95mDRtot40mnyv5HHYHlJKohKsUVtiQEWMeq # 0/X/M5Zq8oJ6wCkbw1nsCqkWpZa7eh4YcB9cGNf87dd0ZJ9M93CbjdSQlsugF2gB # pH+5ZGOj+L/zkbEKoaWJNwYzF4G6hJeLpqP2rLMqRfA5MM43wdd0dJ6gK0ylKeuR # Bo7jC1oEOcuLibZY40OhlOwLTMWiDg== # =ME/l # -----END PGP SIGNATURE----- # gpg: Signature made Thu 23 Nov 2023 09:15:40 EST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-for-8.2-fixes-231123-1' of https://gitlab.com/stsquad/qemu: tests/tcg: finesse the registers check for "hidden" regs configure: don't try a "native" cross for linux-user tests/tcg: enable semiconsole test for Arm tests/tcg: enable arm softmmu tests testing: move arm system tests into their own folder hw/core: skip loading debug on all failures docs/system: clarify limits of using gdbstub in system emulation docs/emulation: expand warning about semihosting tests/tcg: fixup Aarch64 semiconsole test target/nios2: Deprecate the Nios II architecture plugins: fix win plugin tests on cross compile tests/docker: merge debian-native with debian-amd64 .gitlab-ci.d/cirrus: Upgrade macOS to 13 (Ventura) tests/docker: replace fedora-i386 with debian-i686 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-23tests/tcg: finesse the registers check for "hidden" regsAlex Bennée3-37/+69
The reason the ppc64 and s390x test where failing was because gdb hides them although they are still accessible via regnum. We can re-arrange the test a little bit and include these two arches in our test. We also need to be a bit more careful handling remote-registers as the format isn't easily parsed with pure white space separation. Once we fold types like "long long" and "long double" into a single word we can now assert all registers are either listed or elided. Cc: Ilya Leoshkevich <iii@linux.ibm.com> Cc: <qemu-s390x@nongnu.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Daniel Henrique Barboza <danielhb413@gmail.com> Cc: <qemu-ppc@nongnu.org> Cc: Luis Machado <luis.machado@arm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231121153606.542101-1-alex.bennee@linaro.org>
2023-11-23configure: don't try a "native" cross for linux-userAlex Bennée1-10/+13
As 32 bit x86 become rarer we are starting to run into problems with search paths. Although we switched to a Debian container we still favour the native CC on a Bookworm host. As a result we have a broken cross compile setup which then fails to build with: BUILD i386-linux-user guest-tests In file included from /usr/include/linux/stat.h:5, from /usr/include/bits/statx.h:31, from /usr/include/sys/stat.h:465, from /home/alex/lsrc/qemu.git/tests/tcg/multiarch/linux/linux-test.c:28: /usr/include/linux/types.h:5:10: fatal error: asm/types.h: No such file or directory 5 | #include <asm/types.h> | ^~~~~~~~~~~~~ compilation terminated. make[1]: *** [Makefile:119: linux-test] Error 1 make: *** [/home/alex/lsrc/qemu.git/tests/Makefile.include:50: build-tcg-tests-i386-linux-user] Error 2 This is likely to affect more and more linux-user builds so wrap the whole check in a test for softmmu targets (aka bare metal) which don't worry about such header niceties. This allows us to keep using the host compiler for softmmu tests and the roms. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-14-alex.bennee@linaro.org>
2023-11-23tests/tcg: enable semiconsole test for ArmAlex Bennée2-0/+51
This still remains a MANUAL test due to blocking issues. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-13-alex.bennee@linaro.org>
2023-11-23tests/tcg: enable arm softmmu testsAlex Bennée3-10/+397
To make it easier to test 32 bit Arm softmmu issues implement a basic boot.S so we can build the multiarch tests. Currently CHECK_UNALIGNED is disabled as I haven't got the right magic set for it to work. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-12-alex.bennee@linaro.org>
2023-11-23testing: move arm system tests into their own folderAlex Bennée3-3/+2
Prepare for expanding the arm system tests by cleaning up the test directory. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-11-alex.bennee@linaro.org>
2023-11-23hw/core: skip loading debug on all failuresAlex Bennée1-1/+1
ELF_LOAD_FAILED is one of many negative return codes we can have. Lets treat any positive size_t as a success for loading. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-10-alex.bennee@linaro.org>
2023-11-23docs/system: clarify limits of using gdbstub in system emulationAlex Bennée1-1/+12
It seems some users will try and use the gdbstub to debug userspace inside a system emulation. While possible clarify the limitations of this approach and direct the users to a less head scratching way of debugging user-space. Clarifies: https://gitlab.com/qemu-project/qemu/-/issues/1274 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-9-alex.bennee@linaro.org>
2023-11-23docs/emulation: expand warning about semihostingAlex Bennée1-2/+3
A surprising feature of calls like SYS_READC is this can cause QEMU to indefinitely block as there is no handling for EOF. Clarifies: https://gitlab.com/qemu-project/qemu/-/issues/1963 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-8-alex.bennee@linaro.org>
2023-11-23tests/tcg: fixup Aarch64 semiconsole testAlex Bennée1-2/+3
We need to ensure we squash the serial port if we want to hand craft our muxed input. As a bonus emit the example with a V=1 build to make it easier for people to figure out. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-7-alex.bennee@linaro.org>
2023-11-23target/nios2: Deprecate the Nios II architecturePhilippe Mathieu-Daudé3-0/+17
See commit 9ba1caf510 ("MAINTAINERS: Mark the Nios II CPU as orphan"), last contribution from Chris was in 2012 [1] and Marek in 2018 [2]. [1] https://lore.kernel.org/qemu-devel/1352607539-10455-2-git-send-email-crwulff@gmail.com/ [2] https://lore.kernel.org/qemu-devel/805fc7b5-03f0-56d4-abfd-ed010d4fa769@denx.de/ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231117070250.32932-1-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-6-alex.bennee@linaro.org>
2023-11-23plugins: fix win plugin tests on cross compileGreg Manning4-4/+5
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1972 Cross compile gcc is more picky about argument order than msys. Changed the meson command to take the (now renamed) libqemu_plugin_api.a as a lib, rather than an object. This puts it in the right place on both native and cross compile gcc commands Reenable plugins on crossbuilds Signed-off-by: Greg Manning <gmanning@rapitasystems.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231109124326.21106-2-gmanning@rapitasystems.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-5-alex.bennee@linaro.org>
2023-11-23tests/docker: merge debian-native with debian-amd64Alex Bennée6-69/+18
debian-native isn't really needed and suffers from the problem of tracking a distros dependencies rather than the projects. With a little surgery we can make the debian-amd64 container architecture neutral and allow people to use it to build a native QEMU. Rename it so it follows the same non-arch pattern of the other distro containers. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-4-alex.bennee@linaro.org>
2023-11-23.gitlab-ci.d/cirrus: Upgrade macOS to 13 (Ventura)Philippe Mathieu-Daudé3-5/+5
macOS 14 "Sonoma" was released on September 2023 [1]. According to QEMU's support policy, we stop supporting the previous major release two years after the the new major release has been published. Replace the macOS 12 (Monterey) testing by macOS 13 (Ventura, released on October 2022, [2]). Refresh the generated files by running: $ make lcitool-refresh [1] https://www.apple.com/newsroom/2023/09/macos-sonoma-is-available-today/ [2] https://www.apple.com/newsroom/2022/10/macos-ventura-is-now-available/ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20231108162022.76189-1-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-3-alex.bennee@linaro.org>
2023-11-23tests/docker: replace fedora-i386 with debian-i686Daniel P. Berrangé6-53/+203
Fedora is gradually killing off i386 packages in its repos, via a death-by-1000-cuts process. Thus Debian looks like a better long term bet for i686 build testing. It has the added advantage that we can generate it via lcitool too. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231107164109.1449014-1-berrange@redhat.com> [AJB: tweak commit msg, set correct prefix] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-2-alex.bennee@linaro.org>
2023-11-22Merge tag 'pull-riscv-to-apply-20231122' of ↵Stefan Hajnoczi5-57/+85
https://github.com/alistair23/qemu into staging Fourth RISC-V PR for 8.2 This is a few bug fixes for the 8.2 release * Add Zicboz block size to hwprobe * Creat the virt machine FDT before machine init is complete * Don't verify ISA compatibility for zicntr and zihpm * Fix SiFive E CLINT clock frequency * Fix invalid exception on MMU translation stage * Fix mxr bit behavior # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEaukCtqfKh31tZZKWr3yVEwxTgBMFAmVdk4sACgkQr3yVEwxT # gBP6gQ/+NzdRT8Wx/9ynnKs0XwXBwOjQTHDcxCIKLWYrM26c3M+4XEU6IBdg2X1T # qRv9Xal/pXqvAz8tIunF1fNd0Syom4UezcjvLjzipWwS32+D9KEKhKz89aoQc2SQ # lnTBYz6lSUNppp3wj68gNAyPpht+5zVwYZDsjeZCRlAS00dcl26Xde8kt9tJW7zy # tPBvHtJP9AVc+HJdClytEZ79G+EHN5Y4ScoJsVinXSBZs9lIQD+nPmFbxopre6kg # +RUk56eATIlVMISD5pCYyCr3jTebMqVIFY9xtQxb4R09aLYN6+k13NfsJeIcQgaF # MbhAGE0WbXEhKyHe4BuVtyz2k+zYtoh6YSE2Czub2pzPAfpKKWiu4Odi7vHlYejw # Nksn3N7LR3FbhrDst71+EQ28vUuEYfECEFICjzHb+DhxlPxHW9WC4f8ciTUpT57O # HPWYN7zn5Yw97nGBVuITVO7DfcQcw8MS8HcFEelkeDOephiDKr327SWTL+lp5+P5 # fm7PM4Z92GRvT3Voj4mebVxC62CGqehDotWRvXCvc87m4DfLsmpt0nNeX9q18zw+ # phEZ5Q8AMmEnRzpmoXEzzcDWyJIO6huJFad0imTR6MqvXYxsJYIr+wURDB6POelP # SfMqdX9cTu8xJ7Hw4gJT9ZgcTlKsTq5LNpGZ/kLPXS6/y7fgC5Y= # =QK14 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 22 Nov 2023 00:37:15 EST # gpg: using RSA key 6AE902B6A7CA877D6D659296AF7C95130C538013 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6AE9 02B6 A7CA 877D 6D65 9296 AF7C 9513 0C53 8013 * tag 'pull-riscv-to-apply-20231122' of https://github.com/alistair23/qemu: target/riscv/cpu_helper.c: Fix mxr bit behavior target/riscv/cpu_helper.c: Invalid exception on MMU translation stage riscv: Fix SiFive E CLINT clock frequency target/riscv: don't verify ISA compatibility for zicntr and zihpm hw/riscv/virt.c: do create_fdt() earlier, add finalize_fdt() linux-user/riscv: Add Zicboz block size to hwprobe Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-22Merge tag 'seabios-hppa-v13-pull-request' of ↵Stefan Hajnoczi2-0/+0
https://github.com/hdeller/qemu-hppa into staging SeaBIOS-hppa v13 Please pull an update of SeaBIOS-hppa to v13 to fix a system reboot crash in qemu-system-hppa as reported in https://gitlab.com/qemu-project/qemu/-/issues/1991 # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZV0uiQAKCRD3ErUQojoP # X/UEAP4vVLO/21SwO8/UpmImQPGTpoGUxA2DWYHBfjmyVGEoqwEA1sfhqpdahDJ0 # FLSculh9fFG7vWOMCZo2Xnur+X9ahgQ= # =FaBT # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 17:26:17 EST # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'seabios-hppa-v13-pull-request' of https://github.com/hdeller/qemu-hppa: target/hppa: Update SeaBIOS-hppa to version 13 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-22target/riscv/cpu_helper.c: Fix mxr bit behaviorIvan Klokov1-4/+20
According to RISCV Specification sect 9.5 on two stage translation when V=1 the vsstatus(mstatus in QEMU's terms) field MXR, which makes execute-only pages readable, only overrides VS-stage page protection. Setting MXR at HS-level(mstatus_hs), however, overrides both VS-stage and G-stage execute-only permissions. The hypervisor extension changes the behavior of MXR\MPV\MPRV bits. Due to RISCV Specification sect. 9.4.1 when MPRV=1, explicit memory accesses are translated and protected, and endianness is applied, as though the current virtualization mode were set to MPV and the current nominal privilege mode were set to MPP. vsstatus.MXR makes readable those pages marked executable at the VS translation stage. Fixes: 36a18664ba ("target/riscv: Implement second stage MMU") Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231121071757.7178-3-ivan.klokov@syntacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22target/riscv/cpu_helper.c: Invalid exception on MMU translation stageIvan Klokov1-23/+7
According to RISCV privileged spec sect. 5.3.2 Virtual Address Translation Process access-fault exceptions may raise only after PMA/PMP check. Current implementation generates an access-fault for mbare mode even if there were no PMA/PMP errors. This patch removes the erroneous MMU mode check and generates an access-fault exception based on the pmp_violation flag only. Fixes: 1448689c7b ("target/riscv: Allow specifying MMU stage") Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231121071757.7178-2-ivan.klokov@syntacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22riscv: Fix SiFive E CLINT clock frequencyRomán Cárdenas1-1/+1
If you check the manual of SiFive E310 (https://cdn.sparkfun.com/assets/7/f/0/2/7/fe310-g002-manual-v19p05.pdf), you can see in Figure 1 that the CLINT is connected to the real time clock, which also feeds the AON peripheral (they share the same clock). In page 43, the docs also say that the timer registers of the CLINT count ticks from the rtcclk. I am currently playing with bare metal applications both in QEMU and a physical SiFive E310 board and I confirm that the CLINT clock in the physical board runs at 32.768 kHz. In QEMU, the same app produces a completely different outcome, as sometimes a new CLINT interrupt is triggered before finishing other tasks. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1978 Signed-off-by: Rom\ufffd\ufffdn C\ufffd\ufffdrdenas <rcardenas.rod@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231117082840.55705-1-rcardenas.rod@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22target/riscv: don't verify ISA compatibility for zicntr and zihpmClément Chigot1-0/+9
The extensions zicntr and zihpm were officially added in the privilege instruction set specification 1.12. However, QEMU has been implemented them long before it and thus they are forced to be on during the cpu initialization to ensure compatibility (see riscv_cpu_init). riscv_cpu_disable_priv_spec_isa_exts was not updated when the above behavior was introduced, resulting in these extensions to be disabled after all. Signed-off-by: Clément Chigot <chigot@adacore.com> Fixes: c004099330 ("target/riscv: add zicntr extension flag for TCG") Fixes: 0824121660 ("target/riscv: add zihpm extension flag for TCG") Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231114123913.536194-1-chigot@adacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22hw/riscv/virt.c: do create_fdt() earlier, add finalize_fdt()Daniel Henrique Barboza1-29/+42
Commit 49554856f0 fixed a problem, where TPM devices were not appearing in the FDT, by delaying the FDT creation up until virt_machine_done(). This create a side effect (see gitlab #1925) - devices that need access to the '/chosen' FDT node during realize() stopped working because, at that point, we don't have a FDT. This happens because our FDT creation is monolithic, but it doesn't need to be. We can add the needed FDT components for realize() time and, at the same time, do another FDT round where we account for dynamic sysbus devices. In other words, the problem fixed by 49554856f0 could also be fixed by postponing only create_fdt_sockets() and its dependencies, leaving everything else from create_fdt() to be done during init(). Split the FDT creation in two parts: - create_fdt(), now moved back to virt_machine_init(), will create FDT nodes that doesn't depend on additional (dynamic) devices from the sysbus; - a new finalize_fdt() step is added, where create_fdt_sockets() and friends is executed, accounting for the dynamic sysbus devices that were added during realize(). This will make both use cases happy: TPM devices are still working as intended, and devices such as 'guest-loader' have a FDT to work on during realize(). Fixes: 49554856f0 ("riscv: Generate devicetree only after machine initialization is complete") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1925 Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231110172559.73209-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22linux-user/riscv: Add Zicboz block size to hwprobePalmer Dabbelt1-0/+6
Support for probing the Zicboz block size landed in Linux 6.6, which was released a few weeks ago. This provides the user-configured block size when Zicboz is enabled. Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231110173716.24423-1-palmer@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-21target/hppa: Update SeaBIOS-hppa to version 13Helge Deller2-0/+0
SeaBIOS-hppa version 13 fixes a system reboot crash as reported in https://gitlab.com/qemu-project/qemu/-/issues/1991 Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-21Update version for v8.2.0-rc1 releasev8.2.0-rc1Stefan Hajnoczi1-1/+1
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21Merge tag 'pull-lu-20231121' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi1-1/+1
linux-user: Fix loaddr computation for some elf files # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmVc0wUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV97FQf+LHUf8Np5uiPwmu0f # SUVlfxccp1KjQE2pppQ16TReNV/GsJd1u4VvInhDZSMrwceCmi1T8q3n75Vff5h0 # mUaCsNKCBVOgmvjtQ+9gOCEtPNYTpEBZyfs6I4iX4+mpkDSMON28CDakILHRSAG/ # NwFs3I8E773dERR6tJmvBjAKr0a7QYMHHbXFkGN0QSaCo3YVuqMgZj1+5oGGUMun # 8f1HSRDvtAtKQgCmzsP9FEjpS4/T2ElppS0vvy063gD60Vkg9h8gyT/eFkQQMiHq # SKo1nvhuCd/xMW67RIdm6fyvgkiDvNBV5/ae8Zqdlk7TGDQP24/V3gWtTEHyQWu6 # QteijA== # =ryU1 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 10:55:49 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-lu-20231121' of https://gitlab.com/rth7680/qemu: linux-user: Fix loaddr computation for some elf files Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21Revert "tests/avocado: Enable reverse_debugging.py tests in gitlab CI"Thomas Huth1-0/+8
This reverts commit c4d74ab24a02c90b7a3240510b3dd4e1bec536dd. The reverse debugging test is sometimes still failing. See: https://gitlab.com/qemu-project/qemu/-/issues/1992 Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-ID: <20231121100842.677363-1-thuth@redhat.com>
2023-11-21Merge tag 'pull-xenfv-20231121' of git://git.infradead.org/users/dwmw2/qemu ↵Stefan Hajnoczi2-3/+22
into staging Xen fixes for 8.2-rc1 • Disable default serial when xen-console is used • Fix Coverity warning in xen-block # -----BEGIN PGP SIGNATURE----- # # iQJIBAABCAAyFiEEvgfZ/VSAmrLEsP9fY3Ys2mfi81kFAmVcmrAUHGR3bXcyQGlu # ZnJhZGVhZC5vcmcACgkQY3Ys2mfi81njqg/8DFr03kVfwRujIZXDROoq40vjgdOF # MoGgowDNapliXiecVcHzdvFXgRxwr9bhpX5eDEtfgROoH8mbPPd4YZJHdPNM0Yc3 # 0hoSWrIYocsYRAIoozXrtsNw8ep2vSEPNv5+CIVYkkie/mLs02cy43q09cJDzABx # DvmSfC5o5JCs/x3qPLM6ydhnTaUipuPt1wnG9xaJLWgm/U9pK6Ba9w1eNGn8EE7m # ekzpv9lYfCd/KbPogtXAEd7nkCOi/lKQVJmU7auXFi8FKwZNoKOYl3cTVln/EFmT # az3qLSHgOZwElNQEYn0mBa/RgAQ2K9X7n12TgxG30VSUmajxJnl/eKy4ISyaAmwY # vNVhdsXQICqM4OYaD2j8RiXX5YNtIC+MBb7nlUN7invKXE9ZylHbXvOstkUCjQ34 # x9CMVIibPoWk7XGUX+r7KUSwSQnpelVbqBWltkmgNjYuUIShDT6r5cOrYdM2orii # UYOqPJqchbEDNoGwJK45EOSn8Ss5geAWuM7dFL0AuwZAbcKAqGG6vihPnDJyhnWA # EPv2/5h2Vi24fqeWz3W+hckm8LXrc2Ow8A0rY3WAz7CvmBTgYCPx4d4kdTU6Gysn # i8DRoKMhZS9WvHPPxY1v8+ysG1UCCNFe4qH0Wgv+ubSbr5GaK2igWIBQ5bXnuYL8 # R4Ef5pPLpa2jiF4= # =cWon # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 06:55:28 EST # gpg: using RSA key BE07D9FD54809AB2C4B0FF5F63762CDA67E2F359 # gpg: issuer "dwmw2@infradead.org" # gpg: Good signature from "David Woodhouse <dwmw2@infradead.org>" [unknown] # gpg: aka "David Woodhouse <dwmw2@exim.org>" [unknown] # gpg: aka "David Woodhouse <david@woodhou.se>" [unknown] # gpg: aka "David Woodhouse <dwmw2@kernel.org>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: BE07 D9FD 5480 9AB2 C4B0 FF5F 6376 2CDA 67E2 F359 * tag 'pull-xenfv-20231121' of git://git.infradead.org/users/dwmw2/qemu: hw/xen: clean up xen_block_find_free_vdev() to avoid Coverity false positive vl: disable default serial when xen-console is enabled Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into stagingStefan Hajnoczi29-97/+374
Block layer patches - Fix graph lock related deadlocks with the stream job - ahci: Fix legacy software reset - ide/via: Fix switch between compatibility and native mode # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmVcmYoRHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9YDzw/7BD6wZpyCsDbFu9Jbt0L894tYQls7otnR # yeAIaZVqSkDcMK8VBD/xAjV8UgX194oKPi42CDgS73avd0cSHLIM5cNgGkwCrMWS # ry5uuOP6EWVMPPR/129cpH8uGvkl+qwCQf5gB13/8NvMbeN2mHOTC6WW+VA20vb0 # V0DJXhYszVzXa3L1a/m6f4Jwj54tTeZ56JcBblL3wi/soklb45gsnPJaHeGb3rzK # yjPkw+kpVXTVbpacobGmzmjlD3Yqk69NexP2kyU1w2lqPnemYPH+9sa+7RxMspkj # InQvqq6TFtMOrC/65/527p2ENRUOxn7Xwsa1+Hnar2i3BoyGugWE8GPxJDBxAWW4 # INJtpxIpiA7Scd26VBCNVstVe5EuyxkP97T85cgNUMgeE58y3i51i6eHd4GUIR7v # PNc5TsSbnVV8sQ7RsXka4hRyjndIPRB0CBePydDoBz6zaGmcVU6ep0Oppah9gVu9 # CU0dBz2jV0r1dFhU1eZkCbd1ufdR93R/iD3gBD4vj1xSL3l+9OE/FKdrVE66uElL # iAsHp3cimkPuWAx/jZaeAC7BDI0XS6s1TimddqJx90f2mZjkq8cmVp+HoVNP0jRQ # VP6AIQy6is+P4QtDSekgXVJE8K95ngBzsr+ittR8jF4q67QzHVjLmJ9ZBXyrowlz # gtZTy2WPxbM= # =8dXj # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 06:50:34 EST # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of https://repo.or.cz/qemu/kevin: hw/ide/via: implement legacy/native mode switching ide/via: don't attempt to set default BAR addresses ide/pci: introduce pci_ide_update_mode() function ide/ioport: move ide_portio_list[] and ide_portio_list2[] definitions to IDE core iotests: Test two stream jobs in a single iothread stream: Fix AioContext locking during bdrv_graph_wrlock() block: Fix deadlocks in bdrv_graph_wrunlock() block: Fix bdrv_graph_wrlock() call in blk_remove_bs() hw/ide/ahci: fix legacy software reset Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21linux-user: Fix loaddr computation for some elf filesRichard Henderson1-1/+1
The file offset of the load segment is not relevant to the low address, only the beginning of the virtual address page. Cc: qemu-stable@nongnu.org Fixes: a93934fecd4 ("elf: take phdr offset into account when calculating the program load address") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1952 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-21hw/ide/via: implement legacy/native mode switchingMark Cave-Ayland1-2/+37
Allow the VIA IDE controller to switch between both legacy and native modes by calling pci_ide_update_mode() to reconfigure the device whenever PCI_CLASS_PROG is updated. This patch moves the initial setting of PCI_CLASS_PROG from via_ide_realize() to via_ide_reset(), and removes the direct setting of PCI_INTERRUPT_PIN during PCI bus reset since this is now managed by pci_ide_update_mode(). This ensures that the device configuration is always consistent with respect to the currently selected mode. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231116103355.588580-5-mark.cave-ayland@ilande.co.uk> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21ide/via: don't attempt to set default BAR addressesMark Cave-Ayland1-5/+0
The via-ide device currently attempts to set the default BAR addresses to the values shown in the datasheet, but this doesn't work for 2 reasons: firstly BARS 1-4 do not set the bottom 2 bits to PCI_BASE_ADDRESS_SPACE_IO, and secondly the initial PCI bus reset clears the values of all PCI device BARs after the device itself has been reset. Remove the setting of the default BAR addresses from via_ide_reset() to ensure there is no doubt that these values are never exposed to the guest. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231116103355.588580-4-mark.cave-ayland@ilande.co.uk> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21ide/pci: introduce pci_ide_update_mode() functionMark Cave-Ayland2-0/+85
This function reads the value of the PCI_CLASS_PROG register for PCI IDE controllers and configures the PCI BARs and/or IDE ioports accordingly. In the case where we switch to legacy mode, the PCI BARs are set to return zero (as suggested in the "PCI IDE Controller" specification), the legacy IDE ioports are enabled, and the PCI interrupt pin cleared to indicate legacy IRQ routing. Conversely when we switch to native mode, the legacy IDE ioports are disabled and the PCI interrupt pin set to indicate native IRQ routing. The contents of the PCI BARs are unspecified, but this is not an issue since if a PCI IDE controller has been switched to native mode then its BARs will need to be programmed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231116103355.588580-3-mark.cave-ayland@ilande.co.uk> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21ide/ioport: move ide_portio_list[] and ide_portio_list2[] definitions to IDE ↵Mark Cave-Ayland3-12/+15
core These definitions are present in ioport.c which is currently only available when CONFIG_IDE_ISA is enabled. Move them to the IDE core so that they can be made available to PCI IDE controllers that support switching to legacy mode. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-ID: <20231116103355.588580-2-mark.cave-ayland@ilande.co.uk> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21iotests: Test two stream jobs in a single iothreadKevin Wolf2-0/+85
This tests two parallel stream jobs that will complete around the same time and run on two different disks in the same iothreads. It is loosely based on the bug report at https://issues.redhat.com/browse/RHEL-1761. For me, this test hangs reliably with the originally reported bug in blk_remove_bs(). After fixing it, it intermittently hangs for the bugs fixed after it, missing AioContext unlocking in bdrv_graph_wrunlock() and in stream_prepare(). The deadlocks seem to happen more frequently when the test directory is on tmpfs. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231115172012.112727-5-kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21stream: Fix AioContext locking during bdrv_graph_wrlock()Kevin Wolf1-2/+2
In stream_prepare(), we need to temporarily drop the AioContext lock that job_prepare_locked() took for us while calling the graph write lock functions which can poll. All block nodes related to this block job are in the same AioContext, so we can pass any of them to bdrv_graph_wrlock()/ bdrv_graph_wrunlock(). Unfortunately, the one that we picked is base, which can be NULL - and in this case the AioContext lock is not released and deadlocks can occur. Fix this by passing s->target_bs, which is never NULL. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231115172012.112727-4-kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21block: Fix deadlocks in bdrv_graph_wrunlock()Kevin Wolf20-75/+122
bdrv_graph_wrunlock() calls aio_poll(), which may run callbacks that have a nested event loop. Nested event loops can depend on other iothreads making progress, so in order to allow them to make progress it must not hold the AioContext lock of another thread while calling aio_poll(). This introduces a @bs parameter to bdrv_graph_wrunlock() whose AioContext is temporarily dropped (which matches bdrv_graph_wrlock()), and a bdrv_graph_wrunlock_ctx() that can be used if the BlockDriverState doesn't necessarily exist any more when unlocking. This also requires a change to bdrv_schedule_unref(), which was relying on the incorrectly taken lock. It needs to take the lock itself now. While this is a separate bug, it can't be fixed a separate patch because otherwise the intermediate state would either deadlock or try to release a lock that we don't even hold. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231115172012.112727-3-kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> [kwolf: Fixed up bdrv_schedule_unref()] Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21block: Fix bdrv_graph_wrlock() call in blk_remove_bs()Kevin Wolf1-1/+3
While not all callers of blk_remove_bs() are correct in this respect, the assumption in the function is that callers hold the AioContext lock of the BlockBackend (this is required by the drain calls in it). In order to avoid deadlock in the nested event loop, bdrv_graph_wrlock() has then to be called with the root BlockDriverState as its parameter instead of NULL, so that this AioContext lock is temporarily dropped. Fixes: https://issues.redhat.com/browse/RHEL-1761 Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231115172012.112727-2-kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21hw/ide/ahci: fix legacy software resetNiklas Cassel1-1/+26
Legacy software contains a standard mechanism for generating a reset to a Serial ATA device - setting the SRST (software reset) bit in the Device Control register. Serial ATA has a more robust mechanism called COMRESET, also referred to as port reset. A port reset is the preferred mechanism for error recovery and should be used in place of software reset. Commit e2a5d9b3d9c3 ("hw/ide/ahci: simplify and document PxCI handling") improved the handling of PxCI, such that PxCI gets cleared after handling a non-NCQ, or NCQ command (instead of incorrectly clearing PxCI after receiving anything - even a FIS that failed to parse, which should NOT clear PxCI, so that you can see which command slot that caused an error). However, simply clearing PxCI after a non-NCQ, or NCQ command, is not enough, we also need to clear PxCI when receiving a SRST in the Device Control register. A legacy software reset is performed by the host sending two H2D FISes, the first H2D FIS asserts SRST, and the second H2D FIS deasserts SRST. The first H2D FIS will not get a D2H reply, and requires the FIS to have the C bit set to one, such that the HBA itself will clear the bit in PxCI. The second H2D FIS will get a D2H reply once the diagnostic is completed. The clearing of the bit in PxCI for this command should ideally be done in ahci_init_d2h() (if it was a legacy software reset that caused the reset (a COMRESET does not use a command slot)). However, since the reset value for PxCI is 0, modify ahci_reset_port() to actually clear PxCI to 0, that way we can avoid complex logic in ahci_init_d2h(). This fixes an issue for FreeBSD where the device would fail to reset. The problem was not noticed in Linux, because Linux uses a COMRESET instead of a legacy software reset by default. Fixes: e2a5d9b3d9c3 ("hw/ide/ahci: simplify and document PxCI handling") Reported-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Message-ID: <20231108222657.117984-1-nks@flawful.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-21hw/xen: clean up xen_block_find_free_vdev() to avoid Coverity false positiveDavid Woodhouse1-3/+21
Coverity couldn't see that nr_existing was always going to be zero when qemu_xen_xs_directory() returned NULL in the ENOENT case (CID 1523906). Perhaps more to the point, neither could Peter at first glance. Improve the code to hopefully make it clearer to Coverity and human reviewers alike. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
2023-11-21vl: disable default serial when xen-console is enabledDavid Woodhouse1-0/+1
If a Xen console is configured on the command line, do not add a default serial port. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Paul Durrant <paul@xen.org>
2023-11-21Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into ↵Stefan Hajnoczi6-13/+60
staging UI: fixes for 8.2-rc1 # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmVciOwcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5VtiD/oDEfDSwTxkAD6TMFoY # n2XlzrElTAwYl0lgzzWHrdfoR2vtplIz3gK7u7MCa+rjUMowZbV3EBrMYDMoMWVU # NkuUeSZsHYuXjaKt/nCqnmxklmq0tGN9NOwdOD1V++u257qbkUSl2w7/K0xEohAs # NAeF3wWoCArQyjLD4K6LVsMe9IMrOP1VyGYrKBKQ91xpsuagkrjJt8RnO9MwodNs # 8a65HRKq7HPXvMqZF7v4HgZ2pa1vrWZv4zVTraUBHaW9XpdIoiAd2+WeshjuawhO # G6nQFpHVnQb8FBLrg+f5RItH+CjxhGvBa4DZmuGl1Y3s/fXN2N5QpUNIBqhgtE4P # fZ+iXIpyE8sqj0TThnusszgBGWKadVjQJ8nVEVTKHzXtIa2mthF2MyY/EgnR4zQa # 0H0YiE0SXYvoHxaErkvAfdt75OH0JBhiDcclFb1axFY2dhcgMuM7q7CR5HeO4fRd # UEvLb8K7TLPtBGBxH5Z9z+ecxN6jIIqetosbbWFAfuIbd+at64AMh2N/MYZk2Chy # 7E6ZGqNb8htOo2R5MitijpTm48vTs0gGjmyq7RHifG/yDHSUrPLrOgDkSC3IKY7y # Xc9aK6fqm0l6LTLDbmZhM/znoc/1TErw/T3S4rqky0wvFTpuhP29vwd8WuyQ1ZpS # viNCue6q0tScUz179wKEfYfyag== # =o08n # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 05:39:40 EST # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu: ui/pixman-minimal.h: fix empty allocation vl: add missing display_remote++ ui/console: fix default VC when there are no display ui: use "vc" chardev for dbus, gtk & spice-app vl: revert behaviour for -display none Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21Merge tag 'pull-target-arm-20231121' of ↵Stefan Hajnoczi18-68/+56
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * enable FEAT_RNG on Neoverse-N2 * hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ * Fix SME FMOPA (16-bit), BFMOPA * hw/core/machine: Constify MachineClass::valid_cpu_types[] * stm32f* machines: Report error when user asks for wrong CPU type * hw/arm/fsl-imx: Do not ignore Error argument # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmVchLYZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3kHMD/47tKxzrsXc6+V9esRQGi2H # 1hAgLBwglEdxLXokF+Di41sh/fvK7wYVXO/hiWlq+9h3kG3D/u1N5r1TdMPMUb9j # 4Sg3rOejn7nzkxVZ6MZ/K/1j84C9bfrt4sboVHZVRvWuvbiyuTuivEr4IqLYO4x3 # AIwhFMQ5gbNrmClZh/DBxj0keO13cp63Fg2JSSICdi+1Dw9rRXTyhJloMu1omeqc # k/BXzjSeNXpLSMyGWBR3uaPcJBaGC1xnz3Z1V7fUY1EYD2Cu1oo5lEZ9aNO5t30d # XW/qVGLa3b1Cb7WuEO247RnU3N2oZotozjFtdj/8IQoYWspM9RHyipEimUlegVdO # 3fpu8QGsN1ljNiwjdk0i6OwS7SGxcPtteFOaqEf/Yogj4EOKTn/Rx5TT4vJ5DhmI # 2w/9J15JWDIE1paNwecuFWbxCOOzSsOtSxzuyLSZDU3GlNfJ4zoF6YboROLYfejy # NXZABFhGd/0ykX7r0VY1GGYXUQ+akv6q+VDmVZCP9gMiRUiqmFPwMLMLlcuHb8G5 # 8UztN5SvOG2EYXj28Zx0BnGCNiGdI15rWMb0veqAtbnn3yEdltW3O475BAhZ0PB7 # OVpLWnXwmWURm/BGlwb1PH5s3kgWgzOebcBgcnCftwFQ8EedQAQDA5FmT+nK5SfV # VoOf89PngTubU6B3BOfeBw== # =thIa # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 05:21:42 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20231121' of https://git.linaro.org/people/pmaydell/qemu-arm: hw/arm/fsl-imx: Do not ignore Error argument hw/arm/stm32f100: Report error when incorrect CPU is used hw/arm/stm32f205: Report error when incorrect CPU is used hw/arm/stm32f405: Report error when incorrect CPU is used hw/core/machine: Constify MachineClass::valid_cpu_types[] target/arm: Fix SME FMOPA (16-bit), BFMOPA hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ target/arm: enable FEAT_RNG on Neoverse-N2 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into stagingStefan Hajnoczi40-46/+112
# -----BEGIN PGP SIGNATURE----- # Version: GnuPG v1 # # iQEcBAABAgAGBQJlXF+GAAoJEO8Ells5jWIROT0H/RGk64ds4eiKskWxwG9p8K8s # wCLdgadf/PRnKmMLR3i5gMX87Db83nUtX/tEgoNxSGuvTdK/JRuqf2oMLv5AOF27 # 6573reJW1z0Ho9Se5JW+DPI18hX7YzqwyJQ9QslGOSRXJb20O4iC2rICfI8MeFsW # tBTsBcJ4qwsVK4nqY/3Tz57lhZLF2xYZtdgvxS4urqg/PrcbAMq8SSB8cq7tjUUs # sgDMQQx4n/r8wlBJE1nnvF/NxtLyTj/rrS9J1rF7ztp/suea/vHxM3t9vTqjLSlY # TyFORcfSCK2edp2+QwARJTTU9FlnuSwf28Pnm2lMQjp5HjBO20bpCBIWGQl6C9A= # =T88Y # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 02:43:02 EST # gpg: using RSA key EF04965B398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [full] # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * tag 'net-pull-request' of https://github.com/jasowang/qemu: net: do not delete nics in net_cleanup() net: Update MemReentrancyGuard for NIC net: Provide MemReentrancyGuard * to qemu_new_nic() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21Merge tag 'pull-ppc-20231121' of https://github.com/legoater/qemu into stagingStefan Hajnoczi5-32/+343
ppc queue: * PNV I2C fixes * VSX instruction fix when converting floating point to integer values # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmVcZ18ACgkQUaNDx8/7 # 7KG1GBAAopdIWc33pY1kaJlHxXDDtTxShWT384r62unPO0vaDtvmlLBvD0kTRIzk # E6OcWeGS/L2D03nI127o5Y677koL20TlOpsR4fZdOwbQUSSVTMsLN5m8Rqvu4Ptx # zA8t/Oio+RTxkZ1SHRuEQNC5EWzFklm5R95zyvLEAbMdJ44thlXyo9KgWe8XoBBV # tkreEzWvv4F4Nf7nZYnxvOIHsi/8No0bMMjBNGC/v+svpayuaWmsCP4/4vmVRYRP # 28R6uMooo9xu0X6oBzqbAV6y6XFSP8pwsvVPd1yAbFhS3w2qw18VpWoMUl2UkVGx # ZNNHjt3HPtGAEtnWAdvzVS8sFi929pHf2v5/h8gEhfZ2e4NVS1zJj3K3OqJgWfEB # XjiIO4NF4gnbXKIlvZX8m5RqdtxbdKx7BVmJtlzJd7IDERRLe0cNSCZ06s/GcICi # AHtxhyA5GGWs2HDQwkOimwDOholjjVbz/sIcHLCpm/jyxcdk9VwE6hBO/9nTcntg # IaQ/kWHlbQgTNXNuFDBwiOMuEQ5G4bb6sdqH+CWZU/owFqgXHIlki7oneX6SB09T # GUyVwScLWlspCJRpX/y4ubyfGB3ZqAQ9REita4YIMveDvNU83LS344MRrBpzQ+ZI # 1yCoHdBsNUkpr9dN/uwkjDSBlDoyWJ2TAgQHsprNUD04ChML7Fs= # =qx4p # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 03:16:31 EST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [unknown] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20231121' of https://github.com/legoater/qemu: ppc/pnv: Fix PNV I2C invalid status after reset ppc/pnv: PNV I2C engines assigned incorrect XSCOM addresses target/ppc: Fix bugs in VSX_CVT_FP_TO_INT and VSX_CVT_FP_TO_INT2 macros ppc/pnv: Fix potential overflow in I2C model Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21Merge tag 'pull-loongarch-20231121' of https://gitlab.com/gaosong/qemu into ↵Stefan Hajnoczi1-0/+3
staging fixes tcg_out_mov aborted. # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZVwXJgAKCRBAov/yOSY+ # 30HKBAC4+3oAaMqRDEBTlYT0oHmU3IVRv7Pkuht72YZ57qQwjq21jMpxRdeuAAT2 # McGzDIH/IbF0qG1HBako00jiwgGpx90aBU0KwOVgBjyjvUK2VXE268UoRs+WYVG/ # 7ljOHEnpvwJVTquAtDNFZIw0EFwiF75MP2rKvrSG8KmmrSu4hg== # =oHNA # -----END PGP SIGNATURE----- # gpg: Signature made Mon 20 Nov 2023 21:34:14 EST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20231121' of https://gitlab.com/gaosong/qemu: tcg/loongarch64: Fix tcg_out_mov() Aborted Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-21ui/pixman-minimal.h: fix empty allocationManos Pitsidianakis1-2/+46
In the minimal pixman API stub that is used when the real pixman dependency is missing a NULL dereference happens when virtio-gpu-rutabaga allocates a pixman image with bits = NULL and rowstride_bytes = zero. A buffer of rowstride_bytes * height is allocated which is NULL. However, in that scenario pixman calculates a new stride value based on given width, height and format size. This commit adds a helper function that performs the same logic as pixman. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20231121093840.2121195-1-manos.pitsidianakis@linaro.org>
2023-11-21vl: add missing display_remote++Marc-André Lureau1-0/+2
We should also consider -display vnc= as setting up a remote display, and not attempt to add another default one. The display_remote++ in qemu_setup_display() isn't necessary at this point, but is there for completeness and further usages of the variable. Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1988 Fixes: commit 484629fc81 ("vl: simplify display_remote logic ") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2023-11-21ui/console: fix default VC when there are no displayMarc-André Lureau1-10/+8
When display is "none", we may still have remote displays (I think it would be simpler if VNC/Spice were regular display btw). Return the default VC then, and set them up to fix a regression when using remote display and it used the TTY instead. Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1989 Fixes: commit 1bec1cc0d ("ui/console: allow to override the default VC") Reported-by: German Maglione <gmaglione@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.1 at 2025-01-10 21:45:53 +0000