aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2020-03-18Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200317' into stagingPeter Maydell3-241/+122
Fix tcg/i386 bug vs sari_vec. Fix tcg-runtime-gvec.c vs i386 without avx. # gpg: Signature made Tue 17 Mar 2020 18:58:14 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20200317: tcg: Remove tcg-runtime-gvec.c DO_CMP0 tcg: Tidy tcg-runtime-gvec.c DUP* tcg: Tidy tcg-runtime-gvec.c types tcg: Remove CONFIG_VECTOR16 tcg/i386: Bound shift count expanding sari_vec Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-18Merge remote-tracking branch ↵Peter Maydell54-701/+1497
'remotes/stsquad/tags/pull-testing-and-gdbstub-170320-1' into staging Testing and gdbstub updates: - docker updates for VirGL - re-factor gdbstub for static GDBState - re-factor gdbstub for dynamic arrays - add SVE support to arm gdbstub - add some guest debug tests to check-tcg - add aarch64 userspace register tests - remove packet size limit to gdbstub - simplify gdbstub monitor code - report vContSupported in gdbstub to use proper single-step # gpg: Signature made Tue 17 Mar 2020 17:47:46 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-gdbstub-170320-1: (28 commits) gdbstub: Fix single-step issue by confirming 'vContSupported+' feature to gdb gdbstub: do not split gdb_monitor_write payload gdbstub: change GDBState.last_packet to GByteArray tests/tcg/aarch64: add test-sve-ioctl guest-debug test tests/tcg/aarch64: add SVE iotcl test tests/tcg/aarch64: add a gdbstub testcase for SVE registers tests/guest-debug: add a simple test runner configure: allow user to specify what gdb to use tests/tcg/aarch64: userspace system register test target/arm: don't bother with id_aa64pfr0_read for USER_ONLY target/arm: generate xml description of our SVE registers target/arm: default SVE length to 64 bytes for linux-user target/arm: explicitly encode regnum in our XML target/arm: prepare for multiple dynamic XMLs gdbstub: extend GByteArray to read register helpers target/i386: use gdb_get_reg helpers target/m68k: use gdb_get_reg helpers target/arm: use gdb_get_reg helpers gdbstub: add helper for 128 bit registers gdbstub: move mem_buf to GDBState and use GByteArray ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-18Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2020-03-17' ↵Peter Maydell6-26/+26
into staging Error reporting patches for 2020-03-17 # gpg: Signature made Tue 17 Mar 2020 16:30:49 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-error-2020-03-17: hw/sd/ssi-sd: fix error handling in ssi_sd_realize xen-block: Use one Error * variable instead of two hw/misc/ivshmem: Use one Error * variable instead of two Use &error_abort instead of separate assert() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-18Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.0-20200317' ↵Peter Maydell29-853/+863
into staging ppc patch queue 2020-03-17 Here's my final pull request for the qemu-5.0 soft freeze. Sorry this is just under the wire - I hit some last minute problems that took a while to fix up and retest. Highlights are: * Numerous fixes for the FWNMI feature * A handful of cleanups to the device tree construction code * Numerous fixes for the spapr-vscsi device * A number of fixes and cleanups for real mode (MMU off) softmmu handling * Fixes for handling of the PAPR RMA * Better handling of hotplug/unplug events during boot * Assorted other fixes # gpg: Signature made Tue 17 Mar 2020 09:55:07 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-5.0-20200317: (45 commits) pseries: Update SLOF firmware image ppc/spapr: Ignore common "ibm,nmi-interlock" Linux bug ppc/spapr: Implement FWNMI System Reset delivery target/ppc: allow ppc_cpu_do_system_reset to take an alternate vector ppc/spapr: Allow FWNMI on TCG ppc/spapr: Fix FWNMI machine check interrupt delivery ppc/spapr: Add FWNMI System Reset state ppc/spapr: Change FWNMI names ppc/spapr: Fix FWNMI machine check failure handling spapr: Rename DT functions to newer naming convention spapr: Move creation of ibm,architecture-vec-5 property spapr: Move creation of ibm,dynamic-reconfiguration-memory dt node spapr/rtas: Reserve space for RTAS blob and log pseries: Update SLOF firmware image ppc/spapr: Move GPRs setup to one place target/ppc: Fix rlwinm on ppc64 spapr/xive: use SPAPR_IRQ_IPI to define IPI ranges exposed to the guest hw/scsi/spapr_vscsi: Convert debug fprintf() to trace event hw/scsi/spapr_vscsi: Prevent buffer overflow hw/scsi/spapr_vscsi: Do not mix SRP IU size with DMA buffer size ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell116-767/+1161
* Bugfixes all over the place * get/set_uint cleanups (Felipe) * Lock guard support (Stefan) * MemoryRegion ownership cleanup (Philippe) * AVX512 optimization for buffer_is_zero (Robert) # gpg: Signature made Tue 17 Mar 2020 15:01:54 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (62 commits) hw/arm: Let devices own the MemoryRegion they create hw/arm: Remove unnecessary memory_region_set_readonly() on ROM alias hw/ppc/ppc405: Use memory_region_init_rom() with read-only regions hw/arm/stm32: Use memory_region_init_rom() with read-only regions hw/char: Let devices own the MemoryRegion they create hw/riscv: Let devices own the MemoryRegion they create hw/dma: Let devices own the MemoryRegion they create hw/display: Let devices own the MemoryRegion they create hw/core: Let devices own the MemoryRegion they create scripts/cocci: Patch to let devices own their MemoryRegions scripts/cocci: Patch to remove unnecessary memory_region_set_readonly() scripts/cocci: Patch to detect potential use of memory_region_init_rom hw/sparc: Use memory_region_init_rom() with read-only regions hw/sh4: Use memory_region_init_rom() with read-only regions hw/riscv: Use memory_region_init_rom() with read-only regions hw/ppc: Use memory_region_init_rom() with read-only regions hw/pci-host: Use memory_region_init_rom() with read-only regions hw/net: Use memory_region_init_rom() with read-only regions hw/m68k: Use memory_region_init_rom() with read-only regions hw/display: Use memory_region_init_rom() with read-only regions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell1-1/+1
staging Pull request # gpg: Signature made Tue 17 Mar 2020 15:18:23 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: block/io: fix bdrv_co_do_copy_on_readv Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17gdbstub: Fix single-step issue by confirming 'vContSupported+' feature to gdbChangbin Du1-1/+1
Recently when debugging an arm32 system on qemu, I found sometimes the single-step command (stepi) is not working. This can be reproduced by below steps: 1) start qemu-system-arm -s -S .. and wait for gdb connection. 2) start gdb and connect to qemu. In my case, gdb gets a wrong value (0x60) for PC, which is an another bug. 3) After connected, type 'stepi' and expect it will stop at next ins. But, it has never stopped. This because: 1) We doesn't report ‘vContSupported’ feature to gdb explicitly and gdb think we do not support it. In this case, gdb use a software breakpoint to emulate single-step. 2) Since gdb gets a wrong initial value of PC, then gdb inserts a breakpoint to wrong place (PC+4). Not only for the arm target, Philippe has also encountered this on MIPS. Probably gdb has different assumption for different architectures. Since we do support ‘vContSupported’ query command, so let's tell gdb that we support it. Before this change, gdb send below 'Z0' packet to implement single-step: gdb_handle_packet: Z0,4,4 After this change, gdb send "vCont;s.." which is expected: gdb_handle_packet: vCont? put_packet: vCont;c;C;s;S gdb_handle_packet: vCont;s:p1.1;c:p1.-1 Signed-off-by: Changbin Du <changbin.du@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200221002559.6768-1-changbin.du@gmail.com> [AJB: fix for static gdbstub] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-Id: <20200316172155.971-29-alex.bennee@linaro.org>
2020-03-17gdbstub: do not split gdb_monitor_write payloadDamien Hedde1-20/+3
Since we can now send packets of arbitrary length: simplify gdb_monitor_write() and send the whole payload in one packet. Suggested-by: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191211160514.58373-3-damien.hedde@greensocs.com> Message-Id: <20200316172155.971-28-alex.bennee@linaro.org>
2020-03-17gdbstub: change GDBState.last_packet to GByteArrayDamien Hedde1-18/+21
Remove the packet size upper limit by using a GByteArray instead of a statically allocated array for last_packet. Thus we can now send big packets. Also remove the last_packet_len field and use last_packet->len instead. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191211160514.58373-2-damien.hedde@greensocs.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-27-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: add test-sve-ioctl guest-debug testAlex Bennée2-2/+94
This test exercises the gdbstub while runing the sve-iotcl test. I haven't plubmed it into make system as we need a way of verifying if gdb has the right support for SVE. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200316172155.971-26-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: add SVE iotcl testAlex Bennée2-0/+74
This is a fairly bare-bones test of setting the various vector sizes for SVE which will only fail if the PR_SVE_SET_VL can't reduce the user-space vector length by powers of 2. However we will also be able to use it in a future test which exercises the GDB stub. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-25-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: add a gdbstub testcase for SVE registersAlex Bennée3-0/+100
A very simple test case which sets and reads SVE registers while running a test case. We don't really need to compile a SVE binary for this case but we will later so keep it simple for now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-24-alex.bennee@linaro.org>
2020-03-17tests/guest-debug: add a simple test runnerAlex Bennée1-0/+57
The test runners job is to start QEMU with guest debug enabled and then spawn a gdb process running a test script that exercises the functionality it wants to test. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-23-alex.bennee@linaro.org>
2020-03-17configure: allow user to specify what gdb to useAlex Bennée1-0/+9
This is useful, especially when testing relatively new gdbstub features that might not be in distro packages yet. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-22-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: userspace system register testAlex Bennée2-0/+178
This tests a bunch of registers that the kernel allows userspace to read including the CPUID registers. We need a SVE aware compiler as we are testing the id_aa64zfr0_el1 register in the set. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-21-alex.bennee@linaro.org>
2020-03-17target/arm: don't bother with id_aa64pfr0_read for USER_ONLYAlex Bennée1-5/+15
For system emulation we need to check the state of the GIC before we report the value. However this isn't relevant to exporting of the value to linux-user and indeed breaks the exported value as set by modify_arm_cp_regs. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-20-alex.bennee@linaro.org>
2020-03-17target/arm: generate xml description of our SVE registersAlex Bennée3-5/+261
We also expose a the helpers to read/write the the registers. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-19-alex.bennee@linaro.org>
2020-03-17target/arm: default SVE length to 64 bytes for linux-userAlex Bennée1-3/+4
The Linux kernel chooses the default of 64 bytes for SVE registers on the basis that it is the largest size on known hardware that won't grow the signal frame. We still honour the sve-max-vq property and userspace can expand the number of lanes by calling PR_SVE_SET_VL. This should not make any difference to SVE enabled software as the SVE is of course vector length agnostic. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-18-alex.bennee@linaro.org>
2020-03-17target/arm: explicitly encode regnum in our XMLAlex Bennée3-8/+13
This is described as optional but I'm not convinced of the numbering when multiple target fragments are sent. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-17-alex.bennee@linaro.org>
2020-03-17target/arm: prepare for multiple dynamic XMLsAlex Bennée3-24/+30
We will want to generate similar dynamic XML for gdbstub support of SVE registers (the upstream doesn't use XML). To that end lightly rename a few things to make the distinction. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-16-alex.bennee@linaro.org>
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée41-149/+179
Instead of passing a pointer to memory now just extend the GByteArray to all the read register helpers. They can then safely append their data through the normal way. We don't bother with this abstraction for write registers as we have already ensured the buffer being copied from is the correct size. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Message-Id: <20200316172155.971-15-alex.bennee@linaro.org>
2020-03-17target/i386: use gdb_get_reg helpersAlex Bennée1-16/+11
This is cleaner than poking memory directly and will make later clean-ups easier. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-14-alex.bennee@linaro.org>
2020-03-17target/m68k: use gdb_get_reg helpersAlex Bennée1-18/+11
This is cleaner than poking memory directly and will make later clean-ups easier. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-13-alex.bennee@linaro.org>
2020-03-17target/arm: use gdb_get_reg helpersAlex Bennée1-11/+7
This is cleaner than poking memory directly and will make later clean-ups easier. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-12-alex.bennee@linaro.org>
2020-03-17gdbstub: add helper for 128 bit registersAlex Bennée1-0/+13
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-11-alex.bennee@linaro.org>
2020-03-17gdbstub: move mem_buf to GDBState and use GByteArrayAlex Bennée1-21/+35
This is in preparation for further re-factoring of the register API with the rest of the code. Theoretically the read register function could overwrite the MAX_PACKET_LENGTH buffer although currently all registers are well within the size range. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Tested-by: Damien Hedde <damien.hedde@greensocs.com> Message-Id: <20200316172155.971-10-alex.bennee@linaro.org>
2020-03-17gdbstub: move str_buf to GDBState and use GStringAlex Bennée1-105/+90
Rather than having a static buffer replace str_buf with a GString which we know can grow on demand. Convert the internal functions to take a GString instead of a char * and length. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Tested-by: Damien Hedde <damien.hedde@greensocs.com> Message-Id: <20200316172155.971-9-alex.bennee@linaro.org>
2020-03-17gdbstub: stop passing GDBState * around and use globalAlex Bennée1-283/+278
We only have one GDBState which should be allocated at the time we process any commands. This will make further clean-up a bit easier. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-8-alex.bennee@linaro.org>
2020-03-17gdbstub: make GDBState static and have common init functionAlex Bennée1-87/+81
Instead of allocating make this entirely static. We shall reduce the size of the structure in later commits and dynamically allocate parts of it. We introduce an init and reset helper function to keep all the manipulation in one place. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Message-Id: <20200316172155.971-7-alex.bennee@linaro.org>
2020-03-17travis.yml: Set G_MESSAGES_DEBUG do report GLib errorsPhilippe Mathieu-Daudé1-0/+1
Since commit f5852efa293 we can display GLib errors with the QEMU error reporting API. Set it to the 'error' level, as this helps understanding failures from QEMU calls to GLib on Travis-CI. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200316101544.22361-1-philmd@redhat.com> Message-Id: <20200316172155.971-6-alex.bennee@linaro.org>
2020-03-17tests/docker: Update VirGL to v0.8.0Philippe Mathieu-Daudé1-1/+1
Building the qemu:debian-amd64 fails when building VirGL: make[2]: Entering directory '/usr/src/virglrenderer/src/gallium/auxiliary' CC cso_cache/cso_cache.lo CC cso_cache/cso_hash.lo CC os/os_misc.lo CC util/u_debug.lo CC util/u_debug_describe.lo CC util/u_format.lo GEN util/u_format_table.c Traceback (most recent call last): File "./util/u_format_table.py", line 168, in <module> main() File "./util/u_format_table.py", line 164, in main write_format_table(formats) File "./util/u_format_table.py", line 132, in write_format_table print(" %s,\t/* is_array */" % (bool_map(format.is_array()),)) File "/usr/src/virglrenderer/src/gallium/auxiliary/util/u_format_parse.py", line 164, in is_array return self.array_element() != None File "/usr/src/virglrenderer/src/gallium/auxiliary/util/u_format_parse.py", line 73, in __eq__ return self.type == other.type and self.norm == other.norm and self.pure == other.pure and self.size == other.size AttributeError: 'NoneType' object has no attribute 'type' make[2]: Leaving directory '/usr/src/virglrenderer/src/gallium/auxiliary' make[2]: *** [Makefile:906: util/u_format_table.c] Error 1 make[1]: *** [Makefile:631: install-recursive] Error 1 VirGL commits a8962eda1..a613dcc82 fix this problem. Update to VirGL 0.8.0 which contains them. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200212202709.12665-4-philmd@redhat.com> Message-Id: <20200316172155.971-5-alex.bennee@linaro.org>
2020-03-17tests/docker: Remove obsolete VirGL --with-glx configure optionPhilippe Mathieu-Daudé1-1/+1
The GLX configure option has been removed in 71c75f201d [*]. We missed that when updating to v0.7.0 in commit fab3220f97. This silents: configure: creating ./config.status config.status: creating virglrenderer.pc ... configure: WARNING: unrecognized options: --with-glx [*] https://gitlab.freedesktop.org/virgl/virglrenderer/commit/71c75f201d Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200212202709.12665-3-philmd@redhat.com> Message-Id: <20200316172155.971-4-alex.bennee@linaro.org>
2020-03-17tests/docker: Update VirGL git repository URLPhilippe Mathieu-Daudé1-1/+1
freedesktop.org is moving to a GitLab instance, use the new url. - https://www.fooishbar.org/blog/gitlab-fdo-introduction/ - https://gitlab.freedesktop.org/freedesktop/freedesktop/-/wikis/home Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200212202709.12665-2-philmd@redhat.com> Message-Id: <20200316172155.971-3-alex.bennee@linaro.org>
2020-03-17tests/docker: Install tools to cross-debug and build Linux kernelsPhilippe Mathieu-Daudé2-0/+6
We often run Linux kernels to test QEMU. We sometimes need to build them manually to use non-default features. We only miss the tiny 'bc' tool. The ncurses library is helpful to run 'make menuconfig'. Finally, gdb-multiarch allow us to debug a TCG guest when its architecture is different than the host. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200212202738.12986-1-philmd@redhat.com> Message-Id: <20200316172155.971-2-alex.bennee@linaro.org>
2020-03-17hw/sd/ssi-sd: fix error handling in ssi_sd_realizeVladimir Sementsov-Ogievskiy1-2/+14
It's wrong to use same err object as errp parameter for several function calls without intermediate checking for error: we'll crash if try to set err object twice. Fix that. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20200317125741.15301-1-vsementsov@virtuozzo.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2020-03-17xen-block: Use one Error * variable instead of twoMarkus Armbruster1-6/+4
While there, tidy up indentation, and add return just for consistency and robustness. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200313170517.22480-4-armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> [The "while there" cleanups squashed in]
2020-03-17Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-17-2020' ↵Peter Maydell2-11/+15
into staging MIPS queue for March 17th, 2020 # gpg: Signature made Tue 17 Mar 2020 12:53:50 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [full] # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-mar-17-2020: MAINTAINERS: Add a file to the main MIPS section MAINTAINERS: Adjust maintainer's email MAINTAINERS: Adjust maintainer's status for some MIPS items Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17tcg: Remove tcg-runtime-gvec.c DO_CMP0Richard Henderson1-4/+1
Partial cleanup from the CONFIG_VECTOR16 removal. Replace DO_CMP0 with its scalar expansion, a simple negation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-03-17tcg: Tidy tcg-runtime-gvec.c DUP*Richard Henderson1-35/+15
Partial cleanup from the CONFIG_VECTOR16 removal. Replace the DUP* expansions with the scalar argument. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-03-17tcg: Tidy tcg-runtime-gvec.c typesRichard Henderson1-140/+130
Partial cleanup from the CONFIG_VECTOR16 removal. Replace the vec* types with their scalar expansions. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-03-17tcg: Remove CONFIG_VECTOR16Richard Henderson2-90/+1
The comment in tcg-runtime-gvec.c about CONFIG_VECTOR16 says that tcg-op-gvec.c has eliminated size 8 vectors, and only passes on multiples of 16. This may have been true of the first few operations, but is not true of all operations. In particular, multiply, shift by scalar, and compare of 8- and 16-bit elements are not expanded inline if host vector operations are not supported. For an x86_64 host that does not support AVX, this means that we will fall back to the helper, which will attempt to use SSE instructions, which will SEGV on an invalid 8-byte aligned memory operation. This patch simply removes the CONFIG_VECTOR16 code and configuration without further simplification. Buglink: https://bugs.launchpad.net/bugs/1863508 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-03-17tcg/i386: Bound shift count expanding sari_vecRichard Henderson1-3/+6
A given RISU testcase for SVE can produce tcg-op-vec.c:511: do_shifti: Assertion `i >= 0 && i < (8 << vece)' failed. because expand_vec_sari gave a shift count of 32 to a MO_32 vector shift. In 44f1441dbe1, we changed from direct expansion of vector opcodes to re-use of the tcg expanders. So while the comment correctly notes that the hw will handle such a shift count, we now have to take our own sanity checks into account. Which is easy in this particular case. Fixes: 44f1441dbe1 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-03-17hw/misc/ivshmem: Use one Error * variable instead of twoMarkus Armbruster1-4/+3
Commit fe44dc9180 "migration: disallow migrate_add_blocker during migration" accidentally added a second Error * variable. Use the first one instead. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200313170517.22480-3-armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
2020-03-17Use &error_abort instead of separate assert()Markus Armbruster3-14/+5
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200313170517.22480-2-armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> [Unused Error *variable deleted]
2020-03-17Merge remote-tracking branch ↵Peter Maydell15-36/+444
'remotes/pmaydell/tags/pull-target-arm-20200317' into staging target-arm: * hw/arm/pxa2xx: Do not wire up OHCI for PXA255 * aspeed/smc: Fix number of dummy cycles for FAST_READ_4 command * m25p80: Improve command handling for Jedec and unsupported commands * hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() * hw/arm/fsl-imx6, imx6ul: Wire up USB controllers * hw/arm/fsl-imx6ul: Instantiate unimplemented pwm and can devices # gpg: Signature made Tue 17 Mar 2020 11:40:01 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200317: hw/arm/pxa2xx: Do not wire up OHCI for PXA255 aspeed/smc: Fix number of dummy cycles for FAST_READ_4 command m25p80: Improve command handling for unsupported commands m25p80: Improve command handling for Jedec commands m25p80: Convert to support tracing hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() hw/arm/fsl-imx6: Wire up USB controllers hw/arm/fsl-imx6ul: Wire up USB controllers hw/arm/fsl-imx6ul: Instantiate unimplemented pwm and can devices hw/arm/fsl-imx6ul: Fix USB interrupt numbers hw/usb: Add basic i.MX USB Phy support Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17hw/arm: Let devices own the MemoryRegion they createPhilippe Mathieu-Daudé10-39/+40
Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-03-17hw/arm: Remove unnecessary memory_region_set_readonly() on ROM aliasPhilippe Mathieu-Daudé3-3/+0
This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-03-17hw/ppc/ppc405: Use memory_region_init_rom() with read-only regionsPhilippe Mathieu-Daudé1-4/+2
The scripts/coccinelle/memory-region-housekeeping.cocci reported: * TODO [[view:./hw/ppc/ppc405_boards.c::face=ovl-face1::linb=195::colb=8::cole=30][potential use of memory_region_init_rom*() in ./hw/ppc/ppc405_boards.c::195]] * TODO [[view:./hw/ppc/ppc405_boards.c::face=ovl-face1::linb=464::colb=8::cole=30][potential use of memory_region_init_rom*() in ./hw/ppc/ppc405_boards.c::464]] We can indeed replace the memory_region_init_ram() and memory_region_set_readonly() calls by memory_region_init_rom(). Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-03-17hw/arm/stm32: Use memory_region_init_rom() with read-only regionsPhilippe Mathieu-Daudé2-6/+2
The scripts/coccinelle/memory-region-housekeeping.cocci reported: * TODO [[view:./hw/arm/stm32f205_soc.c::face=ovl-face1::linb=96::colb=4::cole=26][potential use of memory_region_init_rom*() in ./hw/arm/stm32f205_soc.c::96]] * TODO [[view:./hw/arm/stm32f405_soc.c::face=ovl-face1::linb=98::colb=4::cole=26][potential use of memory_region_init_rom*() in ./hw/arm/stm32f405_soc.c::98]] We can indeed replace the memory_region_init_ram() and memory_region_set_readonly() calls by memory_region_init_rom(). Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-03-17hw/char: Let devices own the MemoryRegion they createPhilippe Mathieu-Daudé1-3/+4
Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
generated by cgit v1.1 at 2025-02-06 05:09:38 +0000