aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2022-05-04target/s390x: vxeh2: vector {load, store} byte reversed elementsDavid Miller2-0/+117
Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-11-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04target/s390x: vxeh2: vector {load, store} elements reversedDavid Miller2-0/+88
Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-10-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04target/s390x: vxeh2: vector shift double by bitDavid Miller2-8/+53
Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220428094708.84835-9-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04target/s390x: vxeh2: Update for changes to vector shiftsDavid Miller4-50/+95
Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-8-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04target/s390x: vxeh2: vector string searchDavid Miller5-1/+134
Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-7-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04target/s390x: vxeh2: vector convert short/32bDavid Miller3-4/+75
Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-6-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04tcg: Implement tcg_gen_{h,w}swap_{i32,i64}Richard Henderson2-0/+36
Swap half-words (16-bit) and words (32-bit) within a larger value. Mirrors functions of the same names within include/qemu/bitops.h. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: David Miller <dmiller423@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-5-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04s390x/cpu_models: make "max" match the unmodified "qemu" CPU model under TCGDavid Hildenbrand2-24/+13
Before we were able to bump up the qemu CPU model to a z13, we included some experimental features during development in the "max" model only. Nowadays, the "max" model corresponds exactly to the "qemu" CPU model of the latest QEMU machine under TCG. Let's remove all the special casing, effectively making both models match completely from now on, and clean up. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220428094708.84835-4-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04s390x/cpu_models: drop "msa5" from the TCG "max" modelDavid Hildenbrand1-2/+0
We don't include the "msa5" feature in the "qemu" model because it generates a warning. The PoP states: "The message-security-assist extension 5 requires the secure-hash-algorithm (SHA-512) capabilities of the message-security-assist extension 2 as a prereq- uisite. (March, 2015)" As SHA-512 won't be supported in the near future, let's just drop the feature from the "max" model. This avoids the warning and allows us for making the "max" model match the "qemu" model (except for compat machines). We don't lose much, as we only implement the function stubs for MSA, excluding any real subfunctions. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/897 Message-Id: <20220428094708.84835-3-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04target/s390x: Fix writeback to v1 in helper_vstlRichard Henderson1-2/+0
Fixes: 0e0a5b49ad58 ("s390x/tcg: Implement VECTOR STORE WITH LENGTH") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Miller <dmiller423@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-2-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-03Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into stagingRichard Henderson192-565/+609
Misc cleanups # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmJxKjQcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5ZD5D/9f5CGbNsrl7kB1t6iS # 1ABr5AeW0g9sidMCsQAe9xhWl6+R2SO/z0bBue+mv1ltG0RSZ1ZXS4FyJFBAhFfR # fZ6J7bvdnawIKOxu5T9NY/UvthdRV0eC8CTo0q6GAJo9MHyIGvo1TOoM2Ld9QpfB # 2uup+9fw3Clh0HSHwV9LSL7v2nucFef4A5P1CJ6d1KHnnej0hfug5o+Aiy+wDLA2 # 5RnTm44dqm9lzTgt/x4MqE6Us7WWQukjlLny8/gyurNTR+6fxLqjsHZG+6woQETu # Gg6angsOoAFyciFZ564rjGv80qQuccMVMjtrKvBZz/cmwUUz+Lb4tU3tUPBqomGX # wiofVtL4qcXs94OHWX654UX/iXgkRqC3r+aC0xT37cL4svC8N69BhilxI5+gIGxZ # ZjaQhHx/0e+Ut3c+xrjYHbywQMd9L9AhRyYSMz5BNeLg9+yUiMR+hvGVR/SubLN1 # iiLS07CRgdOKdP6ts7CC7txAgDw4h3cPN5Hz+gqXMJTcnBKpXpnF1lL+Zd/J5++N # 8qMVQH5O4REQRISsbKaOPW8PCiPESsUaHb/mWkre7iYLgkEdNMVQvRcnfx14ejbk # /KKXolrG1huJXGQGnYvgJArHMBBL+ieIYiT6alKFNRNECLdioL46FuSOlirHVCGe # StU22Vsl61M8ifDOPdolK55X5Q== # =npwd # -----END PGP SIGNATURE----- # gpg: Signature made Tue 03 May 2022 06:12:20 AM PDT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] * tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu: (23 commits) util: rename qemu_*block() socket functions tests: replace qemu_set_nonblock() net: replace qemu_set_nonblock() ui: replace qemu_set_nonblock() hw: replace qemu_set_nonblock() qga: replace qemu_set_nonblock() io: replace qemu_set{_non}block() chardev: replace qemu_set_nonblock() io: make qio_channel_command_new_pid() static Replace fcntl(O_NONBLOCK) with g_unix_set_fd_nonblocking() io: replace pipe() with g_unix_open_pipe(CLOEXEC) virtiofsd: replace pipe() with g_unix_open_pipe(CLOEXEC) os-posix: replace pipe()+cloexec with g_unix_open_pipe(CLOEXEC) tests: replace pipe() with g_unix_open_pipe(CLOEXEC) qga: replace pipe() with g_unix_open_pipe(CLOEXEC) util: replace pipe()+cloexec with g_unix_open_pipe() Replace qemu_pipe() with g_unix_open_pipe() block: move fcntl_setfl() Use g_unix_set_fd_nonblocking() libqtest: split QMP part in libqmp ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03Merge tag 'pull-aspeed-20220503' of https://github.com/legoater/qemu into ↵Richard Henderson22-16/+1199
staging aspeed queue: * New AST1030 SoC and eval board * Accumulative mode support for HACE controller * GPIO fix and unit test * Clock modeling adjustments for the AST2600 * Dummy eMMC Boot Controller model * Change of AST2500 EVB and AST2600 EVB flash model (for quad IO) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmJwwq8ACgkQUaNDx8/7 # 7KF0IhAApbCCcg06PR66pmaDBFY2RWmU0XShDoCEeHyT5huQFcAJWNoqVAJ52E8L # ZCPEeORQthxMwmtw7JLIGCFhDx4P4YzfNZRPANRosKs7BR0GequVgHp7c6fXhD/3 # A3w42hfuNR4Hrbsil/yhN2vxFAYXudA+NPez2ibex3UyVc/ZUu71nCqZTxh3wZdN # XQTuqxWerA5RRBRtVn8n/aBp+3mo5enD4dx44KWMZxKxJaFJfZQHVZttGHU9azF+ # fXJ1lmrJZ7eHmWjCEvgnHXwl0nWiMwkLZ9/MKOAPkdjUG1JciGRxbJki0bGuS7Jr # NzOyO0f++ZtOsuLGA03WiwR1oo3GmG7lBFqBcdzMwN2EMvDvVvJUp3v8IdV/L10P # OJ10rBi6FDJuKGHJGIQywlFSYYjPb+DgNEWId2rugVVm4dR02Cn69amuL40OO9by # /C7hO9gSvRTqSSdjFcdkbI2h+kx0354F2/gR2LFLBh1KUHulTJ4ErthrKBiuNPC8 # tsELzYVnxWVT+nc30Nmidg3uCW3/5zBlaj0qlL4aiFjKR5na6Wpz+oE/aNiNdyT3 # IBI+J5zvbtn/prNTWLW1TCuGdwj357LfYfkfkH8eqZWfX5vGq+5hVTc/m8EW5Cx8 # yV8JrbjX8uDI379skdl4imtedbKZhPLd7csM/zrorsJhBBwSoLA= # =+hIh # -----END PGP SIGNATURE----- # gpg: Signature made Mon 02 May 2022 10:50:39 PM PDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20220503' of https://github.com/legoater/qemu: aspeed/hace: Support AST1030 HACE hw/gpio/aspeed_gpio: Fix QOM pin property tests/qtest: Add test for Aspeed HACE accumulative mode aspeed/hace: Support AST2600 HACE aspeed/hace: Support HMAC Key Buffer register. hw/arm/aspeed: fix AST2500/AST2600 EVB fmc model test/avocado/machine_aspeed.py: Add ast1030 test case aspeed: Add an AST1030 eval board aspeed/soc : Add AST1030 support aspeed/scu: Add AST1030 support aspeed/timer: Add AST1030 support aspeed/wdt: Add AST1030 support aspeed/wdt: Fix ast2500/ast2600 default reload value aspeed/smc: Add AST1030 support aspeed/adc: Add AST1030 support aspeed: Add eMMC Boot Controller stub aspeed: sbc: Correct default reset values hw: aspeed_scu: Introduce clkin_25Mhz attribute hw: aspeed_scu: Add AST2600 apb_freq and hpll calculation function Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03util: rename qemu_*block() socket functionsMarc-André Lureau14-32/+32
The qemu_*block() functions are meant to be be used with sockets (the win32 implementation expects SOCKET) Over time, those functions where used with Win32 SOCKET or file-descriptors interchangeably. But for portability, they must only be used with socket-like file-descriptors. FDs can use g_unix_set_fd_nonblocking() instead. Rename the functions with "socket" in the name to prevent bad usages. This is effectively reverting commit f9e8cacc5557e43 ("oslib-posix: rename socket_set_nonblock() to qemu_set_nonblock()"). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-05-03tests: replace qemu_set_nonblock()Marc-André Lureau1-1/+3
The call is POSIX-specific. Use the dedicated GLib API. (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
2022-05-03net: replace qemu_set_nonblock()Marc-André Lureau1-14/+19
Those calls are POSIX-specific. Use the dedicated GLib API. (qemu_set_nonblock() is for socket-like) (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03ui: replace qemu_set_nonblock()Marc-André Lureau1-1/+4
The call is POSIX-specific. Use the dedicated GLib API. (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03hw: replace qemu_set_nonblock()Marc-André Lureau2-5/+11
Those calls are non-socket fd, or are POSIX-specific. Use the dedicated GLib API. (qemu_set_nonblock() is for socket-like) (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03qga: replace qemu_set_nonblock()Marc-André Lureau1-1/+5
The call is POSIX-specific. Use the dedicated GLib API. (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03io: replace qemu_set{_non}block()Marc-André Lureau2-11/+18
Those calls are non-socket fd, or are POSIX-specific. Use the dedicated GLib API. (qemu_set_nonblock() is for socket-like) (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03chardev: replace qemu_set_nonblock()Marc-André Lureau4-5/+14
Those calls are either for non-socket fd, or are POSIX-specific. Use the dedicated GLib API. (qemu_set_nonblock() is for socket-like) (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03io: make qio_channel_command_new_pid() staticMarc-André Lureau2-29/+22
The function isn't used outside of qio_channel_command_new_spawn(), which is !win32-specific. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03Replace fcntl(O_NONBLOCK) with g_unix_set_fd_nonblocking()Marc-André Lureau6-21/+9
Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03io: replace pipe() with g_unix_open_pipe(CLOEXEC)Marc-André Lureau1-2/+2
Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03virtiofsd: replace pipe() with g_unix_open_pipe(CLOEXEC)Marc-André Lureau1-1/+1
Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03os-posix: replace pipe()+cloexec with g_unix_open_pipe(CLOEXEC)Marc-André Lureau1-2/+1
Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03tests: replace pipe() with g_unix_open_pipe(CLOEXEC)Marc-André Lureau2-3/+4
Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03qga: replace pipe() with g_unix_open_pipe(CLOEXEC)Marc-André Lureau1-1/+1
Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03util: replace pipe()+cloexec with g_unix_open_pipe()Marc-André Lureau1-4/+1
Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03Replace qemu_pipe() with g_unix_open_pipe()Marc-André Lureau4-29/+4
GLib g_unix_open_pipe() is essentially like qemu_pipe(), available since 2.30. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03block: move fcntl_setfl()Marc-André Lureau3-17/+15
It is only used by block/file-posix.c, move it there. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03Use g_unix_set_fd_nonblocking()Marc-André Lureau3-6/+4
API available since glib 2.30. It also preserves errno. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03libqtest: split QMP part in libqmpMarc-André Lureau6-234/+290
This will help moving QAPI/QMP in a common subproject. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com>
2022-05-03tests: move libqtest.h back under qtest/Marc-André Lureau142-141/+141
Since commit a2ce7dbd917 ("meson: convert tests/qtest to meson"), libqtest.h is under libqos/ directory, while libqtest.c is still in qtest/. Move back to its original location to avoid mixing with libqos/. Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
2022-05-03Use QEMU_SANITIZE_ADDRESSMarc-André Lureau2-2/+2
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
2022-05-03Use QEMU_SANITIZE_THREADMarc-André Lureau2-3/+6
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03aspeed/hace: Support AST1030 HACESteven Lee2-0/+22
Per ast1030_v7.pdf, AST1030 HACE engine is identical to AST2600's HACE engine. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02hw/gpio/aspeed_gpio: Fix QOM pin propertyPeter Delevoryas3-2/+90
I was setting gpioV4-7 to "1110" using the QOM pin property handler and noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too. (qemu) qom-set /machine/soc/gpio gpioV4 true (qemu) qom-set /machine/soc/gpio gpioV5 true (qemu) qom-set /machine/soc/gpio gpioV6 true (qemu) qom-get /machine/soc/gpio gpioV4 true (qemu) qom-set /machine/soc/gpio gpioV7 false (qemu) qom-get /machine/soc/gpio gpioV4 false An expression in aspeed_gpio_set_pin_level was using a logical NOT operator instead of a bitwise NOT operator: value &= !pin_mask; The original author probably intended to make a bitwise NOT expression "~", but mistakenly used a logical NOT operator "!" instead. Some programming languages like Rust use "!" for both purposes. Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500") Signed-off-by: Peter Delevoryas <pdel@fb.com> Message-Id: <20220502080827.244815-1-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02tests/qtest: Add test for Aspeed HACE accumulative modeSteven Lee1-0/+147
This add two addition test cases for accumulative mode under sg enabled. The input vector was manually craft with "abc" + bit 1 + padding zeros + L. The padding length depends on algorithm, i.e. SHA512 (1024 bit), SHA256 (512 bit). The result was calculated by command line sha512sum/sha256sum utilities without padding, i.e. only "abc" ascii text. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Joel Stanley <joel@jms.id.au> [ clg: checkpatch fixes ] Message-Id: <20220426021120.28255-4-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/hace: Support AST2600 HACESteven Lee2-5/+131
The aspeed ast2600 accumulative mode is described in datasheet ast2600v10.pdf section 25.6.4: 1. Allocating and initiating accumulative hash digest write buffer with initial state. * Since QEMU crypto/hash api doesn't provide the API to set initial state of hash library, and the initial state is already set by crypto library (gcrypt/glib/...), so skip this step. 2. Calculating accumulative hash digest. (a) When receiving the last accumulative data, software need to add padding message at the end of the accumulative data. Padding message described in specific of MD5, SHA-1, SHA224, SHA256, SHA512, SHA512/224, SHA512/256. * Since the crypto library (gcrypt/glib) already pad the padding message internally. * This patch is to remove the padding message which fed byguest machine driver. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220426021120.28255-3-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/hace: Support HMAC Key Buffer register.Steven Lee2-0/+8
Support HACE28: Hash HMAC Key Buffer Base Address Register. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220426021120.28255-2-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02hw/arm/aspeed: fix AST2500/AST2600 EVB fmc modelJae Hyun Yoo1-2/+2
Current fmc model of AST2500 EVB and AST2600 EVB can't emulate quad mode properly so fix them using equivalent mx25l25635e and mx66u51235f respectively. These default settings still can be overridden using the 'fmc-model' command line option. Reported-by: Graeme Gregory <quic_ggregory@quicinc.com> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220402184427.4010304-1-quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02test/avocado/machine_aspeed.py: Add ast1030 test caseJamin Lin1-0/+36
Add test case to test "ast1030-evb" machine with zephyr os Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-10-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed: Add an AST1030 eval boardJamin Lin1-0/+66
The image should be supplied with ELF binary. $ qemu-system-arm -M ast1030-evb -kernel zephyr.elf -nographic Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-9-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/soc : Add AST1030 supportSteven Lee3-1/+307
The embedded core of AST1030 SoC is ARM Coretex M4. It is hard to be integrated in the common Aspeed Soc framework. We introduce a new ast1030 class with instance_init and realize handlers. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: rename aspeed_ast10xx.c to aspeed_ast10x0.c to match zephyr ] Message-Id: <20220401083850.15266-8-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/scu: Add AST1030 supportSteven Lee2-0/+88
Per ast1030_v07.pdf, AST1030 SOC doesn't have SCU300, the pclk divider selection is defined in SCU310[11:8]. Add a get_apb_freq function and a class init handler for ast1030. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-7-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/timer: Add AST1030 supportSteven Lee2-0/+18
ast1030 tmc(timer controller) is identical to ast2600 tmc. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-6-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/wdt: Add AST1030 supportSteven Lee2-0/+25
AST1030 wdt controller is similiar to AST2600's wdt, but it has extra registers. Introduce ast1030 object class and increse the number of regs(offset) of ast1030 model. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-5-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/wdt: Fix ast2500/ast2600 default reload valueSteven Lee2-2/+10
Per ast2500_2520_datasheet_v1.8 and ast2600v11.pdf, the default value of WDT00 and WDT04 is 0x014FB180 for ast2500/ast2600. Add default_status and default_reload_value attributes for storing counter status and reload value as they are different from ast2400. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-4-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/smc: Add AST1030 supportSteven Lee1-0/+157
AST1030 spi controller's address decoding unit is 1MB that is identical to ast2600, but fmc address decoding unit is 512kb. Introduce seg_to_reg and reg_to_seg handlers for ast1030 fmc controller. In addition, add ast1030 fmc, spi1, and spi2 class init handler. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-3-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/adc: Add AST1030 supportSteven Lee2-0/+17
Per ast1030_v7.pdf, AST1030 ADC engine is identical to AST2600's ADC. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-2-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
generated by cgit v1.1 at 2025-01-28 02:42:55 +0000