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2022-03-079p: linux: Fix a couple Linux assumptionsKeno Fischer4-2/+17
- Guard Linux only headers. - Add qemu/statfs.h header to abstract over the which headers are needed for struct statfs - Define `ENOATTR` only if not only defined (it's defined in system headers on Darwin). Signed-off-by: Keno Fischer <keno@juliacomputing.com> [Michael Roitzsch: - Rebase for NixOS] Signed-off-by: Michael Roitzsch <reactorcontrol@icloud.com> While it might at first appear that fsdev/virtfs-proxy-header.c would need similar adjustment for darwin as file-op-9p here, a later patch in this series disables virtfs-proxy-helper for non-Linux. Allowing virtfs-proxy-helper on darwin could potentially be an additional optimization later. [Will Cohen: - Fix headers for Alpine - Integrate statfs.h back into file-op-9p.h - Remove superfluous header guards from file-opt-9p - Add note about virtfs-proxy-helper being disabled on non-Linux for this patch series] Signed-off-by: Will Cohen <wwcohen@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20220227223522.91937-2-wwcohen@gmail.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
2022-03-05Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220305' into ↵Peter Maydell9-196/+190
staging ppc-7.0 queue : * Clang fixes * Vector/VSX instruction batch fixes # gpg: Signature made Sat 05 Mar 2022 08:18:06 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-ppc-20220305: target/ppc: Add missing helper_reset_fpstatus to helper_XVCVSPBF16 target/ppc: Add missing helper_reset_fpstatus to VSX_MAX_MINC target/ppc: split XXGENPCV macros for readability target/ppc: use andc in vrlqmi target/ppc: use extract/extract2 to create vrlqnm mask target/ppc: use ext32u and deposit in do_vx_vmulhw_i64 target/ppc: Fix vmul[eo]* instructions marked 2.07 tests/tcg/ppc64le: Use Altivec register names in clobber list tests/tcg/ppc64le: emit bcdsub with .long when needed tests/tcg/ppc64le: drop __int128 usage in bcdsub target/ppc: change xs[n]madd[am]sp to use float64r32_muladd tests/tcg/ppc64le: use inline asm instead of __builtin_mtfsf Use long endian options for ppc64 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-05Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20220304' ↵Peter Maydell17-93/+440
into staging Reorder do_constant_folding_cond test to satisfy valgrind. Fix value of MAX_OPC_PARAM_IARGS. Add opcodes for vector nand, nor, eqv. Support vector nand, nor, eqv on PPC and S390X hosts. Support AVX512VL, AVX512BW, AVX512DQ, and AVX512VBMI2. # gpg: Signature made Fri 04 Mar 2022 18:59:08 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-tcg-20220304: (21 commits) tcg/i386: Implement bitsel for avx512 tcg/i386: Implement more logical operations for avx512 tcg/i386: Implement avx512 multiply tcg/i386: Implement avx512 min/max/abs tcg/i386: Expand scalar rotate with avx512 insns tcg/i386: Remove rotls_vec from tcg_target_op_def tcg/i386: Expand vector word rotate as avx512vbmi2 shift-double tcg/i386: Support avx512vbmi2 vector shift-double instructions tcg/i386: Implement avx512 variable rotate tcg/i386: Implement avx512 immediate rotate tcg/i386: Implement avx512 immediate sari shift tcg/i386: Implement avx512 scalar shift tcg/i386: Implement avx512 variable shifts tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinv tcg/i386: Add tcg_out_evex_opc tcg/i386: Detect AVX512 tcg/s390x: Implement vector NAND, NOR, EQV tcg/ppc: Implement vector NAND, NOR, EQV tcg: Add opcodes for vector nand, nor, eqv tcg: Set MAX_OPC_PARAM_IARGS to 7 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-05Merge remote-tracking branch 'remotes/kwolf-gitlab/tags/for-upstream' into ↵Peter Maydell75-2823/+4860
staging Block layer patches - qemu-storage-daemon: Add --daemonize - Fix x-blockdev-amend and block node activation code which incorrectly executed code in the iothread that must run in the main thread. - Add macros for coroutine-safe TLS variables (required for correctness with LTO) - Fix crashes with concurrent I/O and bdrv_refresh_limits() - Split block APIs in global state and I/O - iotests: Don't refuse to run at all without GNU sed, just skip tests that need it # gpg: Signature made Fri 04 Mar 2022 17:18:31 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kwolf-gitlab/tags/for-upstream: (50 commits) block/amend: Keep strong reference to BDS block/amend: Always call .bdrv_amend_clean() tests/qemu-iotests: Rework the checks and spots using GNU sed iotests/graph-changes-while-io: New test iotests: Allow using QMP with the QSD block: Make bdrv_refresh_limits() non-recursive job.h: assertions in the callers of JobDriver function pointers job.h: split function pointers in JobDriver block-backend-common.h: split function pointers in BlockDevOps block_int-common.h: assertions in the callers of BdrvChildClass function pointers block_int-common.h: split function pointers in BdrvChildClass block_int-common.h: assertions in the callers of BlockDriver function pointers block_int-common.h: split function pointers in BlockDriver block/coroutines: I/O and "I/O or GS" API block/copy-before-write.h: global state API + assertions include/block/snapshot: global state API + assertions assertions for blockdev.h global state API include/sysemu/blockdev.h: global state API assertions for blockjob.h global state API include/block/blockjob.h: global state API ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-05target/ppc: Add missing helper_reset_fpstatus to helper_XVCVSPBF16Víctor Colombo1-0/+2
Fixes: 3909ff1fac ("target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions") Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220304175156.2012315-8-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05target/ppc: Add missing helper_reset_fpstatus to VSX_MAX_MINCVíctor Colombo1-0/+2
Fixes: da499405aa ("target/ppc: Refactor VSX_MAX_MINC helper") Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220304175156.2012315-7-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05target/ppc: split XXGENPCV macros for readabilityMatheus Ferst2-42/+57
Fixes: b090f4f1e3c9 ("target/ppc: Implement xxgenpcv[bhwd]m instruction") Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220304175156.2012315-6-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05target/ppc: use andc in vrlqmiMatheus Ferst1-4/+2
Fixes: 7e5947df6e94 ("target/ppc: implement vrlqmi") Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220304175156.2012315-5-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05target/ppc: use extract/extract2 to create vrlqnm maskMatheus Ferst1-7/+3
Fixes: 4e272668406b ("target/ppc: implement vrlqnm") Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220304175156.2012315-4-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05target/ppc: use ext32u and deposit in do_vx_vmulhw_i64Matheus Ferst1-7/+3
Fixes: 29e9dfcf755e ("target/ppc: vmulh* instructions without helpers") Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220304175156.2012315-3-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05target/ppc: Fix vmul[eo]* instructions marked 2.07Lucas Mateus Castro (alqotel)1-8/+8
Some ISA v2.03 Vector Multiply instructions marked to be ISA v2.07 only. This patch fixes it. Fixes: 80eca687c851 ("target/ppc: moved vector even and odd multiplication to decodetree") Reported-by: Howard Spoelstra <hsp.cat7@gmail.com> Suggested-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220304175156.2012315-2-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05tests/tcg/ppc64le: Use Altivec register names in clobber listMatheus Ferst1-8/+8
LLVM/Clang doesn't know the VSX registers when compiling with -mabi=elfv1. Use only registers >= 32 and list them with their Altivec name. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220304165417.1981159-6-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05tests/tcg/ppc64le: emit bcdsub with .long when neededMatheus Ferst1-31/+42
Based on GCC docs[1], we use the '-mpower8-vector' flag at config-time to detect the toolchain support to the bcdsub instruction. LLVM/Clang supports this flag since version 3.6[2], but the instruction and related builtins were only added in LLVM 14[3]. In the absence of other means to detect this support at config-time, we resort to __has_builtin to identify the presence of __builtin_bcdsub at compile-time. If the builtin is not available, the instruction is emitted with a ".long". [1] https://gcc.gnu.org/onlinedocs/gcc-8.3.0/gcc/PowerPC-AltiVec_002fVSX-Built-in-Functions.html [2] https://github.com/llvm/llvm-project/commit/59eb767e11d4ffefb5f55409524e5c8416b2b0db [3] https://github.com/llvm/llvm-project/commit/c933c2eb334660c131f4afc9d194fafb0cec0423 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220304165417.1981159-5-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05tests/tcg/ppc64le: drop __int128 usage in bcdsubMatheus Ferst1-68/+61
Using __int128 with inline asm constraints like "v" generates incorrect code when compiling with LLVM/Clang (e.g., only one doubleword of the VSR is loaded). Instead, use a GPR pair to pass the 128-bits value and load the VSR with mtvsrd/xxmrghd. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220304165417.1981159-4-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05target/ppc: change xs[n]madd[am]sp to use float64r32_muladdMatheus Ferst1-38/+20
Change VSX Scalar Multiply-Add/Subtract Type-A/M Single Precision helpers to use float64r32_muladd. This method should correctly handle all rounding modes, so the workaround for float_round_nearest_even can be dropped. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220304165417.1981159-3-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05tests/tcg/ppc64le: use inline asm instead of __builtin_mtfsfMatheus Ferst1-10/+9
LLVM/Clang does not support __builtin_mtfsf. Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220304165417.1981159-2-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-05Use long endian options for ppc64Miroslav Rezanina2-4/+4
GCC options pairs -mlittle/-mlittle-endian and -mbig/-mbig-endian are equivalent on ppc64 architecture. However, Clang supports only long version of the options. Use longer form in configure to properly support both GCC and Clang compiler. In addition, fix this issue in tcg test configure. Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20220131091714.4825-1-mrezanin@redhat.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-04Merge remote-tracking branch ↵Peter Maydell27-364/+600
'remotes/kraxel/tags/kraxel-20220304-pull-request' into staging usb: fixes for ohci, xhci, mtp and redirect audio: latency fixes ui: opengl and cocoa fixes firmware: ovmf tabel aprser fixes # gpg: Signature made Fri 04 Mar 2022 14:18:47 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/kraxel-20220304-pull-request: (35 commits) hw/display/vmware_vga: replace fprintf calls with trace events edid: Fix clock of Detailed Timing Descriptor softmmu/qdev-monitor: Add virtio-gpu-gl aliases ui/cocoa: Add Services menu ui/clipboard: fix use-after-free regression ui: do not create a surface when resizing a GL scanout ui/console: fix texture leak when calling surface_gl_create_texture() ui/console: fix crash when using gl context with non-gl listeners docs: Add spec of OVMF GUIDed table for SEV guests hw/i386: Replace magic number with field length calculation hw/i386: Improve bounds checking in OVMF table parsing coreaudio: Notify error in coreaudio_init_out hw/usb/redirect.c: Stop using qemu_oom_check() sdlaudio: fix samples vs. frames mix-up paaudio: fix samples vs. frames mix-up ossaudio: reduce effective playback buffer size dsoundaudio: reduce effective playback buffer size paaudio: reduce effective playback buffer size audio: restore mixing-engine playback buffer size Revert "audio: fix wavcapture segfault" ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-04tcg/i386: Implement bitsel for avx512Richard Henderson2-2/+20
The general ternary logic operation can implement BITSEL. Funnel the 4-operand operation into three variants of the 3-operand instruction, depending on input operand overlap. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement more logical operations for avx512Richard Henderson2-5/+39
AVX512VL has a general ternary logic operation, VPTERNLOGQ, which can implement NOT, ORC, NAND, NOR, EQV. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement avx512 multiplyRichard Henderson1-6/+6
AVX512DQ has VPMULLQ. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement avx512 min/max/absRichard Henderson1-7/+11
AVX512VL has VPABSQ, VPMAXSQ, VPMAXUQ, VPMINSQ, VPMINUQ. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Expand scalar rotate with avx512 insnsRichard Henderson1-20/+29
Expand 32-bit and 64-bit scalar rotate with VPRO[LR]V; expand 16-bit scalar rotate with VPSHLDV. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Remove rotls_vec from tcg_target_op_defRichard Henderson1-1/+0
There is no such instruction on x86, so we should not be pretending it has arguments. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Expand vector word rotate as avx512vbmi2 shift-doubleRichard Henderson1-1/+17
While there are no specific 16-bit rotate instructions, there are double-word shifts, which can perform the same operation. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Support avx512vbmi2 vector shift-double instructionsRichard Henderson3-0/+42
We will use VPSHLD, VPSHLDV and VPSHRDV for 16-bit rotates. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement avx512 variable rotateRichard Henderson2-2/+25
AVX512VL has VPROLVD and VPRORVQ. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement avx512 immediate rotateRichard Henderson2-3/+14
AVX512VL has VPROLD and VPROLQ, layered onto the same opcode as PSHIFTD, but requires EVEX encoding and W1. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement avx512 immediate sari shiftRichard Henderson1-9/+21
AVX512 has VPSRAQ with immediate operand, in the same form as with AVX, but requires EVEX encoding and W1. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement avx512 scalar shiftRichard Henderson1-2/+10
AVX512VL has VPSRAQ. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Implement avx512 variable shiftsRichard Henderson1-8/+24
AVX512VL has VPSRAVQ, and AVX512BW has VPSLLVW, VPSRAVW, VPSRLVW. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinvRichard Henderson1-4/+4
The condition for UMIN/UMAX availability is about to change; use the canonical version. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Add tcg_out_evex_opcRichard Henderson1-1/+50
The evex encoding is added here, for use in a subsequent patch. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/i386: Detect AVX512Richard Henderson3-5/+43
There are some operation sizes in some subsets of AVX512 that are missing from previous iterations of AVX. Detect them. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/s390x: Implement vector NAND, NOR, EQVRichard Henderson2-3/+20
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/ppc: Implement vector NAND, NOR, EQVRichard Henderson2-3/+18
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg: Add opcodes for vector nand, nor, eqvRichard Henderson10-15/+51
We've had placeholders for these opcodes for a while, and should have support on ppc, s390x and avx512 hosts. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg: Set MAX_OPC_PARAM_IARGS to 7Ziqiao Kong2-2/+2
The last entry of DEF_HELPERS_FLAGS_n is DEF_HELPER_FLAGS_7 and thus the MAX_OPC_PARAM_IARGS should be 7. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Ziqiao Kong <ziqiaokong@gmail.com> Message-Id: <20220227113127.414533-2-ziqiaokong@gmail.com> Fixes: e6cadf49c3d ("tcg: Add support for a helper with 7 arguments") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04tcg/optimize: only read val after const checkAlex Bennée1-4/+4
valgrind pointed out that arg_info()->val can be undefined which will be the case if the arguments are not constant. The ordering of the checks will have ensured we never relied on an undefined value but for the sake of completeness re-order the code to be clear. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220209112142.3367525-1-alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-04block/amend: Keep strong reference to BDSHanna Reitz1-0/+3
Otherwise, the BDS might be freed while the job is running, which would cause a use-after-free. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220304153729.711387-5-hreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04block/amend: Always call .bdrv_amend_clean()Hanna Reitz1-2/+2
.bdrv_amend_clean() says block drivers can use it to clean up what was done in .bdrv_amend_pre_run(). Therefore, it should always be called after .bdrv_amend_pre_run(), which means we need it to call it in the JobDriver.free() callback, not in JobDriver.clean(). Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220304153729.711387-3-hreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04tests/qemu-iotests: Rework the checks and spots using GNU sedThomas Huth4-67/+57
Instead of failing the iotests if GNU sed is not available (or skipping them completely in the check-block.sh script), it would be better to simply skip the bash-based tests that rely on GNU sed, so that the other tests could still be run. Thus we now explicitely use "gsed" (either as direct program or as a wrapper around "sed" if it's the GNU version) in the spots that rely on the GNU sed behavior. Statements that use the "-r" parameter of sed have been switched to use "-E" instead, since this switch is supported by all sed versions on our supported build hosts (most also support "-r", but macOS' sed only supports "-E"). With all these changes in place, we then can also remove the sed checks from the check-block.sh script, so that "make check-block" can now be run on systems without GNU sed, too. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220216125454.465041-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04iotests/graph-changes-while-io: New testHanna Reitz2-0/+96
Test the following scenario: 1. Some block node (null-co) attached to a user (here: NBD server) that performs I/O and keeps the node in an I/O thread 2. Repeatedly run blockdev-add/blockdev-del to add/remove an overlay to/from that node Each blockdev-add triggers bdrv_refresh_limits(), and because blockdev-add runs in the main thread, it does not stop the I/O requests. I/O can thus happen while the limits are refreshed, and when such a request sees a temporarily invalid block limit (e.g. alignment is 0), this may easily crash qemu (or the storage daemon in this case). The block layer needs to ensure that I/O requests to a node are paused while that node's BlockLimits are refreshed. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20220216105355.30729-4-hreitz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04iotests: Allow using QMP with the QSDHanna Reitz1-1/+31
Add a parameter to optionally open a QMP connection when creating a QemuStorageDaemon instance. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220216105355.30729-3-hreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04block: Make bdrv_refresh_limits() non-recursiveHanna Reitz1-4/+0
bdrv_refresh_limits() recurses down to the node's children. That does not seem necessary: When we refresh limits on some node, and then recurse down and were to change one of its children's BlockLimits, then that would mean we noticed the changed limits by pure chance. The fact that we refresh the parent's limits has nothing to do with it, so the reason for the change probably happened before this point in time, and we should have refreshed the limits then. Consequently, we should actually propagate block limits changes upwards, not downwards.  That is a separate and pre-existing issue, though, and so will not be addressed in this patch. The problem with recursing is that bdrv_refresh_limits() is not atomic. It begins with zeroing BDS.bl, and only then sets proper, valid limits. If we do not drain all nodes whose limits are refreshed, then concurrent I/O requests can encounter invalid request_alignment values and crash qemu. Therefore, a recursing bdrv_refresh_limits() requires the whole subtree to be drained, which is currently not ensured by most callers. A non-recursive bdrv_refresh_limits() only requires the node in question to not receive I/O requests, and this is done by most callers in some way or another: - bdrv_open_driver() deals with a new node with no parents yet - bdrv_set_file_or_backing_noperm() acts on a drained node - bdrv_reopen_commit() acts only on drained nodes - bdrv_append() should in theory require the node to be drained; in practice most callers just lock the AioContext, which should at least be enough to prevent concurrent I/O requests from accessing invalid limits So we can resolve the bug by making bdrv_refresh_limits() non-recursive. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1879437 Signed-off-by: Hanna Reitz <hreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20220216105355.30729-2-hreitz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04job.h: assertions in the callers of JobDriver function pointersEmanuele Giuseppe Esposito1-0/+10
Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20220303151616.325444-32-eesposit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04job.h: split function pointers in JobDriverEmanuele Giuseppe Esposito1-0/+22
The job API will be handled separately in another serie. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20220303151616.325444-31-eesposit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04block-backend-common.h: split function pointers in BlockDevOpsEmanuele Giuseppe Esposito1-5/+23
Assertions in the callers of the function pointrs are already added by previous patches. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20220303151616.325444-30-eesposit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04block_int-common.h: assertions in the callers of BdrvChildClass function ↵Emanuele Giuseppe Esposito1-1/+9
pointers Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20220303151616.325444-29-eesposit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-03-04block_int-common.h: split function pointers in BdrvChildClassEmanuele Giuseppe Esposito1-34/+47
Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20220303151616.325444-28-eesposit@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
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