Age | Commit message (Expand) | Author | Files | Lines |
2021-10-30 | hw/sh4: Coding style: Remove unnecessary casts | BALATON Zoltan | 1 | -2/+2 |
2021-10-30 | hw/sh4: Coding style: Add missing braces | BALATON Zoltan | 6 | -81/+118 |
2021-10-30 | hw/sh4: Coding style: White space fixes | BALATON Zoltan | 10 | -90/+104 |
2021-10-30 | hw/sh4: Coding style: Fix multi-line comments | BALATON Zoltan | 7 | -278/+286 |
2021-10-30 | hw/sh4: Coding style: Remove tabs | BALATON Zoltan | 6 | -1263/+1262 |
2021-10-29 | Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-10-29' into ... | Richard Henderson | 30 | -165/+354 |
2021-10-29 | Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' in... | Richard Henderson | 1 | -1/+2 |
2021-10-29 | qapi: Extend -compat to set policy for unstable interfaces | Markus Armbruster | 7 | -12/+51 |
2021-10-29 | qapi: Factor out compat_policy_input_ok() | Markus Armbruster | 5 | -42/+58 |
2021-10-29 | target/i386: Remove core-capability in Snowridge CPU model | Chenyi Qiang | 1 | -1/+2 |
2021-10-29 | Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-202... | Richard Henderson | 24 | -115/+605 |
2021-10-29 | qapi: Generalize enum member policy checking | Markus Armbruster | 3 | -14/+14 |
2021-10-29 | qapi: Generalize command policy checking | Markus Armbruster | 6 | -12/+17 |
2021-10-29 | qapi: Generalize struct member policy checking | Markus Armbruster | 8 | -42/+65 |
2021-10-29 | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211028' into staging | Richard Henderson | 11 | -1164/+2027 |
2021-10-29 | qapi: Tools for sets of special feature flags in generated code | Markus Armbruster | 3 | -0/+15 |
2021-10-29 | qapi: Eliminate QCO_NO_OPTIONS for a slight simplification | Markus Armbruster | 3 | -7/+2 |
2021-10-29 | qapi: Mark unstable QMP parts with feature 'unstable' | Markus Armbruster | 4 | -45/+130 |
2021-10-29 | qapi: New special feature flag "unstable" | Markus Armbruster | 3 | -5/+16 |
2021-10-29 | target/riscv: change the api for RVF/RVD fmin/fmax | Chih-Min Chao | 1 | -4/+12 |
2021-10-29 | softfloat: add APIs to handle alternative sNaN propagation for fmax/fmin | Chih-Min Chao | 3 | -8/+46 |
2021-10-29 | target/riscv: remove force HS exception | Jose Martins | 3 | -33/+1 |
2021-10-29 | target/riscv: fix VS interrupts forwarding to HS | Jose Martins | 1 | -20/+8 |
2021-10-28 | Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211028' into staging | Richard Henderson | 8 | -23/+129 |
2021-10-28 | softmmu: fix for "after access" watchpoints | Pavel Dovgalyuk | 1 | -1/+1 |
2021-10-28 | softmmu: remove useless condition in watchpoint check | Pavel Dovgalyuk | 1 | -21/+20 |
2021-10-28 | softmmu: fix watchpoint processing in icount mode | Pavel Dovgalyuk | 1 | -4/+2 |
2021-10-28 | tcg/optimize: Propagate sign info for shifting | Richard Henderson | 1 | -3/+47 |
2021-10-28 | tcg/optimize: Propagate sign info for bit counting | Richard Henderson | 1 | -1/+2 |
2021-10-28 | tcg/optimize: Propagate sign info for setcond | Richard Henderson | 1 | -0/+2 |
2021-10-28 | tcg/optimize: Propagate sign info for logical operations | Richard Henderson | 1 | -0/+29 |
2021-10-28 | tcg/optimize: Optimize sign extensions | Richard Henderson | 1 | -21/+102 |
2021-10-28 | tcg/optimize: Use fold_xx_to_i for rem | Richard Henderson | 1 | -1/+5 |
2021-10-28 | tcg/optimize: Use fold_xi_to_x for div | Richard Henderson | 1 | -1/+5 |
2021-10-28 | tcg/optimize: Use fold_xi_to_x for mul | Richard Henderson | 1 | -1/+2 |
2021-10-28 | tcg/optimize: Use fold_xx_to_i for orc | Richard Henderson | 1 | -0/+1 |
2021-10-28 | tcg/optimize: Stop forcing z_mask to "garbage" for 32-bit values | Richard Henderson | 1 | -19/+16 |
2021-10-28 | tcg: Extend call args using the correct opcodes | Richard Henderson | 1 | -3/+3 |
2021-10-28 | Hexagon (target/hexagon) put writes to USR into temp until commit | Taylor Simpson | 6 | -2/+120 |
2021-10-28 | Hexagon (target/hexagon) more tcg_constant_* | Taylor Simpson | 4 | -21/+9 |
2021-10-28 | target/riscv: Allow experimental J-ext to be turned on | Alexey Baturo | 1 | -0/+4 |
2021-10-28 | target/riscv: Implement address masking functions required for RISC-V Pointer... | Anatoly Parshintsev | 3 | -2/+57 |
2021-10-28 | target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instr... | Alexey Baturo | 5 | -0/+17 |
2021-10-28 | target/riscv: Print new PM CSRs in QEMU logs | Alexey Baturo | 1 | -0/+7 |
2021-10-28 | target/riscv: Add J extension state description | Alexey Baturo | 1 | -0/+27 |
2021-10-28 | target/riscv: Support CSRs required for RISC-V PM extension except for the h-... | Alexey Baturo | 3 | -0/+298 |
2021-10-28 | target/riscv: Add CSR defines for RISC-V PM extension | Alexey Baturo | 1 | -0/+96 |
2021-10-28 | target/riscv: Add J-extension into RISC-V | Alexey Baturo | 1 | -0/+2 |
2021-10-28 | hw/riscv: opentitan: Fixup the PLIC context addresses | Alistair Francis | 1 | -2/+2 |
2021-10-28 | hw/riscv: virt: Use the PLIC config helper function | Alistair Francis | 1 | -19/+1 |