riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-05-26	cpu: Move AVR target vmsd field from CPUClass to DeviceClass	Philippe Mathieu-Daudé	2	-3/+3
2021-05-26	cpu: Rename CPUClass vmsd -> legacy_vmsd	Philippe Mathieu-Daudé	10	-17/+17
2021-05-26	cpu: Assert DeviceClass::vmsd is NULL on user emulation	Philippe Mathieu-Daudé	3	-3/+8
2021-05-26	cpu: Directly use get_memory_mapping() fallback handlers in place	Philippe Mathieu-Daudé	2	-16/+13
2021-05-26	cpu: Directly use get_paging_enabled() fallback handlers in place	Philippe Mathieu-Daudé	2	-13/+11
2021-05-26	cpu: Directly use cpu_write_elf*() fallback handlers in place	Philippe Mathieu-Daudé	2	-63/+44
2021-05-26	cpu: Introduce cpu_virtio_is_big_endian()	Philippe Mathieu-Daudé	4	-9/+20
2021-05-26	cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs	Philippe Mathieu-Daudé	2	-29/+36
2021-05-26	cpu: Split as cpu-common / cpu-sysemu	Philippe Mathieu-Daudé	3	-18/+36
2021-05-26	cpu: Remove duplicated 'sysemu/hw_accel.h' header	Philippe Mathieu-Daudé	1	-1/+0
2021-05-26	tcg/aarch64: Fix tcg_out_rotl	Yasuo Kuwahara	1	-3/+2
2021-05-26	replay: fix watchpoint processing for reverse debugging	Pavel Dovgalyuk	1	-0/+10
2021-05-26	accel/tcg: Keep TranslationBlock headers local to TCG	Philippe Mathieu-Daudé	8	-9/+8
2021-05-26	accel/tcg: Reduce 'exec/tb-context.h' inclusion	Philippe Mathieu-Daudé	5	-2/+3
2021-05-26	exec/memory: Use correct type size	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	exec/memory_ldst_cached: Use correct type size	Philippe Mathieu-Daudé	1	-2/+2
2021-05-26	exec/memory_ldst_phys: Use correct type sizes	Philippe Mathieu-Daudé	1	-8/+8
2021-05-26	exec/memory_ldst: Use correct type sizes	Philippe Mathieu-Daudé	2	-18/+18
2021-05-26	exec/memory_ldst_phys: Sort declarations	Philippe Mathieu-Daudé	1	-36/+36
2021-05-26	exec/memory_ldst_cached: Sort declarations	Philippe Mathieu-Daudé	1	-20/+20
2021-05-25	Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-misc-upda...	Peter Maydell	5	-184/+297
2021-05-25	plugins/syscall: Added a table-like summary output	Mahmoud Mandour	1	-5/+93
2021-05-25	gdbstub: tidy away reverse debugging check into function	Alex Bennée	1	-2/+11
2021-05-25	hmp-commands: expand type of icount to "l" in replay commands	Alex Bennée	1	-2/+2
2021-05-25	gdbstub: Replace GdbCmdContext with plain g_array()	Alex Bennée	1	-168/+154
2021-05-25	gdbstub: Constify GdbCmdParseEntry	Philippe Mathieu-Daudé	1	-4/+4
2021-05-25	gitlab: add special rule for the hexagon container	Alex Bennée	2	-1/+32
2021-05-25	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210525'...	Peter Maydell	33	-1258/+8233
2021-05-25	target/arm: Enable SVE2 and related extensions	Richard Henderson	3	-0/+16
2021-05-25	linux-user/aarch64: Enable hwcap bits for sve2 and related extensions	Richard Henderson	1	-0/+10
2021-05-25	target/arm: Implement integer matrix multiply accumulate	Richard Henderson	7	-0/+169
2021-05-25	target/arm: Implement aarch32 VSUDOT, VUSDOT	Richard Henderson	3	-0/+38
2021-05-25	target/arm: Split decode of VSDOT and VUDOT	Richard Henderson	2	-11/+28
2021-05-25	target/arm: Split out do_neon_ddda	Richard Henderson	1	-52/+38
2021-05-25	target/arm: Fix decode for VDOT (indexed)	Richard Henderson	2	-3/+3
2021-05-25	target/arm: Remove unused fpst from VDOT_scalar	Richard Henderson	1	-3/+0
2021-05-25	target/arm: Split out do_neon_ddda_fpst	Richard Henderson	1	-55/+43
2021-05-25	target/arm: Implement aarch64 SUDOT, USDOT	Richard Henderson	2	-0/+30
2021-05-25	target/arm: Implement SVE2 fp multiply-add long	Stephen Long	4	-0/+141
2021-05-25	target/arm: Move endian adjustment macros to vec_internal.h	Richard Henderson	3	-28/+24
2021-05-25	target/arm: Implement SVE2 bitwise shift immediate	Stephen Long	4	-0/+133
2021-05-25	target/arm: Implement 128-bit ZIP, UZP, TRN	Richard Henderson	4	-8/+90
2021-05-25	target/arm: Implement SVE2 LD1RO	Richard Henderson	2	-0/+97
2021-05-25	target/arm: Tidy do_ldrq	Richard Henderson	1	-9/+4
2021-05-25	target/arm: Share table of sve load functions	Richard Henderson	1	-128/+126
2021-05-25	target/arm: Implement SVE2 FLOGB	Stephen Long	4	-0/+119
2021-05-25	target/arm: Implement SVE2 FCVTXNT, FCVTX	Stephen Long	2	-10/+41
2021-05-25	target/arm: Implement SVE2 FCVTLT	Stephen Long	4	-0/+46
2021-05-25	target/arm: Implement SVE2 FCVTNT	Richard Henderson	4	-0/+45
2021-05-25	target/arm: Implement SVE2 TBL, TBX	Stephen Long	4	-19/+119